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stm32/storage: Make spi_bdev interface take a data pointer as first arg.

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This allows a board to have multiple instances of the SPI block device.
This commit is contained in:
Damien George 2018-03-10 00:22:38 +11:00
parent 1e4caf0b1e
commit 1803e8ef22
3 changed files with 36 additions and 27 deletions
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37
ports/stm32/spibdev.c
View File

@ -35,8 +35,6 @@
#include "drivers/memory/spiflash.h" #include "drivers/memory/spiflash.h"
#include "genhdr/pins.h" #include "genhdr/pins.h"
static uint32_t flash_tick_counter_last_write;
#if defined(MICROPY_HW_SPIFLASH_MOSI) #if defined(MICROPY_HW_SPIFLASH_MOSI)
// External SPI flash uses standard SPI interface // External SPI flash uses standard SPI interface
@ -50,7 +48,7 @@ STATIC const mp_soft_spi_obj_t soft_spi_bus = {
.miso = &MICROPY_HW_SPIFLASH_MISO, .miso = &MICROPY_HW_SPIFLASH_MISO,
}; };
STATIC const mp_spiflash_config_t spiflash_config = { const mp_spiflash_config_t spiflash_config = {
.bus_kind = MP_SPIFLASH_BUS_SPI, .bus_kind = MP_SPIFLASH_BUS_SPI,
.bus.u_spi.cs = &MICROPY_HW_SPIFLASH_CS, .bus.u_spi.cs = &MICROPY_HW_SPIFLASH_CS,
.bus.u_spi.data = (void*)&soft_spi_bus, .bus.u_spi.data = (void*)&soft_spi_bus,
@ -72,7 +70,7 @@ STATIC const mp_soft_qspi_obj_t soft_qspi_bus = {
.io3 = &MICROPY_HW_SPIFLASH_IO3, .io3 = &MICROPY_HW_SPIFLASH_IO3,
}; };
STATIC const mp_spiflash_config_t spiflash_config = { const mp_spiflash_config_t spiflash_config = {
.bus_kind = MP_SPIFLASH_BUS_QSPI, .bus_kind = MP_SPIFLASH_BUS_QSPI,
.bus.u_qspi.data = (void*)&soft_qspi_bus, .bus.u_qspi.data = (void*)&soft_qspi_bus,
.bus.u_qspi.proto = &mp_soft_qspi_proto, .bus.u_qspi.proto = &mp_soft_qspi_proto,
@ -80,32 +78,29 @@ STATIC const mp_spiflash_config_t spiflash_config = {
#endif #endif
STATIC mp_spiflash_t spiflash; int32_t spi_bdev_ioctl(spi_bdev_t *bdev, uint32_t op, uint32_t arg) {
int32_t spi_bdev_ioctl(uint32_t op, uint32_t arg) {
(void)arg;
switch (op) { switch (op) {
case BDEV_IOCTL_INIT: case BDEV_IOCTL_INIT:
spiflash.config = &spiflash_config; bdev->spiflash.config = (const mp_spiflash_config_t*)arg;
mp_spiflash_init(&spiflash); mp_spiflash_init(&bdev->spiflash);
flash_tick_counter_last_write = 0; bdev->flash_tick_counter_last_write = 0;
return 0; return 0;
case BDEV_IOCTL_NUM_BLOCKS: case BDEV_IOCTL_NUM_BLOCKS:
return MICROPY_HW_SPIFLASH_SIZE_BITS / 8 / FLASH_BLOCK_SIZE; return MICROPY_HW_SPIFLASH_SIZE_BITS / 8 / FLASH_BLOCK_SIZE;
case BDEV_IOCTL_IRQ_HANDLER: case BDEV_IOCTL_IRQ_HANDLER:
if ((spiflash.flags & 1) && sys_tick_has_passed(flash_tick_counter_last_write, 1000)) { if ((bdev->spiflash.flags & 1) && sys_tick_has_passed(bdev->flash_tick_counter_last_write, 1000)) {
mp_spiflash_flush(&spiflash); mp_spiflash_flush(&bdev->spiflash);
led_state(PYB_LED_RED, 0); // indicate a clean cache with LED off led_state(PYB_LED_RED, 0); // indicate a clean cache with LED off
} }
return 0; return 0;
case BDEV_IOCTL_SYNC: case BDEV_IOCTL_SYNC:
if (spiflash.flags & 1) { if (bdev->spiflash.flags & 1) {
// we must disable USB irqs to prevent MSC contention with SPI flash // we must disable USB irqs to prevent MSC contention with SPI flash
uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS);
mp_spiflash_flush(&spiflash); mp_spiflash_flush(&bdev->spiflash);
led_state(PYB_LED_RED, 0); // indicate a clean cache with LED off led_state(PYB_LED_RED, 0); // indicate a clean cache with LED off
restore_irq_pri(basepri); restore_irq_pri(basepri);
} }
@ -114,22 +109,22 @@ int32_t spi_bdev_ioctl(uint32_t op, uint32_t arg) {
return -MP_EINVAL; return -MP_EINVAL;
} }
int spi_bdev_readblocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { int spi_bdev_readblocks(spi_bdev_t *bdev, uint8_t *dest, uint32_t block_num, uint32_t num_blocks) {
// we must disable USB irqs to prevent MSC contention with SPI flash // we must disable USB irqs to prevent MSC contention with SPI flash
uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS);
mp_spiflash_read(&spiflash, block_num * FLASH_BLOCK_SIZE, num_blocks * FLASH_BLOCK_SIZE, dest); mp_spiflash_read(&bdev->spiflash, block_num * FLASH_BLOCK_SIZE, num_blocks * FLASH_BLOCK_SIZE, dest);
restore_irq_pri(basepri); restore_irq_pri(basepri);
return 0; return 0;
} }
int spi_bdev_writeblocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) { int spi_bdev_writeblocks(spi_bdev_t *bdev, const uint8_t *src, uint32_t block_num, uint32_t num_blocks) {
// we must disable USB irqs to prevent MSC contention with SPI flash // we must disable USB irqs to prevent MSC contention with SPI flash
uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS);
int ret = mp_spiflash_write(&spiflash, block_num * FLASH_BLOCK_SIZE, num_blocks * FLASH_BLOCK_SIZE, src); int ret = mp_spiflash_write(&bdev->spiflash, block_num * FLASH_BLOCK_SIZE, num_blocks * FLASH_BLOCK_SIZE, src);
if (spiflash.flags & 1) { if (bdev->spiflash.flags & 1) {
led_state(PYB_LED_RED, 1); // indicate a dirty cache with LED on led_state(PYB_LED_RED, 1); // indicate a dirty cache with LED on
flash_tick_counter_last_write = HAL_GetTick(); bdev->flash_tick_counter_last_write = HAL_GetTick();
} }
restore_irq_pri(basepri); restore_irq_pri(basepri);

11
ports/stm32/storage.c
View File

@ -37,9 +37,14 @@
#if defined(MICROPY_HW_SPIFLASH_SIZE_BITS) #if defined(MICROPY_HW_SPIFLASH_SIZE_BITS)
// Use external SPI flash as the storage medium // Use external SPI flash as the storage medium
#define BDEV_IOCTL spi_bdev_ioctl STATIC spi_bdev_t spi_bdev;
#define BDEV_READBLOCKS spi_bdev_readblocks #define BDEV_IOCTL(op, arg) ( \
#define BDEV_WRITEBLOCKS spi_bdev_writeblocks (op) == BDEV_IOCTL_NUM_BLOCKS ? (MICROPY_HW_SPIFLASH_SIZE_BITS / 8 / FLASH_BLOCK_SIZE) : \
(op) == BDEV_IOCTL_INIT ? spi_bdev_ioctl(&spi_bdev, (op), (uint32_t)&spiflash_config) : \
spi_bdev_ioctl(&spi_bdev, (op), (arg)) \
)
#define BDEV_READBLOCKS(dest, bl, n) spi_bdev_readblocks(&spi_bdev, (dest), (bl), (n))
#define BDEV_WRITEBLOCKS(src, bl, n) spi_bdev_writeblocks(&spi_bdev, (src), (bl), (n))
#else #else

15
ports/stm32/storage.h
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@ -26,6 +26,8 @@
#ifndef MICROPY_INCLUDED_STM32_STORAGE_H #ifndef MICROPY_INCLUDED_STM32_STORAGE_H
#define MICROPY_INCLUDED_STM32_STORAGE_H #define MICROPY_INCLUDED_STM32_STORAGE_H
#include "drivers/memory/spiflash.h"
#define FLASH_BLOCK_SIZE (512) #define FLASH_BLOCK_SIZE (512)
#define STORAGE_SYSTICK_MASK (0x1ff) // 512ms #define STORAGE_SYSTICK_MASK (0x1ff) // 512ms
@ -55,9 +57,16 @@ int32_t flash_bdev_ioctl(uint32_t op, uint32_t arg);
bool flash_bdev_readblock(uint8_t *dest, uint32_t block); bool flash_bdev_readblock(uint8_t *dest, uint32_t block);
bool flash_bdev_writeblock(const uint8_t *src, uint32_t block); bool flash_bdev_writeblock(const uint8_t *src, uint32_t block);
int32_t spi_bdev_ioctl(uint32_t op, uint32_t arg); typedef struct _spi_bdev_t {
int spi_bdev_readblocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks); mp_spiflash_t spiflash;
int spi_bdev_writeblocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks); uint32_t flash_tick_counter_last_write;
} spi_bdev_t;
extern const mp_spiflash_config_t spiflash_config;
int32_t spi_bdev_ioctl(spi_bdev_t *bdev, uint32_t op, uint32_t arg);
int spi_bdev_readblocks(spi_bdev_t *bdev, uint8_t *dest, uint32_t block_num, uint32_t num_blocks);
int spi_bdev_writeblocks(spi_bdev_t *bdev, const uint8_t *src, uint32_t block_num, uint32_t num_blocks);
extern const struct _mp_obj_type_t pyb_flash_type; extern const struct _mp_obj_type_t pyb_flash_type;