stm32: Add new component, the mboot bootloader.
Mboot is a custom bootloader for STM32 MCUs. It can provide a USB DFU interface on either the FS or HS peripherals, as well as a custom I2C bootloader interface.
This commit is contained in:
Damien George
parent
f47eeab0ad
commit
15ddc20436
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# Select the board to build for: if not given on the command line,
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# then default to PYBV10.
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BOARD ?= PYBV10
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ifeq ($(wildcard ../boards/$(BOARD)/.),)
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$(error Invalid BOARD specified)
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endif
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# If the build directory is not given, make it reflect the board name.
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BUILD ?= build-$(BOARD)
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include ../../../py/mkenv.mk
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include ../boards/$(BOARD)/mpconfigboard.mk
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CMSIS_DIR=$(TOP)/lib/stm32lib/CMSIS/STM32$(MCU_SERIES_UPPER)xx/Include
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MCU_SERIES_UPPER = $(shell echo $(MCU_SERIES) | tr '[:lower:]' '[:upper:]')
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HAL_DIR=lib/stm32lib/STM32$(MCU_SERIES_UPPER)xx_HAL_Driver
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USBDEV_DIR=usbdev
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DFU=$(TOP)/tools/dfu.py
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PYDFU ?= $(TOP)/tools/pydfu.py
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DEVICE=0483:df11
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STFLASH ?= st-flash
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OPENOCD ?= openocd
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OPENOCD_CONFIG ?= boards/openocd_stm32f4.cfg
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CROSS_COMPILE = arm-none-eabi-
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INC += -I.
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INC += -I..
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INC += -I$(TOP)
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INC += -I$(BUILD)
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INC += -I$(TOP)/lib/cmsis/inc
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INC += -I$(CMSIS_DIR)/
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INC += -I$(TOP)/$(HAL_DIR)/Inc
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INC += -I../$(USBDEV_DIR)/core/inc -I../$(USBDEV_DIR)/class/inc
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# Basic Cortex-M flags
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CFLAGS_CORTEX_M = -mthumb
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# Options for particular MCU series
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CFLAGS_MCU_f4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
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CFLAGS_MCU_f7 = $(CFLAGS_CORTEX_M) -mtune=cortex-m7 -mcpu=cortex-m7
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CFLAGS_MCU_l4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
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CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -std=gnu99 -nostdlib $(CFLAGS_MOD) $(CFLAGS_EXTRA)
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CFLAGS += -D$(CMSIS_MCU)
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CFLAGS += $(CFLAGS_MCU_$(MCU_SERIES))
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CFLAGS += $(COPT)
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CFLAGS += -I../boards/$(BOARD)
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CFLAGS += -DSTM32_HAL_H='<stm32$(MCU_SERIES)xx_hal.h>'
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CFLAGS += -DBOARD_$(BOARD)
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CFLAGS += -DAPPLICATION_ADDR=$(TEXT0_ADDR)
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LDFLAGS = -nostdlib -L . -T stm32_generic.ld -Map=$(@:.elf=.map) --cref
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LIBS = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
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# Remove uncalled code from the final image.
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CFLAGS += -fdata-sections -ffunction-sections
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LDFLAGS += --gc-sections
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# Debugging/Optimization
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ifeq ($(DEBUG), 1)
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CFLAGS += -g -DPENDSV_DEBUG
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COPT = -O0
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else
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COPT += -Os -DNDEBUG
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endif
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SRC_LIB = $(addprefix lib/,\
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libc/string0.c \
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)
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SRC_C = \
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main.c \
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drivers/bus/softspi.c \
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drivers/bus/softqspi.c \
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drivers/memory/spiflash.c \
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ports/stm32/i2cslave.c \
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ports/stm32/qspi.c \
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ports/stm32/flashbdev.c \
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ports/stm32/spibdev.c \
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ports/stm32/usbd_conf.c \
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$(patsubst $(TOP)/%,%,$(wildcard $(TOP)/ports/stm32/boards/$(BOARD)/*.c))
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SRC_O = \
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ports/stm32/boards/startup_stm32$(MCU_SERIES).o \
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ports/stm32/resethandler.o \
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SRC_HAL = $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_,\
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hal_cortex.c \
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hal_flash.c \
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hal_flash_ex.c \
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hal_pcd.c \
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hal_pcd_ex.c \
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ll_usb.c \
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)
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SRC_USBDEV = $(addprefix ports/stm32/$(USBDEV_DIR)/,\
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core/src/usbd_core.c \
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core/src/usbd_ctlreq.c \
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core/src/usbd_ioreq.c \
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)
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OBJ =
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OBJ += $(addprefix $(BUILD)/, $(SRC_LIB:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_O))
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OBJ += $(addprefix $(BUILD)/, $(SRC_HAL:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_USBDEV:.c=.o))
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all: $(TOP)/lib/stm32lib/README.md $(BUILD)/firmware.dfu $(BUILD)/firmware.hex
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# For convenience, automatically fetch required submodules if they don't exist
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$(TOP)/lib/stm32lib/README.md:
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$(ECHO) "stm32lib submodule not found, fetching it now..."
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(cd $(TOP) && git submodule update --init lib/stm32lib)
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.PHONY: deploy
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deploy: $(BUILD)/firmware.dfu
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$(ECHO) "Writing $< to the board"
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$(Q)$(PYTHON) $(PYDFU) -u $<
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FLASH_ADDR = 0x08000000
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$(BUILD)/firmware.dfu: $(BUILD)/firmware.elf
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$(ECHO) "Create $@"
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$(Q)$(OBJCOPY) -O binary -j .isr_vector -j .text -j .data $^ $(BUILD)/firmware.bin
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$(Q)$(PYTHON) $(DFU) -b $(FLASH_ADDR):$(BUILD)/firmware.bin $@
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$(BUILD)/firmware.hex: $(BUILD)/firmware.elf
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$(ECHO) "Create $@"
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$(Q)$(OBJCOPY) -O ihex $< $@
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$(BUILD)/firmware.elf: $(OBJ)
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$(ECHO) "LINK $@"
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$(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS)
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$(Q)$(SIZE) $@
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#########################################
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vpath %.S . $(TOP)
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$(BUILD)/%.o: %.S
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$(ECHO) "CC $<"
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$(Q)$(CC) $(CFLAGS) -c -o $@ $<
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vpath %.s . $(TOP)
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$(BUILD)/%.o: %.s
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$(ECHO) "AS $<"
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$(Q)$(AS) -o $@ $<
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define compile_c
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$(ECHO) "CC $<"
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$(Q)$(CC) $(CFLAGS) -c -MD -o $@ $<
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@# The following fixes the dependency file.
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@# See http://make.paulandlesley.org/autodep.html for details.
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@# Regex adjusted from the above to play better with Windows paths, etc.
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@$(CP) $(@:.o=.d) $(@:.o=.P); \
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$(SED) -e 's/#.*//' -e 's/^.*: *//' -e 's/ *\\$$//' \
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-e '/^$$/ d' -e 's/$$/ :/' < $(@:.o=.d) >> $(@:.o=.P); \
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$(RM) -f $(@:.o=.d)
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endef
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vpath %.c . $(TOP)
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$(BUILD)/%.o: %.c
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$(call compile_c)
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# $(sort $(var)) removes duplicates
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#
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# The net effect of this, is it causes the objects to depend on the
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# object directories (but only for existence), and the object directories
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# will be created if they don't exist.
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OBJ_DIRS = $(sort $(dir $(OBJ)))
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$(OBJ): | $(OBJ_DIRS)
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$(OBJ_DIRS):
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$(MKDIR) -p $@
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clean:
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$(RM) -rf $(BUILD) $(CLEAN_EXTRA)
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.PHONY: clean
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###########################################
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$(BUILD)/main.o: $(BUILD)/genhdr/qstrdefs.generated.h
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$(BUILD)/genhdr/qstrdefs.generated.h:
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$(MKDIR) -p $(BUILD)/genhdr
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$(Q)echo "// empty" > $@
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-include $(OBJ:.o=.P)
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@ -0,0 +1,52 @@
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Mboot - MicroPython boot loader
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===============================
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Mboot is a custom bootloader for STM32 MCUs, and currently supports the
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STM32F4xx and STM32F7xx families. It can provide a standard USB DFU interface
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on either the FS or HS peripherals, as well as a sophisticated, custom I2C
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interface. It fits in 16k of flash space.
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How to use
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----------
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1. Configure your board to use a boot loader by editing the mpconfigboard.mk
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and mpconfigboard.h files. For example, for an F767 be sure to have these
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lines in mpconfigboard.mk:
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LD_FILES = boards/stm32f767.ld boards/common_bl.ld
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TEXT0_ADDR = 0x08008000
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And this in mpconfigboard.h (recommended to put at the end of the file):
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// Bootloader configuration
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#define MBOOT_I2C_PERIPH_ID 1
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#define MBOOT_I2C_SCL (pin_B8)
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#define MBOOT_I2C_SDA (pin_B9)
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#define MBOOT_I2C_ALTFUNC (4)
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To configure a pin to force entry into the boot loader the following
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options can be used (with example configuration):
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#define MBOOT_BOOTPIN_PIN (pin_A0)
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#define MBOOT_BOOTPIN_PULL (MP_HAL_PIN_PULL_UP)
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#define MBOOT_BOOTPIN_ACTIVE (0)
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2. Build the board's main application firmware as usual.
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3. Build mboot via:
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$ cd mboot
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$ make BOARD=<board-id>
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That should produce a DFU file for mboot. It can be deployed using
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USB DFU programming via (it will be placed at location 0x08000000):
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$ make BOARD=<board-id> deploy
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4. Reset the board while holding USR until all 3 LEDs are lit (the 4th option in
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the cycle) and then release USR. LED0 will then blink once per second to
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indicate that it's in mboot
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5. Use either USB DFU or I2C to download firmware. The script mboot.py shows how
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to communicate with the I2C boot loader interface. It should be run on a
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pyboard connected via I2C to the target board.
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,177 @@
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# Driver for Mboot, the MicroPython boot loader
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# MIT license; Copyright (c) 2018 Damien P. George
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import struct, time, os, hashlib
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I2C_CMD_ECHO = 1
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I2C_CMD_GETID = 2
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I2C_CMD_GETCAPS = 3
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I2C_CMD_RESET = 4
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I2C_CMD_CONFIG = 5
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I2C_CMD_GETLAYOUT = 6
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I2C_CMD_MASSERASE = 7
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I2C_CMD_PAGEERASE = 8
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I2C_CMD_SETRDADDR = 9
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I2C_CMD_SETWRADDR = 10
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I2C_CMD_READ = 11
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I2C_CMD_WRITE = 12
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I2C_CMD_COPY = 13
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I2C_CMD_CALCHASH = 14
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I2C_CMD_MARKVALID = 15
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class Bootloader:
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def __init__(self, i2c, addr):
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self.i2c = i2c
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self.addr = addr
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self.buf1 = bytearray(1)
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try:
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self.i2c.writeto(addr, b'')
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except OSError:
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raise Exception('no I2C mboot device found')
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def wait_response(self):
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start = time.ticks_ms()
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while 1:
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try:
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self.i2c.readfrom_into(self.addr, self.buf1)
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n = self.buf1[0]
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break
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except OSError as er:
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time.sleep_us(500)
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if time.ticks_diff(time.ticks_ms(), start) > 5000:
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raise Exception('timeout')
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if n >= 129:
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raise Exception(n)
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if n == 0:
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return b''
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else:
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return self.i2c.readfrom(self.addr, n)
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def wait_empty_response(self):
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ret = self.wait_response()
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if ret:
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raise Exception('expected empty response got %r' % ret)
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else:
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return None
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def echo(self, data):
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self.i2c.writeto(self.addr, struct.pack('<B', I2C_CMD_ECHO) + data)
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return self.wait_response()
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def getid(self):
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self.i2c.writeto(self.addr, struct.pack('<B', I2C_CMD_GETID))
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ret = self.wait_response()
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unique_id = ret[:12]
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mcu_name, board_name = ret[12:].split(b'\x00')
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return unique_id, str(mcu_name, 'ascii'), str(board_name, 'ascii')
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def reset(self):
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self.i2c.writeto(self.addr, struct.pack('<B', I2C_CMD_RESET))
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# we don't expect any response
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def getlayout(self):
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self.i2c.writeto(self.addr, struct.pack('<B', I2C_CMD_GETLAYOUT))
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layout = self.wait_response()
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id, flash_addr, layout = layout.split(b'/')
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assert id == b'@Internal Flash '
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flash_addr = int(flash_addr, 16)
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pages = []
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for chunk in layout.split(b','):
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n, sz = chunk.split(b'*')
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n = int(n)
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assert sz.endswith(b'Kg')
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sz = int(sz[:-2]) * 1024
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for i in range(n):
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pages.append((flash_addr, sz))
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flash_addr += sz
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return pages
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def pageerase(self, addr):
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self.i2c.writeto(self.addr, struct.pack('<BI', I2C_CMD_PAGEERASE, addr))
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self.wait_empty_response()
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def setrdaddr(self, addr):
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self.i2c.writeto(self.addr, struct.pack('<BI', I2C_CMD_SETRDADDR, addr))
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self.wait_empty_response()
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def setwraddr(self, addr):
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self.i2c.writeto(self.addr, struct.pack('<BI', I2C_CMD_SETWRADDR, addr))
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self.wait_empty_response()
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def read(self, n):
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self.i2c.writeto(self.addr, struct.pack('<BB', I2C_CMD_READ, n))
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return self.wait_response()
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def write(self, buf):
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self.i2c.writeto(self.addr, struct.pack('<B', I2C_CMD_WRITE) + buf)
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self.wait_empty_response()
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def calchash(self, n):
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self.i2c.writeto(self.addr, struct.pack('<BI', I2C_CMD_CALCHASH, n))
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return self.wait_response()
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def markvalid(self):
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self.i2c.writeto(self.addr, struct.pack('<B', I2C_CMD_MARKVALID))
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self.wait_empty_response()
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def deployfile(self, filename, addr):
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pages = self.getlayout()
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page_erased = [False] * len(pages)
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buf = bytearray(128) # maximum payload supported by I2C protocol
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start_addr = addr
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self.setwraddr(addr)
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fsize = os.stat(filename)[6]
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local_sha = hashlib.sha256()
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print('Deploying %s to location 0x%08x' % (filename, addr))
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with open(filename, 'rb') as f:
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t0 = time.ticks_ms()
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while True:
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n = f.readinto(buf)
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if n == 0:
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break
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# check if we need to erase the page
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for i, p in enumerate(pages):
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if p[0] <= addr < p[0] + p[1]:
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# found page
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if not page_erased[i]:
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print('\r% 3u%% erase 0x%08x' % (100 * (addr - start_addr) // fsize, addr), end='')
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self.pageerase(addr)
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page_erased[i] = True
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break
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else:
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raise Exception('address 0x%08x not valid' % addr)
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# write the data
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self.write(buf)
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# update local SHA256, with validity bits set
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if addr == start_addr:
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buf[0] |= 3
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if n == len(buf):
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local_sha.update(buf)
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else:
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local_sha.update(buf[:n])
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addr += n
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ntotal = addr - start_addr
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if ntotal % 2048 == 0 or ntotal == fsize:
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print('\r% 3u%% % 7u bytes ' % (100 * ntotal // fsize, ntotal), end='')
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t1 = time.ticks_ms()
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print()
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print('rate: %.2f KiB/sec' % (1024 * ntotal / (t1 - t0) / 1000))
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local_sha = local_sha.digest()
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print('Local SHA256: ', ''.join('%02x' % x for x in local_sha))
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self.setrdaddr(start_addr)
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remote_sha = self.calchash(ntotal)
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print('Remote SHA256:', ''.join('%02x' % x for x in remote_sha))
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if local_sha == remote_sha:
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print('Marking app firmware as valid')
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self.markvalid()
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self.reset()
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@ -0,0 +1,155 @@
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017-2018 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
|
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* in the Software without restriction, including without limitation the rights
|
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
|
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <stdbool.h>
|
||||
|
||||
#define mp_hal_delay_us_fast(us) mp_hal_delay_us(us)
|
||||
|
||||
#define MP_HAL_PIN_MODE_INPUT (0)
|
||||
#define MP_HAL_PIN_MODE_OUTPUT (1)
|
||||
#define MP_HAL_PIN_MODE_ALT (2)
|
||||
#define MP_HAL_PIN_MODE_ANALOG (3)
|
||||
#define MP_HAL_PIN_MODE_OPEN_DRAIN (5)
|
||||
#define MP_HAL_PIN_MODE_ALT_OPEN_DRAIN (6)
|
||||
#define MP_HAL_PIN_PULL_NONE (GPIO_NOPULL)
|
||||
#define MP_HAL_PIN_PULL_UP (GPIO_PULLUP)
|
||||
#define MP_HAL_PIN_PULL_DOWN (GPIO_PULLDOWN)
|
||||
|
||||
#define mp_hal_pin_obj_t uint32_t
|
||||
#define mp_hal_pin_input(p) mp_hal_pin_config((p), MP_HAL_PIN_MODE_INPUT, MP_HAL_PIN_PULL_NONE, 0)
|
||||
#define mp_hal_pin_output(p) mp_hal_pin_config((p), MP_HAL_PIN_MODE_OUTPUT, MP_HAL_PIN_PULL_NONE, 0)
|
||||
#define mp_hal_pin_open_drain(p) mp_hal_pin_config((p), MP_HAL_PIN_MODE_OPEN_DRAIN, MP_HAL_PIN_PULL_NONE, 0)
|
||||
#define mp_hal_pin_low(p) (((GPIO_TypeDef*)((p) & ~0xf))->BSRR = 0x10000 << ((p) & 0xf))
|
||||
#define mp_hal_pin_high(p) (((GPIO_TypeDef*)((p) & ~0xf))->BSRR = 1 << ((p) & 0xf))
|
||||
#define mp_hal_pin_od_low(p) mp_hal_pin_low(p)
|
||||
#define mp_hal_pin_od_high(p) mp_hal_pin_high(p)
|
||||
#define mp_hal_pin_read(p) ((((GPIO_TypeDef*)((p) & ~0xf))->IDR >> ((p) & 0xf)) & 1)
|
||||
#define mp_hal_pin_write(p, v) do { if (v) { mp_hal_pin_high(p); } else { mp_hal_pin_low(p); } } while (0)
|
||||
|
||||
void mp_hal_pin_config(uint32_t port_pin, uint32_t mode, uint32_t pull, uint32_t alt);
|
||||
void mp_hal_pin_config_speed(uint32_t port_pin, uint32_t speed);
|
||||
|
||||
#define pin_A0 (GPIOA_BASE | 0)
|
||||
#define pin_A1 (GPIOA_BASE | 1)
|
||||
#define pin_A2 (GPIOA_BASE | 2)
|
||||
#define pin_A3 (GPIOA_BASE | 3)
|
||||
#define pin_A4 (GPIOA_BASE | 4)
|
||||
#define pin_A5 (GPIOA_BASE | 5)
|
||||
#define pin_A6 (GPIOA_BASE | 6)
|
||||
#define pin_A7 (GPIOA_BASE | 7)
|
||||
#define pin_A8 (GPIOA_BASE | 8)
|
||||
#define pin_A9 (GPIOA_BASE | 9)
|
||||
#define pin_A10 (GPIOA_BASE | 10)
|
||||
#define pin_A11 (GPIOA_BASE | 11)
|
||||
#define pin_A12 (GPIOA_BASE | 12)
|
||||
#define pin_A13 (GPIOA_BASE | 13)
|
||||
#define pin_A14 (GPIOA_BASE | 14)
|
||||
#define pin_A15 (GPIOA_BASE | 15)
|
||||
|
||||
#define pin_B0 (GPIOB_BASE | 0)
|
||||
#define pin_B1 (GPIOB_BASE | 1)
|
||||
#define pin_B2 (GPIOB_BASE | 2)
|
||||
#define pin_B3 (GPIOB_BASE | 3)
|
||||
#define pin_B4 (GPIOB_BASE | 4)
|
||||
#define pin_B5 (GPIOB_BASE | 5)
|
||||
#define pin_B6 (GPIOB_BASE | 6)
|
||||
#define pin_B7 (GPIOB_BASE | 7)
|
||||
#define pin_B8 (GPIOB_BASE | 8)
|
||||
#define pin_B9 (GPIOB_BASE | 9)
|
||||
#define pin_B10 (GPIOB_BASE | 10)
|
||||
#define pin_B11 (GPIOB_BASE | 11)
|
||||
#define pin_B12 (GPIOB_BASE | 12)
|
||||
#define pin_B13 (GPIOB_BASE | 13)
|
||||
#define pin_B14 (GPIOB_BASE | 14)
|
||||
#define pin_B15 (GPIOB_BASE | 15)
|
||||
|
||||
#define pin_C0 (GPIOC_BASE | 0)
|
||||
#define pin_C1 (GPIOC_BASE | 1)
|
||||
#define pin_C2 (GPIOC_BASE | 2)
|
||||
#define pin_C3 (GPIOC_BASE | 3)
|
||||
#define pin_C4 (GPIOC_BASE | 4)
|
||||
#define pin_C5 (GPIOC_BASE | 5)
|
||||
#define pin_C6 (GPIOC_BASE | 6)
|
||||
#define pin_C7 (GPIOC_BASE | 7)
|
||||
#define pin_C8 (GPIOC_BASE | 8)
|
||||
#define pin_C9 (GPIOC_BASE | 9)
|
||||
#define pin_C10 (GPIOC_BASE | 10)
|
||||
#define pin_C11 (GPIOC_BASE | 11)
|
||||
#define pin_C12 (GPIOC_BASE | 12)
|
||||
#define pin_C13 (GPIOC_BASE | 13)
|
||||
#define pin_C14 (GPIOC_BASE | 14)
|
||||
#define pin_C15 (GPIOC_BASE | 15)
|
||||
|
||||
#define pin_D0 (GPIOD_BASE | 0)
|
||||
#define pin_D1 (GPIOD_BASE | 1)
|
||||
#define pin_D2 (GPIOD_BASE | 2)
|
||||
#define pin_D3 (GPIOD_BASE | 3)
|
||||
#define pin_D4 (GPIOD_BASE | 4)
|
||||
#define pin_D5 (GPIOD_BASE | 5)
|
||||
#define pin_D6 (GPIOD_BASE | 6)
|
||||
#define pin_D7 (GPIOD_BASE | 7)
|
||||
#define pin_D8 (GPIOD_BASE | 8)
|
||||
#define pin_D9 (GPIOD_BASE | 9)
|
||||
#define pin_D10 (GPIOD_BASE | 10)
|
||||
#define pin_D11 (GPIOD_BASE | 11)
|
||||
#define pin_D12 (GPIOD_BASE | 12)
|
||||
#define pin_D13 (GPIOD_BASE | 13)
|
||||
#define pin_D14 (GPIOD_BASE | 14)
|
||||
#define pin_D15 (GPIOD_BASE | 15)
|
||||
|
||||
#define pin_E0 (GPIOE_BASE | 0)
|
||||
#define pin_E1 (GPIOE_BASE | 1)
|
||||
#define pin_E2 (GPIOE_BASE | 2)
|
||||
#define pin_E3 (GPIOE_BASE | 3)
|
||||
#define pin_E4 (GPIOE_BASE | 4)
|
||||
#define pin_E5 (GPIOE_BASE | 5)
|
||||
#define pin_E6 (GPIOE_BASE | 6)
|
||||
#define pin_E7 (GPIOE_BASE | 7)
|
||||
#define pin_E8 (GPIOE_BASE | 8)
|
||||
#define pin_E9 (GPIOE_BASE | 9)
|
||||
#define pin_E10 (GPIOE_BASE | 10)
|
||||
#define pin_E11 (GPIOE_BASE | 11)
|
||||
#define pin_E12 (GPIOE_BASE | 12)
|
||||
#define pin_E13 (GPIOE_BASE | 13)
|
||||
#define pin_E14 (GPIOE_BASE | 14)
|
||||
#define pin_E15 (GPIOE_BASE | 15)
|
||||
|
||||
#define pin_F0 (GPIOF_BASE | 0)
|
||||
#define pin_F1 (GPIOF_BASE | 1)
|
||||
#define pin_F2 (GPIOF_BASE | 2)
|
||||
#define pin_F3 (GPIOF_BASE | 3)
|
||||
#define pin_F4 (GPIOF_BASE | 4)
|
||||
#define pin_F5 (GPIOF_BASE | 5)
|
||||
#define pin_F6 (GPIOF_BASE | 6)
|
||||
#define pin_F7 (GPIOF_BASE | 7)
|
||||
#define pin_F8 (GPIOF_BASE | 8)
|
||||
#define pin_F9 (GPIOF_BASE | 9)
|
||||
#define pin_F10 (GPIOF_BASE | 10)
|
||||
#define pin_F11 (GPIOF_BASE | 11)
|
||||
#define pin_F12 (GPIOF_BASE | 12)
|
||||
#define pin_F13 (GPIOF_BASE | 13)
|
||||
#define pin_F14 (GPIOF_BASE | 14)
|
||||
#define pin_F15 (GPIOF_BASE | 15)
|
||||
|
|
@ -0,0 +1,77 @@
|
|||
/*
|
||||
GNU linker script for generic STM32xxx MCU
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH_BL (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 (can be 32K) */
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
|
||||
}
|
||||
|
||||
/* produce a link error if there is not this amount of RAM for these sections */
|
||||
_minimum_stack_size = 2K;
|
||||
|
||||
/* Define tho top end of the stack. The stack is full descending so begins just
|
||||
above last byte of RAM. Note that EABI requires the stack to be 8-byte
|
||||
aligned for a call. */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM);
|
||||
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH_BL
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text*)
|
||||
*(.rodata*)
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
} >FLASH_BL
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data section */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .;
|
||||
*(.data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .;
|
||||
} >RAM AT> FLASH_BL
|
||||
|
||||
/* Uninitialized data section */
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sbss = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .;
|
||||
} >RAM
|
||||
|
||||
/* this just checks there is enough RAM for the stack */
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
. = . + _minimum_stack_size;
|
||||
. = ALIGN(4);
|
||||
} >RAM
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
Loading…
Reference in New Issue