diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 9e7664e7f7..0f45328c5b 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -102,6 +102,8 @@ jobs: - "feather_m0_rfm9x" - "feather_m0_supersized" - "feather_m4_express" + - "feather_mimxrt1011" + - "feather_mimxrt1062" - "feather_nrf52840_express" - "feather_radiofruit_zigbee" - "feather_stm32f405_express" @@ -109,6 +111,7 @@ jobs: - "grandcentral_m4_express" - "hallowing_m0_express" - "hallowing_m4_express" + - "imxrt1010_evk" - "itsybitsy_m0_express" - "itsybitsy_m4_express" - "itsybitsy_nrf52840_express" diff --git a/.gitmodules b/.gitmodules index da2360cb72..44fc818c84 100644 --- a/.gitmodules +++ b/.gitmodules @@ -108,3 +108,6 @@ [submodule "lib/mp3"] path = lib/mp3 url = https://github.com/adafruit/Adafruit_MP3 +[submodule "ports/mimxrt10xx/sdk"] + path = ports/mimxrt10xx/sdk + url = https://github.com/arturo182/MIMXRT10xx_SDK diff --git a/conf.py b/conf.py index 2e48703c93..abee78aba9 100644 --- a/conf.py +++ b/conf.py @@ -131,6 +131,8 @@ exclude_patterns = ["**/build*", "ports/esp8266/common-hal", "ports/esp8266/modules", "ports/minimal", + "ports/mimxrt10xx/peripherals", + "ports/mimxrt10xx/sdk", "ports/nrf/device", "ports/nrf/bluetooth", "ports/nrf/modules", diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index ba0ec0e4f9..6e0fc34bdd 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -26,7 +26,7 @@ import os import re -SUPPORTED_PORTS = ["atmel-samd", "nrf"] +SUPPORTED_PORTS = ["atmel-samd", "nrf", "mimxrt10xx"] def parse_port_config(contents, chip_keyword=None): diff --git a/docs/supported_ports.rst b/docs/supported_ports.rst index 13f1e65076..9416a9c4f5 100644 --- a/docs/supported_ports.rst +++ b/docs/supported_ports.rst @@ -8,6 +8,7 @@ and ESP8266. :maxdepth: 2 ../ports/atmel-samd/README + ../ports/mimxrt10xx/README ../ports/nrf/README ../ports/stm32f4/README ../ports/cxd56/README diff --git a/frozen/Adafruit_CircuitPython_BusDevice b/frozen/Adafruit_CircuitPython_BusDevice index 2000ae3a7c..805d41a021 160000 --- a/frozen/Adafruit_CircuitPython_BusDevice +++ b/frozen/Adafruit_CircuitPython_BusDevice @@ -1 +1 @@ -Subproject commit 2000ae3a7c5d60b850c9546a16425aee279e2a36 +Subproject commit 805d41a021c70df7609da772a6f6131810e5d6ba diff --git a/frozen/Adafruit_CircuitPython_HID b/frozen/Adafruit_CircuitPython_HID index a23b80569f..2d1dce6ad6 160000 --- a/frozen/Adafruit_CircuitPython_HID +++ b/frozen/Adafruit_CircuitPython_HID @@ -1 +1 @@ -Subproject commit a23b80569f23ef109667dd8c595d319e8a30d620 +Subproject commit 2d1dce6ad6ca7e091fd8b5c3f102693c24af8b88 diff --git a/locale/ID.po b/locale/ID.po index 20662ae9db..e6d19cc2c4 100644 --- a/locale/ID.po +++ b/locale/ID.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-01 17:29-0500\n" +"POT-Creation-Date: 2020-01-07 14:31-0800\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -66,7 +66,8 @@ msgid "%q indices must be integers, not %s" msgstr "" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/displayio/Group.c shared-bindings/displayio/Shape.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c #, fuzzy msgid "%q must be >= 1" msgstr "buffers harus mempunyai panjang yang sama" @@ -377,6 +378,10 @@ msgstr "" msgid "Buffer must be at least length 1" msgstr "" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, fuzzy, c-format @@ -596,7 +601,7 @@ msgid "Expected a %q" msgstr "" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c msgid "Expected a Characteristic" msgstr "" @@ -1325,6 +1330,10 @@ msgstr "" "\n" "Untuk menampilkan modul built-in silahkan ketik `help(\"modules\")`.\n" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" msgstr "" diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 5cf44cc356..085101ff15 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-01 17:29-0500\n" +"POT-Creation-Date: 2020-01-07 14:31-0800\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -66,7 +66,8 @@ msgid "%q indices must be integers, not %s" msgstr "" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/displayio/Group.c shared-bindings/displayio/Shape.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c msgid "%q must be >= 1" msgstr "" @@ -373,6 +374,10 @@ msgstr "" msgid "Buffer must be at least length 1" msgstr "" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, c-format @@ -585,7 +590,7 @@ msgid "Expected a %q" msgstr "" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c msgid "Expected a Characteristic" msgstr "" @@ -1302,6 +1307,10 @@ msgid "" "To list built-in modules please do `help(\"modules\")`.\n" msgstr "" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" msgstr "" diff --git a/locale/de_DE.po b/locale/de_DE.po index 17f2e38280..f38a036899 100644 --- a/locale/de_DE.po +++ b/locale/de_DE.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-01 17:29-0500\n" +"POT-Creation-Date: 2020-01-07 14:31-0800\n" "PO-Revision-Date: 2018-07-27 11:55-0700\n" "Last-Translator: Pascal Deneaux\n" "Language-Team: Sebastian Plamauer, Pascal Deneaux\n" @@ -68,7 +68,8 @@ msgid "%q indices must be integers, not %s" msgstr "%q Indizes müssen ganze Zahlen sein, nicht %s" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/displayio/Group.c shared-bindings/displayio/Shape.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c msgid "%q must be >= 1" msgstr "%q muss >= 1 sein" @@ -377,6 +378,10 @@ msgstr "Die Pufferlänge %d ist zu groß. Sie muss kleiner als %d sein." msgid "Buffer must be at least length 1" msgstr "Der Puffer muss eine Mindestenslänge von 1 haben" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, c-format @@ -589,7 +594,7 @@ msgid "Expected a %q" msgstr "Erwartet ein(e) %q" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c msgid "Expected a Characteristic" msgstr "Characteristic wird erwartet" @@ -1330,6 +1335,10 @@ msgstr "" "Um die integrierten Module aufzulisten, führe bitte `help(\"modules\")` " "aus.\n" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" msgstr "" diff --git a/locale/en_US.po b/locale/en_US.po index e6fbfc471b..136d0699de 100644 --- a/locale/en_US.po +++ b/locale/en_US.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-01 17:29-0500\n" +"POT-Creation-Date: 2020-01-07 14:31-0800\n" "PO-Revision-Date: 2018-07-27 11:55-0700\n" "Last-Translator: \n" "Language-Team: \n" @@ -66,7 +66,8 @@ msgid "%q indices must be integers, not %s" msgstr "" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/displayio/Group.c shared-bindings/displayio/Shape.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c msgid "%q must be >= 1" msgstr "" @@ -373,6 +374,10 @@ msgstr "" msgid "Buffer must be at least length 1" msgstr "" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, c-format @@ -585,7 +590,7 @@ msgid "Expected a %q" msgstr "" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c msgid "Expected a Characteristic" msgstr "" @@ -1302,6 +1307,10 @@ msgid "" "To list built-in modules please do `help(\"modules\")`.\n" msgstr "" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" msgstr "" diff --git a/locale/en_x_pirate.po b/locale/en_x_pirate.po index 5635102301..81e05f7dc3 100644 --- a/locale/en_x_pirate.po +++ b/locale/en_x_pirate.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-01 17:29-0500\n" +"POT-Creation-Date: 2020-01-07 14:31-0800\n" "PO-Revision-Date: 2018-07-27 11:55-0700\n" "Last-Translator: \n" "Language-Team: @sommersoft, @MrCertainly\n" @@ -68,7 +68,8 @@ msgid "%q indices must be integers, not %s" msgstr "" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/displayio/Group.c shared-bindings/displayio/Shape.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c msgid "%q must be >= 1" msgstr "" @@ -377,6 +378,10 @@ msgstr "" msgid "Buffer must be at least length 1" msgstr "" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, c-format @@ -589,7 +594,7 @@ msgid "Expected a %q" msgstr "" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c msgid "Expected a Characteristic" msgstr "" @@ -1306,6 +1311,10 @@ msgid "" "To list built-in modules please do `help(\"modules\")`.\n" msgstr "" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" msgstr "" diff --git a/locale/es.po b/locale/es.po index c9688a41b1..a8f6afb2a1 100644 --- a/locale/es.po +++ b/locale/es.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-01 17:29-0500\n" +"POT-Creation-Date: 2020-01-07 14:31-0800\n" "PO-Revision-Date: 2018-08-24 22:56-0500\n" "Last-Translator: \n" "Language-Team: \n" @@ -68,7 +68,8 @@ msgid "%q indices must be integers, not %s" msgstr "%q indices deben ser enteros, no %s" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/displayio/Group.c shared-bindings/displayio/Shape.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c msgid "%q must be >= 1" msgstr "%q debe ser >= 1" @@ -379,6 +380,10 @@ msgstr "" msgid "Buffer must be at least length 1" msgstr "Buffer debe ser de longitud 1 como minimo" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, c-format @@ -591,7 +596,7 @@ msgid "Expected a %q" msgstr "Se espera un %q" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c msgid "Expected a Characteristic" msgstr "Se esperaba una Característica." @@ -1327,6 +1332,10 @@ msgstr "" "\n" "Para listar los módulos incorporados por favor haga `help(\"modules\")`.\n" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" msgstr "" diff --git a/locale/fil.po b/locale/fil.po index 94f39f4064..3c1d13fa85 100644 --- a/locale/fil.po +++ b/locale/fil.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-01 17:29-0500\n" +"POT-Creation-Date: 2020-01-07 14:31-0800\n" "PO-Revision-Date: 2018-12-20 22:15-0800\n" "Last-Translator: Timothy \n" "Language-Team: fil\n" @@ -66,7 +66,8 @@ msgid "%q indices must be integers, not %s" msgstr "%q indeks ay dapat integers, hindi %s" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/displayio/Group.c shared-bindings/displayio/Shape.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c #, fuzzy msgid "%q must be >= 1" msgstr "aarehas na haba dapat ang buffer slices" @@ -379,6 +380,10 @@ msgstr "" msgid "Buffer must be at least length 1" msgstr "Buffer dapat ay hindi baba sa 1 na haba" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, fuzzy, c-format @@ -597,7 +602,7 @@ msgid "Expected a %q" msgstr "Umasa ng %q" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c #, fuzzy msgid "Expected a Characteristic" msgstr "Hindi mabasa and Characteristic." @@ -1336,6 +1341,10 @@ msgstr "" "\n" "Para makita ang listahan ng modules, `help(“modules”)`.\n" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" msgstr "" diff --git a/locale/fr.po b/locale/fr.po index 42209a045e..df189306c9 100644 --- a/locale/fr.po +++ b/locale/fr.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: 0.1\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-01 17:29-0500\n" +"POT-Creation-Date: 2020-01-07 14:31-0800\n" "PO-Revision-Date: 2019-04-14 20:05+0100\n" "Last-Translator: Pierrick Couturier \n" "Language-Team: fr\n" @@ -68,7 +68,8 @@ msgid "%q indices must be integers, not %s" msgstr "les indices %q doivent être des entiers, pas %s" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/displayio/Group.c shared-bindings/displayio/Shape.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c #, fuzzy msgid "%q must be >= 1" msgstr "%d doit être >=1" @@ -383,6 +384,10 @@ msgstr "" msgid "Buffer must be at least length 1" msgstr "Le tampon doit être de longueur au moins 1" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, fuzzy, c-format @@ -600,7 +605,7 @@ msgid "Expected a %q" msgstr "Attendu un %q" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c #, fuzzy msgid "Expected a Characteristic" msgstr "Une 'Characteristic' est attendue" @@ -1353,6 +1358,10 @@ msgstr "" "\n" "Pour lister les modules inclus, tapez `help(\"modules\")`.\n" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" msgstr "" diff --git a/locale/it_IT.po b/locale/it_IT.po index 684e2a90b9..3a6a710063 100644 --- a/locale/it_IT.po +++ b/locale/it_IT.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-01 17:29-0500\n" +"POT-Creation-Date: 2020-01-07 14:31-0800\n" "PO-Revision-Date: 2018-10-02 16:27+0200\n" "Last-Translator: Enrico Paganin \n" "Language-Team: \n" @@ -66,7 +66,8 @@ msgid "%q indices must be integers, not %s" msgstr "gli indici %q devono essere interi, non %s" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/displayio/Group.c shared-bindings/displayio/Shape.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c #, fuzzy msgid "%q must be >= 1" msgstr "slice del buffer devono essere della stessa lunghezza" @@ -379,6 +380,10 @@ msgstr "" msgid "Buffer must be at least length 1" msgstr "Il buffer deve essere lungo almeno 1" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, fuzzy, c-format @@ -597,7 +602,7 @@ msgid "Expected a %q" msgstr "Atteso un %q" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c #, fuzzy msgid "Expected a Characteristic" msgstr "Non è possibile aggiungere Characteristic." @@ -1339,6 +1344,10 @@ msgid "" "To list built-in modules please do `help(\"modules\")`.\n" msgstr "" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" msgstr "" diff --git a/locale/ko.po b/locale/ko.po index 7b4240800b..d8c9cbfba5 100644 --- a/locale/ko.po +++ b/locale/ko.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-01 17:29-0500\n" +"POT-Creation-Date: 2020-01-07 14:31-0800\n" "PO-Revision-Date: 2019-05-06 14:22-0700\n" "Last-Translator: \n" "Language-Team: LANGUAGE \n" @@ -68,7 +68,8 @@ msgid "%q indices must be integers, not %s" msgstr "%q 인덱스는 %s 가 아닌 정수 여야합니다" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/displayio/Group.c shared-bindings/displayio/Shape.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c msgid "%q must be >= 1" msgstr "%q 는 >=1이어야합니다" @@ -377,6 +378,10 @@ msgstr "" msgid "Buffer must be at least length 1" msgstr "잘못된 크기의 버퍼. >1 여야합니다" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, c-format @@ -589,7 +594,7 @@ msgid "Expected a %q" msgstr "%q 이 예상되었습니다." #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c msgid "Expected a Characteristic" msgstr "특성(Characteristic)이 예상되었습니다." @@ -1307,6 +1312,10 @@ msgid "" "To list built-in modules please do `help(\"modules\")`.\n" msgstr "" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" msgstr "" diff --git a/locale/pl.po b/locale/pl.po index 1ef686e451..6a16b2437a 100644 --- a/locale/pl.po +++ b/locale/pl.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-01 17:29-0500\n" +"POT-Creation-Date: 2020-01-07 14:31-0800\n" "PO-Revision-Date: 2019-03-19 18:37-0700\n" "Last-Translator: Radomir Dopieralski \n" "Language-Team: pl\n" @@ -67,7 +67,8 @@ msgid "%q indices must be integers, not %s" msgstr "%q indeks musi być liczbą całkowitą, a nie %s" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/displayio/Group.c shared-bindings/displayio/Shape.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c msgid "%q must be >= 1" msgstr "%q musi być >= 1" @@ -376,6 +377,10 @@ msgstr "" msgid "Buffer must be at least length 1" msgstr "Bufor musi mieć długość 1 lub więcej" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, c-format @@ -588,7 +593,7 @@ msgid "Expected a %q" msgstr "Oczekiwano %q" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c msgid "Expected a Characteristic" msgstr "Oczekiwano charakterystyki" @@ -1310,6 +1315,10 @@ msgstr "" "Podręczniki dostępne na learn.adafruit.com/category/circuitpyhon.\n" "Aby zobaczyć wbudowane moduły, wpisz `help(\"modules\")`.\n" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" msgstr "" diff --git a/locale/pt_BR.po b/locale/pt_BR.po index 9d36696ce7..7fb8fe9d7f 100644 --- a/locale/pt_BR.po +++ b/locale/pt_BR.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-01 17:29-0500\n" +"POT-Creation-Date: 2020-01-07 14:31-0800\n" "PO-Revision-Date: 2018-10-02 21:14-0000\n" "Last-Translator: \n" "Language-Team: \n" @@ -66,7 +66,8 @@ msgid "%q indices must be integers, not %s" msgstr "" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/displayio/Group.c shared-bindings/displayio/Shape.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c #, fuzzy msgid "%q must be >= 1" msgstr "buffers devem ser o mesmo tamanho" @@ -376,6 +377,10 @@ msgstr "" msgid "Buffer must be at least length 1" msgstr "" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, fuzzy, c-format @@ -592,7 +597,7 @@ msgid "Expected a %q" msgstr "Esperado um" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c #, fuzzy msgid "Expected a Characteristic" msgstr "Não é possível adicionar Característica." @@ -1320,6 +1325,10 @@ msgid "" "To list built-in modules please do `help(\"modules\")`.\n" msgstr "" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" msgstr "" diff --git a/locale/zh_Latn_pinyin.po b/locale/zh_Latn_pinyin.po index cb907e0a1f..9f1c0ea5b6 100644 --- a/locale/zh_Latn_pinyin.po +++ b/locale/zh_Latn_pinyin.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: circuitpython-cn\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-01 17:29-0500\n" +"POT-Creation-Date: 2020-01-07 14:31-0800\n" "PO-Revision-Date: 2019-04-13 10:10-0700\n" "Last-Translator: hexthat\n" "Language-Team: Chinese Hanyu Pinyin\n" @@ -68,7 +68,8 @@ msgid "%q indices must be integers, not %s" msgstr "%q suǒyǐn bìxū shì zhěngshù, ér bùshì %s" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/displayio/Group.c shared-bindings/displayio/Shape.c +#: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c +#: shared-bindings/displayio/Shape.c msgid "%q must be >= 1" msgstr "%q bìxū dàyú huò děngyú 1" @@ -377,6 +378,10 @@ msgstr "Huǎnchōng qū chángdù%d tài dà. Tā bìxū xiǎoyú%d" msgid "Buffer must be at least length 1" msgstr "Huǎnchōng qū bìxū zhìshǎo chángdù 1" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Buffer too large and unable to allocate" +msgstr "" + #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, c-format @@ -589,7 +594,7 @@ msgid "Expected a %q" msgstr "Yùqí %q" #: shared-bindings/_bleio/CharacteristicBuffer.c -#: shared-bindings/_bleio/Descriptor.c +#: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c msgid "Expected a Characteristic" msgstr "Yùqí de tèdiǎn" @@ -1319,6 +1324,10 @@ msgstr "" "\n" "Ruò yào liè chū nèizài de mókuài, qǐng qǐng zuò yǐxià `help(\"modules\")`.\n" +#: ports/nrf/common-hal/_bleio/PacketBuffer.c +msgid "Writes not supported on Characteristic" +msgstr "" + #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" msgstr "" diff --git a/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.h b/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.h index 42fb4548e0..4bd01706df 100644 --- a/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.h +++ b/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.h @@ -19,3 +19,10 @@ // USB is always used internally so skip the pin objects for it. #define IGNORE_PIN_PA24 1 #define IGNORE_PIN_PA25 1 + +// Enable the use of 2 displays + +#define CIRCUITPY_DISPLAY_LIMIT (2) + + + diff --git a/ports/atmel-samd/boards/pewpew_m4/board.c b/ports/atmel-samd/boards/pewpew_m4/board.c index b684f56016..5f5a01e48e 100644 --- a/ports/atmel-samd/boards/pewpew_m4/board.c +++ b/ports/atmel-samd/boards/pewpew_m4/board.c @@ -35,8 +35,36 @@ displayio_fourwire_obj_t board_display_obj; +typedef struct { + const uint32_t *config_data; + void *handoverHID; + void *handoverMSC; + const char *info_uf2; +} UF2_BInfo; + +#define APP_START_ADDRESS 0x00004000 +#define UF2_BINFO ((UF2_BInfo *)(APP_START_ADDRESS - sizeof(UF2_BInfo))) + +#define CFG_DISPLAY_CFG0 39 +#define CFG_MAGIC0 0x1e9e10f1 + #define DELAY 0x80 +uint32_t lookupCfg(uint32_t key, uint32_t defl) { + const uint32_t *ptr = UF2_BINFO->config_data; + if (!ptr || (((uint32_t)ptr) & 3) || *ptr != CFG_MAGIC0) { + // no config data! + } else { + ptr += 4; + while (*ptr) { + if (*ptr == key) + return ptr[1]; + ptr += 2; + } + } + return defl; +} + uint8_t display_init_sequence[] = { 0x01, 0 | DELAY, 150, // SWRESET 0x11, 0 | DELAY, 255, // SLPOUT @@ -63,8 +91,6 @@ uint8_t display_init_sequence[] = { 0x2E, 0x2C, 0x29, 0x2D, 0x2E, 0x2E, 0x37, 0x3F, 0x00, 0x00, 0x02, 0x10, - 0x2a, 3, 0x02, 0x00, 0x81, // _CASET XSTART = 2, XEND = 129 - 0x2b, 3, 0x02, 0x00, 0x81, // _RASET XSTART = 2, XEND = 129 0x13, 0 | DELAY, 10, // _NORON 0x29, 0 | DELAY, 100, // _DISPON }; @@ -83,14 +109,17 @@ void board_init(void) { &pin_PA17, // TFT_RST Reset 60000000); + uint32_t cfg0 = lookupCfg(CFG_DISPLAY_CFG0, 0x000000); + uint32_t offX = (cfg0 >> 8) & 0xff; + uint32_t offY = (cfg0 >> 16) & 0xff; displayio_display_obj_t* display = &displays[0].display; display->base.type = &displayio_display_type; common_hal_displayio_display_construct(display, bus, 160, // Width (after rotation) 128, // Height (after rotation) - 0, // column start - 0, // row start + offX, // column start + offY, // row start 0, // rotation 16, // Color depth false, // grayscale diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals index 4c0deecf88..b89811f22a 160000 --- a/ports/atmel-samd/peripherals +++ b/ports/atmel-samd/peripherals @@ -1 +1 @@ -Subproject commit 4c0deecf889da0074c1dbc9a5e2d24cb7c7a31c6 +Subproject commit b89811f22a24ac350079ceaf0cdf0e62aa03f4f4 diff --git a/ports/mimxrt10xx/.gitignore b/ports/mimxrt10xx/.gitignore new file mode 100644 index 0000000000..414487d53e --- /dev/null +++ b/ports/mimxrt10xx/.gitignore @@ -0,0 +1 @@ +build-*/ diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile new file mode 100644 index 0000000000..68ddea565c --- /dev/null +++ b/ports/mimxrt10xx/Makefile @@ -0,0 +1,253 @@ +# This file is part of the MicroPython project, http://micropython.org/ +# +# The MIT License (MIT) +# +# Copyright (c) 2019 Dan Halbert for Adafruit Industries +# Copyright (c) 2019 Artur Pacholec +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +# Select the board to build for. +ifeq ($(BOARD),) + $(error You must provide a BOARD parameter) +else + ifeq ($(wildcard boards/$(BOARD)/.),) + $(error Invalid BOARD specified) + endif +endif + +# If the build directory is not given, make it reflect the board name. +BUILD ?= build-$(BOARD) + +include ../../py/mkenv.mk +# Board-specific +include boards/$(BOARD)/mpconfigboard.mk +# Port-specific +include mpconfigport.mk +# CircuitPython-specific +include $(TOP)/py/circuitpy_mpconfig.mk + +# qstr definitions (must come before including py.mk) +QSTR_DEFS = qstrdefsport.h + +# include py core make definitions +include $(TOP)/py/py.mk + +include $(TOP)/supervisor/supervisor.mk + +# Include make rules and variables common across CircuitPython builds. +include $(TOP)/py/circuitpy_defns.mk + +CROSS_COMPILE = arm-none-eabi- + +INC += \ + -I. \ + -I../.. \ + -I../lib/mp-readline \ + -I../lib/timeutils \ + -I../../lib/tinyusb/src \ + -I../../supervisor/shared/usb \ + -I$(BUILD) \ + -Iboards/ \ + -Iboards/$(BOARD) \ + -Iperipherals/ \ + -Iperipherals/mimxrt10xx/ \ + -Isdk/CMSIS/Include \ + -Isdk/devices/$(CHIP_FAMILY) \ + -Isdk/devices/$(CHIP_FAMILY)/drivers \ + +# NDEBUG disables assert() statements. This reduces code size pretty dramatically, per tannewt. + +CFLAGS += -Os -DNDEBUG + +# TinyUSB defines +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=256 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=256 -DCFG_TUD_MSC_BUFSIZE=1024 + +#Debugging/Optimization +ifeq ($(DEBUG), 1) + CFLAGS += -ggdb + # You may want to disable -flto if it interferes with debugging. + #CFLAGS += -flto -flto-partition=none + # You may want to enable these flags to make setting breakpoints easier. + CFLAGS += -fno-inline -fno-ipa-sra +else + # -finline-limit can shrink the image size. + # -finline-limit=80 or so is similar to not having it on. + # There is no simple default value, though. + + # Do a default shrink for small builds. + ifndef CFLAGS_INLINE_LIMIT + ifeq ($(CIRCUITPY_SMALL_BUILD),1) + CFLAGS_INLINE_LIMIT = 50 + endif + endif + + ifdef CFLAGS_INLINE_LIMIT + CFLAGS += -finline-limit=$(CFLAGS_INLINE_LIMIT) + endif + #CFLAGS += -flto -flto-partition=none +endif + +CFLAGS += $(INC) -Wall -Wno-cast-align -std=gnu11 -nostdlib $(BASE_CFLAGS) $(CFLAGS_MOD) $(COPT) + +CFLAGS += \ + -mthumb \ + -mapcs \ + -mcpu=cortex-m7 \ + -mfloat-abi=hard \ + -mfpu=fpv5-sp-d16 \ + -DCPU_$(CHIP_VARIANT) \ + -DDEBUG \ + -DXIP_EXTERNAL_FLASH=1 \ + -DXIP_BOOT_HEADER_ENABLE=1 \ + -D__START=main \ + -Os -g3 -Wno-unused-parameter \ + -ffunction-sections -fdata-sections -fstack-usage \ + -D__STARTUP_CLEAR_BSS + +LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs +LIBS := -lgcc -lc -lnosys -lm + +# Use toolchain libm if we're not using our own. +ifndef INTERNAL_LIBM +LIBS += -lm +endif + +LDFLAGS += -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mthumb -mapcs +BOOTLOADER_SIZE := 0x6000C000 + +SRC_SDK := \ + drivers/fsl_adc.c \ + drivers/fsl_cache.c \ + drivers/fsl_clock.c \ + drivers/fsl_common.c \ + drivers/fsl_flexspi.c \ + drivers/fsl_gpio.c \ + drivers/fsl_lpi2c.c \ + drivers/fsl_lpspi.c \ + drivers/fsl_lpuart.c \ + drivers/fsl_ocotp.c \ + drivers/fsl_pwm.c \ + drivers/fsl_snvs_hp.c \ + drivers/fsl_tempmon.c \ + drivers/fsl_trng.c \ + system_$(CHIP_FAMILY).c \ + +SRC_SDK := $(addprefix sdk/devices/$(CHIP_FAMILY)/, $(SRC_SDK)) + +SRC_C = \ + background.c \ + boards/$(BOARD)/board.c \ + boards/$(BOARD)/pins.c \ + fatfs_port.c \ + lib/mp-readline/readline.c \ + lib/oofatfs/ff.c \ + lib/oofatfs/option/ccsbcs.c \ + lib/timeutils/timeutils.c \ + lib/utils/buffer_helper.c \ + lib/utils/context_manager_helpers.c \ + lib/utils/interrupt_char.c \ + lib/utils/pyexec.c \ + lib/utils/stdout_helpers.c \ + lib/utils/sys_stdio_mphal.c \ + lib/tinyusb/src/portable/nxp/transdimension/dcd_transdimension.c \ + mphalport.c \ + peripherals/mimxrt10xx/$(CHIP_FAMILY)/clocks.c \ + peripherals/mimxrt10xx/$(CHIP_FAMILY)/periph.c \ + peripherals/mimxrt10xx/$(CHIP_FAMILY)/pins.c \ + reset.c \ + supervisor/flexspi_nor_flash_ops.c \ + supervisor/shared/memory.c \ + tick.c + +ifeq ($(CIRCUITPY_NETWORK),1) +CFLAGS += -DMICROPY_PY_NETWORK=1 + +SRC_MOD += lib/netutils/netutils.c + +ifneq ($(MICROPY_PY_WIZNET5K),0) +WIZNET5K_DIR=drivers/wiznet5k +INC += -I$(TOP)/$(WIZNET5K_DIR) +CFLAGS_MOD += -DMICROPY_PY_WIZNET5K=$(MICROPY_PY_WIZNET5K) -D_WIZCHIP_=$(MICROPY_PY_WIZNET5K) +SRC_MOD += $(addprefix $(WIZNET5K_DIR)/,\ + ethernet/w$(MICROPY_PY_WIZNET5K)/w$(MICROPY_PY_WIZNET5K).c \ + ethernet/wizchip_conf.c \ + ethernet/socket.c \ + internet/dns/dns.c \ + internet/dhcp/dhcp.c \ + ) + +endif # MICROPY_PY_WIZNET5K +endif # CIRCUITPY_NETWORK + +ifeq ($(CIRCUITPY_NETWORK),1) +ifneq ($(MICROPY_PY_WIZNET5K),0) +SRC_SHARED_MODULE += wiznet/__init__.c wiznet/wiznet5k.c +endif +endif + +# TODO +#ifeq ($(CIRCUITPY_AUDIOBUSIO),1) +#SRC_C += peripherals/samd/i2s.c peripherals/samd/$(CHIP_FAMILY)/i2s.c +#endif +# +SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ + $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ + $(addprefix common-hal/, $(SRC_COMMON_HAL)) + +SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL)) + +SRC_S = \ + sdk/devices/$(CHIP_FAMILY)/gcc/startup_$(CHIP_FAMILY).S \ + supervisor/cpu.S + +OBJ = $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_SDK:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o)) +ifeq ($(INTERNAL_LIBM),1) +OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) +endif +OBJ += $(addprefix $(BUILD)/, $(SRC_S:.S=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) + +SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) + +all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 + +$(BUILD)/firmware.elf: $(LD_FILE) $(OBJ) + $(STEPECHO) "LINK $@" + $(Q)$(CC) -o $@ $(LDFLAGS) $(filter-out $<,$^) -Wl,--start-group $(LIBS) -Wl,--end-group + +$(BUILD)/firmware.bin: $(BUILD)/firmware.elf + $(STEPECHO) "Create $@" + $(Q)$(OBJCOPY) -O binary -j .interrupts -j .text -j .ARM.exidx -j .data $^ $@ + +$(BUILD)/firmware.uf2: $(BUILD)/firmware.bin + $(STEPECHO) "Create $@" + $(Q)$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -b $(BOOTLOADER_SIZE) -f MIMXRT10XX -c -o $@ $^ + +include $(TOP)/py/mkrules.mk + +# Print out the value of a make variable. +# https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile +print-%: + @echo $* = $($*) diff --git a/ports/mimxrt10xx/README.md b/ports/mimxrt10xx/README.md new file mode 100644 index 0000000000..fe7fd5ea69 --- /dev/null +++ b/ports/mimxrt10xx/README.md @@ -0,0 +1,3 @@ +# CircuitPython Port To The NXP i.MX RT10xx Series + +This is a port of CircuitPython to the i.MX RT10xx series of chips. diff --git a/ports/mimxrt10xx/background.c b/ports/mimxrt10xx/background.c new file mode 100644 index 0000000000..8c7333cf8b --- /dev/null +++ b/ports/mimxrt10xx/background.c @@ -0,0 +1,82 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "background.h" + +//#include "audio_dma.h" +#include "tick.h" +#include "supervisor/filesystem.h" +#include "supervisor/shared/tick.h" +#include "supervisor/usb.h" + +#include "py/runtime.h" +#include "shared-module/network/__init__.h" +#include "supervisor/shared/stack.h" + +// TODO +#ifdef CIRCUITPY_DISPLAYIO +//#include "shared-module/displayio/__init__.h" +#endif + +volatile uint64_t last_finished_tick = 0; + +bool stack_ok_so_far = true; + +static bool running_background_tasks = false; + +void background_tasks_reset(void) { + running_background_tasks = false; +} + +void run_background_tasks(void) { + // Don't call ourselves recursively. + if (running_background_tasks) { + return; + } + assert_heap_ok(); + running_background_tasks = true; + + #if CIRCUITPY_AUDIOIO || CIRCUITPY_AUDIOBUSIO + audio_dma_background(); + #endif + #if CIRCUITPY_DISPLAYIO + displayio_background(); + #endif + + #if CIRCUITPY_NETWORK + network_module_background(); + #endif + filesystem_background(); + usb_background(); + running_background_tasks = false; + assert_heap_ok(); + + last_finished_tick = supervisor_ticks_ms64(); +} + +bool background_tasks_ok(void) { + return supervisor_ticks_ms64() - last_finished_tick < 1000; +} diff --git a/ports/mimxrt10xx/background.h b/ports/mimxrt10xx/background.h new file mode 100644 index 0000000000..52789d0389 --- /dev/null +++ b/ports/mimxrt10xx/background.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_BACKGROUND_H +#define MICROPY_INCLUDED_MIMXRT10XX_BACKGROUND_H + +#include + +void background_tasks_reset(void); +void run_background_tasks(void); +void run_background_vm_tasks(void); +bool background_tasks_ok(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_BACKGROUND_H diff --git a/ports/mimxrt10xx/boards/board.h b/ports/mimxrt10xx/boards/board.h new file mode 100644 index 0000000000..92d02d900e --- /dev/null +++ b/ports/mimxrt10xx/boards/board.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// This file defines board specific functions. + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_BOARDS_BOARD_H +#define MICROPY_INCLUDED_MIMXRT10XX_BOARDS_BOARD_H + +#include + +#include "py/mpconfig.h" +#include "fsl_common.h" + +// Initializes board related state once on start up. +void board_init(void); + +// Returns true if the user initiates safe mode in a board specific way. +// Also add BOARD_USER_SAFE_MODE in mpconfigboard.h to explain the board specific +// way. +bool board_requests_safe_mode(void); + +// Reset the state of off MCU components such as neopixels. +void reset_board(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_BOARDS_BOARD_H diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c b/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c new file mode 100644 index 0000000000..8e73df4ad4 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "fsl_iomuxc.h" + +void board_init(void) { + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1,1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 1U); + + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B,0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 0x10E1U); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h new file mode 100644 index 0000000000..98d1f478bf --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h @@ -0,0 +1,31 @@ +#define MICROPY_HW_BOARD_NAME "Feather MIMXRT1011" +#define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A" + +//TODO +//#define MICROPY_HW_LED_STATUS (&pin_PA27) + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO_SD_05) + +// These are pins not to reset. +// QSPI Data pins +//#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 ) +// QSPI CS, and QSPI SCK +//#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 ) +//#define MICROPY_PORT_C ( 0 ) +//#define MICROPY_PORT_D ( 0 ) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (8 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_10) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_09) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_AD_06) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_04) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_03) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_01) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_02) diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk new file mode 100644 index 0000000000..6efd3f329a --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk @@ -0,0 +1,21 @@ +LD_FILE = boards/mimxrt1011-bootloader-external-flash.ld +USB_VID = 0x239A +USB_PID = 0x8074 +USB_PRODUCT = "Feather MIMXRT1011" +USB_MANUFACTURER = "arturo182" +USB_DEVICES = "CDC,MSC,HID" + +CHIP_VARIANT = MIMXRT1011DAE5A +CHIP_FAMILY = MIMXRT1011 + +INTERNAL_FLASH_FILESYSTEM = 1 + +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_NVM = 0 +CIRCUITPY_ROTARYIO = 0 + +LONGINT_IMPL = MPZ diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/pins.c b/ports/mimxrt10xx/boards/feather_mimxrt1011/pins.c new file mode 100644 index 0000000000..2c6c1ce93e --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/pins.c @@ -0,0 +1,52 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + // Analog + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_07) }, + + // Digital + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_05) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_AD_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_AD_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_AD_04) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_01) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_10) }, + + // ESP control + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_CS), MP_ROM_PTR(&pin_GPIO_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_GPIO0), MP_ROM_PTR(&pin_GPIO_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_BUSY), MP_ROM_PTR(&pin_GPIO_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RESET), MP_ROM_PTR(&pin_GPIO_AD_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_TX), MP_ROM_PTR(&pin_GPIO_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RX), MP_ROM_PTR(&pin_GPIO_11) }, + //{ MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RTS), MP_ROM_PTR(&pin_) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO_SD_05) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c b/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c new file mode 100644 index 0000000000..979dd82ce8 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "fsl_iomuxc.h" + +void board_init(void) { + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK,1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, 1U); + + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B,0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, 0x10E1U); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h new file mode 100644 index 0000000000..b91209c82a --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h @@ -0,0 +1,31 @@ +#define MICROPY_HW_BOARD_NAME "Feather MIMXRT1062" +#define MICROPY_HW_MCU_NAME "IMXRT1062DVJ6A" + +//TODO +//#define MICROPY_HW_LED_STATUS (&pin_PA27) + +//#define MICROPY_HW_NEOPIXEL (&pin_PB22) + +// These are pins not to reset. +// QSPI Data pins +//#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 ) +// QSPI CS, and QSPI SCK +//#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 ) +//#define MICROPY_PORT_C ( 0 ) +//#define MICROPY_PORT_D ( 0 ) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (8 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_EMC_22) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_EMC_21) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_B1_07) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_B1_06) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_B1_05) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_B1_03) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_B1_02) diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk new file mode 100644 index 0000000000..b2e356e558 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk @@ -0,0 +1,21 @@ +LD_FILE = boards/mimxrt1062-bootloader-external-flash.ld +USB_VID = 0x239A +USB_PID = 0x8076 +USB_PRODUCT = "Feather MIMXRT1062" +USB_MANUFACTURER = "arturo182" +USB_DEVICES = "CDC,MSC,HID" + +CHIP_VARIANT = MIMXRT1062DVJ6A +CHIP_FAMILY = MIMXRT1062 + +INTERNAL_FLASH_FILESYSTEM = 1 + +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_NVM = 0 +CIRCUITPY_ROTARYIO = 0 + +LONGINT_IMPL = MPZ diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/pins.c b/ports/mimxrt10xx/boards/feather_mimxrt1062/pins.c new file mode 100644 index 0000000000..eb287b87aa --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/pins.c @@ -0,0 +1,45 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + // Analog + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B0_14) }, + + // Digital + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_EMC_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_EMC_28) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_EMC_29) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_EMC_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_EMC_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_EMC_23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_EMC_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_B1_08) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_B1_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_B1_06) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_B1_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_B1_03) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_EMC_21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_EMC_22) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO_SD_B1_01) }, + + // TODO: Big connector + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/board.c b/ports/mimxrt10xx/boards/imxrt1010_evk/board.c new file mode 100644 index 0000000000..8e73df4ad4 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/board.c @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "fsl_iomuxc.h" + +void board_init(void) { + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1,1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 1U); + + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B,0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 0x10E1U); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h new file mode 100644 index 0000000000..12cb5e8a86 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h @@ -0,0 +1,31 @@ +#define MICROPY_HW_BOARD_NAME "IMXRT1010-EVK" +#define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A" + +//TODO +//#define MICROPY_HW_LED_STATUS (&pin_PA27) + +//#define MICROPY_HW_NEOPIXEL (&pin_PB22) + +// These are pins not to reset. +// QSPI Data pins +//#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 ) +// QSPI CS, and QSPI SCK +//#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 ) +//#define MICROPY_PORT_C ( 0 ) +//#define MICROPY_PORT_D ( 0 ) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (16 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_02) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_01) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_AD_06) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_04) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_03) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_09) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_10) diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk new file mode 100644 index 0000000000..4401647c44 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk @@ -0,0 +1,22 @@ +LD_FILE = boards/mimxrt1011-bootloader-external-flash.ld +USB_VID = 0x239A +USB_PID = 0x8078 +USB_PRODUCT = "IMXRT1010-EVK" +USB_MANUFACTURER = "NXP" +USB_DEVICES = "CDC,MSC,HID" + +CHIP_VARIANT = MIMXRT1011DAE5A +CHIP_FAMILY = MIMXRT1011 + +INTERNAL_FLASH_FILESYSTEM = 1 + +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_NEOPIXEL_WRITE = 0 +CIRCUITPY_NVM = 0 +CIRCUITPY_ROTARYIO = 0 + +LONGINT_IMPL = MPZ diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c b/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c new file mode 100644 index 0000000000..cfc8763694 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c @@ -0,0 +1,37 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_AD_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_AD_06) }, + //{ MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_08) }, // Connected to audio codec + //{ MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_01) }, // Connected to audio codec + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_AD_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_AD_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_SD_02) }, + //{ MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_03) }, // Connected to audio codec + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_AD_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_AD_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_AD_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_AD_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_02) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_02) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_USR_LED), MP_ROM_PTR(&pin_GPIO_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_USR_SW), MP_ROM_PTR(&pin_GPIO_SD_05) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld b/ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld new file mode 100644 index 0000000000..d36ee12396 --- /dev/null +++ b/ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld @@ -0,0 +1,106 @@ +ENTRY(Reset_Handler) + +_minimum_stack_size = 64K; +_minimum_heap_size = 0; + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x60000000, LENGTH = 8M + FLASH_BOOTLOADER (rx) : ORIGIN = 0x60000000, LENGTH = 48K + FLASH_ISR (rx) : ORIGIN = 0x6000C000, LENGTH = 1K + FLASH_TEXT (rx) : ORIGIN = 0x6000C400, LENGTH = 975K + FLASH_FATFS (r) : ORIGIN = 0x60100000, LENGTH = 7M + RAM (rwx) : ORIGIN = 0x00000000, LENGTH = 32K + OCRAM (rwx) : ORIGIN = 0x20200000, LENGTH = 64K +} + +_estack = ORIGIN(OCRAM) + LENGTH(OCRAM); +_bootloader_dbl_tap = ORIGIN(RAM) + LENGTH(RAM) - 4; + +__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS); +__fatfs_flash_length = LENGTH(FLASH_FATFS); + +__RAM_VECTOR_TABLE_SIZE_BYTES = 0; + +SECTIONS +{ + .interrupts : + { + __VECTOR_TABLE = .; + __VECTOR_RAM = .; + + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > FLASH_ISR + + .text : + { + . = ALIGN(4); + *(EXCLUDE_FILE( + *flexspi_nor_flash_ops.o + *fsl_flexspi.o + ) .text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } > FLASH_TEXT + + .ARM.exidx : + { + *(.ARM.exidx*) + *(.gnu.linkonce.armexidx.*) + _etext = .; /* define a global symbol at end of code */ + __etext = .; /* define a global symbol at end of code */ + } > FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = .; + + .data : AT (_sidata) + { + . = ALIGN(4); + __data_start__ = .; /* create a global symbol at data start */ + + *(.data*) /* .data* sections */ + *flexspi_nor_flash_ops.o(.text*) + *fsl_flexspi.o(.text*) + . = ALIGN(4); + + __data_end__ = .; /* define a global symbol at data end */ + } > RAM + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + + *(.bss*) + *(COMMON) + + . = ALIGN(4); + __bss_end__ = .; + PROVIDE(end = .); + } > RAM + + .heap : + { + . = ALIGN(8); + _heap_start = .; /* define a global symbol at heap start */ + + . += _minimum_heap_size; + + __HeapLimit = .; + } > OCRAM + + .stack : + { + . = ALIGN(8); + . += _minimum_stack_size; + } > OCRAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + +ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data") +ASSERT(_estack - _minimum_stack_size >= __HeapLimit, "region OCRAM overflowed with stack and heap") diff --git a/ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld b/ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld new file mode 100644 index 0000000000..f1b0d85545 --- /dev/null +++ b/ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld @@ -0,0 +1,123 @@ +ENTRY(Reset_Handler) + +_minimum_stack_size = 64K; +_minimum_heap_size = 0; + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x60000000, LENGTH = 8M + FLASH_CONFIG (rx) : ORIGIN = 0x60000400, LENGTH = 3K + FLASH_IVT (rx) : ORIGIN = 0x60001000, LENGTH = 4K + FLASH_ISR (rx) : ORIGIN = 0x60002000, LENGTH = 1K + FLASH_TEXT (rx) : ORIGIN = 0x60002400, LENGTH = 1015K + FLASH_FATFS (r) : ORIGIN = 0x60100000, LENGTH = 7M + RAM (rwx) : ORIGIN = 0x00000000, LENGTH = 32K + OCRAM (rwx) : ORIGIN = 0x20200000, LENGTH = 64K +} + +_estack = ORIGIN(OCRAM) + LENGTH(OCRAM); +_bootloader_dbl_tap = 0; + +__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS); +__fatfs_flash_length = LENGTH(FLASH_FATFS); + +__RAM_VECTOR_TABLE_SIZE_BYTES = 0; + +SECTIONS +{ + .flash_config : + { + . = ALIGN(4); + KEEP(* (.boot_hdr.conf)) + . = ALIGN(4); + } > FLASH_CONFIG + + .ivt : + { + . = ALIGN(4); + KEEP(* (.boot_hdr.ivt)) + KEEP(* (.boot_hdr.boot_data)) + KEEP(* (.boot_hdr.dcd_data)) + . = ALIGN(4); + } > FLASH_IVT + + .interrupts : + { + __VECTOR_TABLE = .; + __VECTOR_RAM = .; + + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > FLASH_ISR + + .text : + { + . = ALIGN(4); + *(EXCLUDE_FILE( + *flexspi_nor_flash_ops.o + *fsl_flexspi.o + ) .text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } > FLASH_TEXT + + .ARM.exidx : + { + *(.ARM.exidx*) + *(.gnu.linkonce.armexidx.*) + _etext = .; /* define a global symbol at end of code */ + __etext = .; /* define a global symbol at end of code */ + } > FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = .; + + .data : AT (_sidata) + { + . = ALIGN(4); + __data_start__ = .; /* create a global symbol at data start */ + + *(.data*) /* .data* sections */ + *flexspi_nor_flash_ops.o(.text*) + *fsl_flexspi.o(.text*) + . = ALIGN(4); + + __data_end__ = .; /* define a global symbol at data end */ + } > RAM + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + + *(.bss*) + *(COMMON) + + . = ALIGN(4); + __bss_end__ = .; + PROVIDE(end = .); + } > RAM + + .heap : + { + . = ALIGN(8); + _heap_start = .; /* define a global symbol at heap start */ + + . += _minimum_heap_size; + + __HeapLimit = .; + } > OCRAM + + .stack : + { + . = ALIGN(8); + . += _minimum_stack_size; + } > OCRAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + +ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data") +ASSERT(_estack - _minimum_stack_size >= __HeapLimit, "region OCRAM overflowed with stack and heap") diff --git a/ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld b/ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld new file mode 100644 index 0000000000..16442607f3 --- /dev/null +++ b/ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld @@ -0,0 +1,106 @@ +ENTRY(Reset_Handler) + +_minimum_stack_size = 64K; +_minimum_heap_size = 0; + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x60000000, LENGTH = 8M + FLASH_BOOTLOADER (rx) : ORIGIN = 0x60000000, LENGTH = 48K + FLASH_ISR (rx) : ORIGIN = 0x6000C000, LENGTH = 1K + FLASH_TEXT (rx) : ORIGIN = 0x6000C400, LENGTH = 975K + FLASH_FATFS (r) : ORIGIN = 0x60100000, LENGTH = 7M + RAM (rwx) : ORIGIN = 0x00000000, LENGTH = 128K + OCRAM (rwx) : ORIGIN = 0x20200000, LENGTH = 768K +} + +_estack = ORIGIN(OCRAM) + LENGTH(OCRAM); +_bootloader_dbl_tap = ORIGIN(RAM) + LENGTH(RAM) - 4; + +__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS); +__fatfs_flash_length = LENGTH(FLASH_FATFS); + +__RAM_VECTOR_TABLE_SIZE_BYTES = 0; + +SECTIONS +{ + .interrupts : + { + __VECTOR_TABLE = .; + __VECTOR_RAM = .; + + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > FLASH_ISR + + .text : + { + . = ALIGN(4); + *(EXCLUDE_FILE( + *flexspi_nor_flash_ops.o + *fsl_flexspi.o + ) .text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } > FLASH_TEXT + + .ARM.exidx : + { + *(.ARM.exidx*) + *(.gnu.linkonce.armexidx.*) + _etext = .; /* define a global symbol at end of code */ + __etext = .; /* define a global symbol at end of code */ + } > FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = .; + + .data : AT (_sidata) + { + . = ALIGN(4); + __data_start__ = .; /* create a global symbol at data start */ + + *(.data*) /* .data* sections */ + *flexspi_nor_flash_ops.o(.text*) + *fsl_flexspi.o(.text*) + . = ALIGN(4); + + __data_end__ = .; /* define a global symbol at data end */ + } > RAM + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + + *(.bss*) + *(COMMON) + + . = ALIGN(4); + __bss_end__ = .; + PROVIDE(end = .); + } > RAM + + .heap : + { + . = ALIGN(8); + _heap_start = .; /* define a global symbol at heap start */ + + . += _minimum_heap_size; + + __HeapLimit = .; + } > OCRAM + + .stack : + { + . = ALIGN(8); + . += _minimum_stack_size; + } > OCRAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + +ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data") +ASSERT(_estack - _minimum_stack_size >= __HeapLimit, "region OCRAM overflowed with stack and heap") diff --git a/ports/mimxrt10xx/common-hal/analogio/AnalogIn.c b/ports/mimxrt10xx/common-hal/analogio/AnalogIn.c new file mode 100644 index 0000000000..d714001f33 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/AnalogIn.c @@ -0,0 +1,88 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/analogio/AnalogIn.h" + +#include + +#include "py/runtime.h" + +#include "fsl_adc.h" + +#define ADC_CHANNEL_GROUP 0 + +void common_hal_analogio_analogin_construct(analogio_analogin_obj_t* self, + const mcu_pin_obj_t *pin) { + adc_config_t config = {0}; + + if (pin->adc == NULL) { + mp_raise_ValueError(translate("Pin does not have ADC capabilities")); + } + + ADC_GetDefaultConfig(&config); + + config.enableLongSample = true; + config.samplePeriodMode = kADC_SamplePeriod8or24Clocks; + + ADC_Init(pin->adc, &config); + ADC_SetHardwareAverageConfig(pin->adc, kADC_HardwareAverageCount32); + ADC_DoAutoCalibration(pin->adc); + + claim_pin(pin); + + self->pin = pin; +} + +bool common_hal_analogio_analogin_deinited(analogio_analogin_obj_t *self) { + return self->pin == mp_const_none; +} + +void common_hal_analogio_analogin_deinit(analogio_analogin_obj_t *self) { + if (common_hal_analogio_analogin_deinited(self)) { + return; + } + reset_pin_number(self->pin->number); + self->pin = mp_const_none; +} + +uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { + adc_channel_config_t config = { 0 }; + config.channelNumber = self->pin->adc_channel; + + ADC_SetChannelConfig(self->pin->adc, ADC_CHANNEL_GROUP, &config); + + while (!ADC_GetChannelStatusFlags(self->pin->adc, ADC_CHANNEL_GROUP)) { + + } + + // Shift the value to be 16 bit + return ADC_GetChannelConversionValue(self->pin->adc, ADC_CHANNEL_GROUP) << 4; +} + +float common_hal_analogio_analogin_get_reference_voltage(analogio_analogin_obj_t *self) { + return 3.3f; +} diff --git a/ports/mimxrt10xx/common-hal/analogio/AnalogIn.h b/ports/mimxrt10xx/common-hal/analogio/AnalogIn.h new file mode 100644 index 0000000000..c252ab5535 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/AnalogIn.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGIN_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGIN_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; +} analogio_analogin_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGIN_H diff --git a/ports/mimxrt10xx/common-hal/analogio/AnalogOut.c b/ports/mimxrt10xx/common-hal/analogio/AnalogOut.c new file mode 100644 index 0000000000..3d072627a4 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/AnalogOut.c @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" + +#include "shared-bindings/analogio/AnalogOut.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/translate.h" + +void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, const mcu_pin_obj_t *pin) { + mp_raise_NotImplementedError(translate("AnalogOut functionality not supported")); +} + +bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { + return true; +} + +void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { +} + +void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, uint16_t value) { +} diff --git a/ports/mimxrt10xx/common-hal/analogio/AnalogOut.h b/ports/mimxrt10xx/common-hal/analogio/AnalogOut.h new file mode 100644 index 0000000000..133cce8fb5 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/AnalogOut.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGOUT_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; +} analogio_analogout_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGOUT_H diff --git a/ports/mimxrt10xx/common-hal/analogio/__init__.c b/ports/mimxrt10xx/common-hal/analogio/__init__.c new file mode 100644 index 0000000000..eea58c77d6 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/__init__.c @@ -0,0 +1 @@ +// No analogio module functions. diff --git a/ports/mimxrt10xx/common-hal/board/__init__.c b/ports/mimxrt10xx/common-hal/board/__init__.c new file mode 100644 index 0000000000..e86251480e --- /dev/null +++ b/ports/mimxrt10xx/common-hal/board/__init__.c @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "py/mphal.h" +#include "common-hal/microcontroller/Pin.h" + +// Pins aren't actually defined here. They are in the board specific directory +// such as boards/imxrt1010_evk/pins.c. diff --git a/ports/mimxrt10xx/common-hal/busio/I2C.c b/ports/mimxrt10xx/common-hal/busio/I2C.c new file mode 100644 index 0000000000..3c555df451 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/I2C.c @@ -0,0 +1,192 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "shared-bindings/busio/I2C.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "periph.h" + +#include "fsl_lpi2c.h" + +//TODO + +#define I2C_CLOCK_SOURCE_DIVIDER (5U) +#define I2C_CLOCK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8 / (I2C_CLOCK_SOURCE_DIVIDER + 1U)) + +static void config_periph_pin(const mcu_periph_obj_t *periph) { + IOMUXC_SetPinMux( + periph->pin->mux_reg, periph->mux_mode, + periph->input_reg, periph->input_idx, + 0, + 1); + + IOMUXC_SetPinConfig(0, 0, 0, 0, + periph->pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_HYS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUS(3) + | IOMUXC_SW_PAD_CTL_PAD_PUE(0) + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) + | IOMUXC_SW_PAD_CTL_PAD_ODE(1) + | IOMUXC_SW_PAD_CTL_PAD_SPEED(2) + | IOMUXC_SW_PAD_CTL_PAD_DSE(4) + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); +} + +void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, + const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, uint32_t frequency, uint32_t timeout) { + + const uint32_t sda_count = sizeof(mcu_i2c_sda_list) / sizeof(mcu_periph_obj_t); + const uint32_t scl_count = sizeof(mcu_i2c_scl_list) / sizeof(mcu_periph_obj_t); + + for (uint32_t i = 0; i < sda_count; ++i) { + if (mcu_i2c_sda_list[i].pin != sda) + continue; + + for (uint32_t j = 0; j < scl_count; ++j) { + if (mcu_i2c_scl_list[j].pin != scl) + continue; + + if (mcu_i2c_scl_list[j].bank_idx != mcu_i2c_sda_list[i].bank_idx) + continue; + + self->sda_pin = &mcu_i2c_sda_list[i]; + self->scl_pin = &mcu_i2c_scl_list[j]; + + break; + } + } + + if(self->sda_pin == NULL || self->scl_pin == NULL) { + mp_raise_RuntimeError(translate("Invalid I2C pin selection")); + } else { + self->i2c = mcu_i2c_banks[self->sda_pin->bank_idx - 1]; + } + + config_periph_pin(self->sda_pin); + config_periph_pin(self->scl_pin); + + lpi2c_master_config_t config = { 0 }; + LPI2C_MasterGetDefaultConfig(&config); + + config.baudRate_Hz = frequency; + + LPI2C_MasterInit(self->i2c, &config, I2C_CLOCK_FREQ); + +// if (!gpio_get_pin_level(sda->number) || !gpio_get_pin_level(scl->number)) { +// reset_pin_number(sda->number); +// reset_pin_number(scl->number); +// mp_raise_RuntimeError(translate("SDA or SCL needs a pull up")); +// } + + claim_pin(self->sda_pin->pin); + claim_pin(self->scl_pin->pin); +} + +bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) { + return self->sda_pin == NULL; +} + +void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { + if (common_hal_busio_i2c_deinited(self)) { + return; + } + + LPI2C_MasterDeinit(self->i2c); + +// reset_pin_number(self->sda_pin); +// reset_pin_number(self->scl_pin); + + self->sda_pin = NULL; + self->scl_pin = NULL; +} + +bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) { + lpi2c_master_transfer_t xfer = { 0 }; + xfer.slaveAddress = addr; + + return LPI2C_MasterTransferBlocking(self->i2c, &xfer) == kStatus_Success; +} + +bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) { + bool grabbed_lock = false; +// CRITICAL_SECTION_ENTER() + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } +// CRITICAL_SECTION_LEAVE(); + return grabbed_lock; +} + +bool common_hal_busio_i2c_has_lock(busio_i2c_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) { + self->has_lock = false; +} + +uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, + const uint8_t *data, size_t len, bool transmit_stop_bit) { + + lpi2c_master_transfer_t xfer = { 0 }; + xfer.flags = transmit_stop_bit ? kLPI2C_TransferDefaultFlag : kLPI2C_TransferNoStopFlag; + xfer.slaveAddress = addr; + xfer.data = (uint8_t*)data; + xfer.dataSize = len; + + const status_t status = LPI2C_MasterTransferBlocking(self->i2c, &xfer); + if (status == kStatus_Success) + return 0; + + return MP_EIO; +} + +uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, + uint8_t *data, size_t len) { + + lpi2c_master_transfer_t xfer = { 0 }; + xfer.direction = kLPI2C_Read; + xfer.slaveAddress = addr; + xfer.data = data; + xfer.dataSize = len; + + const status_t status = LPI2C_MasterTransferBlocking(self->i2c, &xfer); + if (status == kStatus_Success) + return 0; + + return MP_EIO; +} + +void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { +// never_reset_sercom(self->i2c_desc.device.hw); +// +// never_reset_pin_number(self->scl_pin); +// never_reset_pin_number(self->sda_pin); +} diff --git a/ports/mimxrt10xx/common-hal/busio/I2C.h b/ports/mimxrt10xx/common-hal/busio/I2C.h new file mode 100644 index 0000000000..924e108116 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/I2C.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_I2C_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_I2C_H + +#include "common-hal/microcontroller/Pin.h" +#include "fsl_common.h" +#include "periph.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + LPI2C_Type *i2c; + bool has_lock; + const mcu_periph_obj_t *scl_pin; + const mcu_periph_obj_t *sda_pin; +} busio_i2c_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_I2C_H diff --git a/ports/mimxrt10xx/common-hal/busio/OneWire.h b/ports/mimxrt10xx/common-hal/busio/OneWire.h new file mode 100644 index 0000000000..bb4bc016a4 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/OneWire.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_ONEWIRE_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_ONEWIRE_H + +// Use bitbangio. +#include "shared-module/busio/OneWire.h" + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_ONEWIRE_H diff --git a/ports/mimxrt10xx/common-hal/busio/SPI.c b/ports/mimxrt10xx/common-hal/busio/SPI.c new file mode 100644 index 0000000000..5ff94bcf89 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/SPI.c @@ -0,0 +1,318 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//TODO +#include "shared-bindings/busio/SPI.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "periph.h" + +#include "fsl_lpspi.h" + +#include + +//bool never_reset_sercoms[SERCOM_INST_NUM]; +// +//void never_reset_sercom(Sercom* sercom) { +// // Reset all SERCOMs except the ones being used by on-board devices. +// Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; +// for (int i = 0; i < SERCOM_INST_NUM; i++) { +// if (sercom_instances[i] == sercom) { +// never_reset_sercoms[i] = true; +// break; +// } +// } +//} +// +//void allow_reset_sercom(Sercom* sercom) { +// // Reset all SERCOMs except the ones being used by on-board devices. +// Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; +// for (int i = 0; i < SERCOM_INST_NUM; i++) { +// if (sercom_instances[i] == sercom) { +// never_reset_sercoms[i] = false; +// break; +// } +// } +//} +// +//void reset_sercoms(void) { +// // Reset all SERCOMs except the ones being used by on-board devices. +// Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; +// for (int i = 0; i < SERCOM_INST_NUM; i++) { +// if (never_reset_sercoms[i]) { +// continue; +// } +// #ifdef MICROPY_HW_APA102_SERCOM +// if (sercom_instances[i] == MICROPY_HW_APA102_SERCOM) { +// continue; +// } +// #endif +// // SWRST is same for all modes of SERCOMs. +// sercom_instances[i]->SPI.CTRLA.bit.SWRST = 1; +// } +//} + +static void config_periph_pin(const mcu_periph_obj_t *periph) { + IOMUXC_SetPinMux( + periph->pin->mux_reg, periph->mux_mode, + periph->input_reg, periph->input_idx, + 0, + 0); + + IOMUXC_SetPinConfig(0, 0, 0, 0, + periph->pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_HYS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUE(0) + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) + | IOMUXC_SW_PAD_CTL_PAD_ODE(0) + | IOMUXC_SW_PAD_CTL_PAD_SPEED(2) + | IOMUXC_SW_PAD_CTL_PAD_DSE(4) + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); +} + +#define LPSPI_CLOCK_SOURCE_DIVIDER (7U) +#define LPSPI_MASTER_CLK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk) / (LPSPI_CLOCK_SOURCE_DIVIDER + 1U)) + +void common_hal_busio_spi_construct(busio_spi_obj_t *self, + const mcu_pin_obj_t *clock, const mcu_pin_obj_t *mosi, + const mcu_pin_obj_t *miso) { + + // TODO: Allow none mosi or miso + + const uint32_t sck_count = sizeof(mcu_spi_sck_list) / sizeof(mcu_periph_obj_t); + const uint32_t miso_count = sizeof(mcu_spi_miso_list) / sizeof(mcu_periph_obj_t); + const uint32_t mosi_count = sizeof(mcu_spi_mosi_list) / sizeof(mcu_periph_obj_t); + + for (uint32_t i = 0; i < sck_count; ++i) { + if (mcu_spi_sck_list[i].pin != clock) + continue; + + for (uint32_t j = 0; j < miso_count; ++j) { + if (mcu_spi_miso_list[j].pin != miso) + continue; + + if (mcu_spi_miso_list[j].bank_idx != mcu_spi_sck_list[i].bank_idx) + continue; + + for (uint32_t k = 0; k < mosi_count; ++k) { + if (mcu_spi_mosi_list[k].pin != mosi) + continue; + + if (mcu_spi_mosi_list[k].bank_idx != mcu_spi_miso_list[j].bank_idx) + continue; + + self->clock_pin = &mcu_spi_sck_list[i]; + self->miso_pin = &mcu_spi_miso_list[j]; + self->mosi_pin = &mcu_spi_mosi_list[k]; + + break; + } + } + } + + if(self->clock_pin == NULL || self->mosi_pin == NULL || self->miso_pin == NULL) { + mp_raise_RuntimeError(translate("Invalid SPI pin selection")); + } else { + self->spi = mcu_spi_banks[self->clock_pin->bank_idx - 1]; + } + + config_periph_pin(self->mosi_pin); + config_periph_pin(self->miso_pin); + config_periph_pin(self->clock_pin); + + lpspi_master_config_t config = { 0 }; + LPSPI_MasterGetDefaultConfig(&config); + + // Always start at 250khz which is what SD cards need. They are sensitive to + // SPI bus noise before they are put into SPI mode. + config.baudRate = 250000; + + LPSPI_MasterInit(self->spi, &config, LPSPI_MASTER_CLK_FREQ); + + LPSPI_Enable(self->spi, false); + uint32_t tcrPrescaleValue; + self->baudrate = LPSPI_MasterSetBaudRate(self->spi, config.baudRate, LPSPI_MASTER_CLK_FREQ, &tcrPrescaleValue); + LPSPI_Enable(self->spi, true); + + claim_pin(self->clock_pin->pin); + +// if (mosi_none) { +// self->MOSI_pin = NO_PIN; +// } else { +// gpio_set_pin_direction(mosi->number, GPIO_DIRECTION_OUT); +// gpio_set_pin_pull_mode(mosi->number, GPIO_PULL_OFF); +// gpio_set_pin_function(mosi->number, mosi_pinmux); +// self->MOSI_pin = mosi->number; + claim_pin(self->mosi_pin->pin); +// } + +// if (miso_none) { +// self->MISO_pin = NO_PIN; +// } else { +// gpio_set_pin_direction(miso->number, GPIO_DIRECTION_IN); +// gpio_set_pin_pull_mode(miso->number, GPIO_PULL_OFF); +// gpio_set_pin_function(miso->number, miso_pinmux); +// self->MISO_pin = miso->number; + claim_pin(self->miso_pin->pin); +// } +} + +void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { +// never_reset_sercom(self->spi_desc.dev.prvt); + +// never_reset_pin_number(self->clock_pin); +// never_reset_pin_number(self->MOSI_pin); +// never_reset_pin_number(self->MISO_pin); +} + +bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { + return self->clock_pin == NULL; +} + +void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { + if (common_hal_busio_spi_deinited(self)) { + return; + } + +// allow_reset_sercom(self->spi_desc.dev.prvt); + +// spi_m_sync_disable(&self->spi_desc); +// spi_m_sync_deinit(&self->spi_desc); +// reset_pin_number(self->clock_pin); +// reset_pin_number(self->MOSI_pin); +// reset_pin_number(self->MISO_pin); + self->clock_pin = NULL; +} + +bool common_hal_busio_spi_configure(busio_spi_obj_t *self, + uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { + lpspi_master_config_t config = { 0 }; + LPSPI_MasterGetDefaultConfig(&config); + + config.baudRate = baudrate; + config.cpol = polarity; + config.cpha = phase; + config.bitsPerFrame = bits; + + LPSPI_Deinit(self->spi); + LPSPI_MasterInit(self->spi, &config, LPSPI_MASTER_CLK_FREQ); + + LPSPI_Enable(self->spi, false); + uint32_t tcrPrescaleValue; + self->baudrate = LPSPI_MasterSetBaudRate(self->spi, config.baudRate, LPSPI_MASTER_CLK_FREQ, &tcrPrescaleValue); + LPSPI_Enable(self->spi, true); + + return true; +} + +bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { + bool grabbed_lock = false; +// CRITICAL_SECTION_ENTER() + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } +// CRITICAL_SECTION_LEAVE(); + return grabbed_lock; +} + +bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { + self->has_lock = false; +} + +bool common_hal_busio_spi_write(busio_spi_obj_t *self, + const uint8_t *data, size_t len) { + if (len == 0) { + return true; + } + + lpspi_transfer_t xfer = { 0 }; + xfer.txData = (uint8_t*)data; + xfer.dataSize = len; + xfer.configFlags = kLPSPI_MasterPcs0; + + const status_t status = LPSPI_MasterTransferBlocking(self->spi, &xfer); + if (status != kStatus_Success) + printf("%s: status %ld\r\n", __func__, status); + + return (status == kStatus_Success); +} + +bool common_hal_busio_spi_read(busio_spi_obj_t *self, + uint8_t *data, size_t len, uint8_t write_value) { + if (len == 0) { + return true; + } + + LPSPI_SetDummyData(self->spi, write_value); + + lpspi_transfer_t xfer = { 0 }; + xfer.rxData = data; + xfer.dataSize = len; + + const status_t status = LPSPI_MasterTransferBlocking(self->spi, &xfer); + if (status != kStatus_Success) + printf("%s: status %ld\r\n", __func__, status); + + return (status == kStatus_Success); +} + +bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { + if (len == 0) { + return true; + } + + LPSPI_SetDummyData(self->spi, 0xFF); + + lpspi_transfer_t xfer = { 0 }; + xfer.txData = data_out; + xfer.rxData = data_in; + xfer.dataSize = len; + + const status_t status = LPSPI_MasterTransferBlocking(self->spi, &xfer); + if (status != kStatus_Success) + printf("%s: status %ld\r\n", __func__, status); + + return (status == kStatus_Success); +} + +uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { + return self->baudrate; +} + +uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { + return ((self->spi->TCR & LPSPI_TCR_CPHA_MASK) == LPSPI_TCR_CPHA_MASK); +} + +uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { + return ((self->spi->TCR & LPSPI_TCR_CPOL_MASK) == LPSPI_TCR_CPOL_MASK); +} diff --git a/ports/mimxrt10xx/common-hal/busio/SPI.h b/ports/mimxrt10xx/common-hal/busio/SPI.h new file mode 100644 index 0000000000..0895e1ddbc --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/SPI.h @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_SPI_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_SPI_H + +#include "common-hal/microcontroller/Pin.h" +#include "fsl_common.h" +#include "periph.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + LPSPI_Type *spi; + bool has_lock; + uint32_t baudrate; + const mcu_periph_obj_t *clock_pin; + const mcu_periph_obj_t *mosi_pin; + const mcu_periph_obj_t *miso_pin; +} busio_spi_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/mimxrt10xx/common-hal/busio/UART.c b/ports/mimxrt10xx/common-hal/busio/UART.c new file mode 100644 index 0000000000..a4819798bc --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/UART.c @@ -0,0 +1,252 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/busio/UART.h" + +#include "mpconfigport.h" +#include "lib/utils/interrupt_char.h" +#include "supervisor/shared/tick.h" +#include "py/gc.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "py/stream.h" +#include "periph.h" + +#include "fsl_lpuart.h" + +// TODO + +#define UART_CLOCK_FREQ (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U) + +static void config_periph_pin(const mcu_periph_obj_t *periph) { + IOMUXC_SetPinMux( + periph->pin->mux_reg, periph->mux_mode, + periph->input_reg, periph->input_idx, + 0, + 0); + + IOMUXC_SetPinConfig(0, 0, 0, 0, + periph->pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_HYS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUE(0) + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) + | IOMUXC_SW_PAD_CTL_PAD_ODE(0) + | IOMUXC_SW_PAD_CTL_PAD_SPEED(1) + | IOMUXC_SW_PAD_CTL_PAD_DSE(6) + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); +} + +void LPUART_UserCallback(LPUART_Type *base, lpuart_handle_t *handle, status_t status, void *user_data) +{ + busio_uart_obj_t *self = (busio_uart_obj_t*)user_data; + + if (status == kStatus_LPUART_RxIdle) { + self->rx_ongoing = false; + } +} + +void common_hal_busio_uart_construct(busio_uart_obj_t *self, + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, + uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, + uint16_t receiver_buffer_size) { + + // TODO: Allow none rx or tx + + bool have_tx = tx != mp_const_none; + bool have_rx = rx != mp_const_none; + if (!have_tx && !have_rx) { + mp_raise_ValueError(translate("tx and rx cannot both be None")); + } + + self->baudrate = baudrate; + self->character_bits = bits; + self->timeout_ms = timeout * 1000; + + const uint32_t rx_count = sizeof(mcu_uart_rx_list) / sizeof(mcu_periph_obj_t); + const uint32_t tx_count = sizeof(mcu_uart_tx_list) / sizeof(mcu_periph_obj_t); + + for (uint32_t i = 0; i < rx_count; ++i) { + if (mcu_uart_rx_list[i].pin != rx) + continue; + + for (uint32_t j = 0; j < tx_count; ++j) { + if (mcu_uart_tx_list[j].pin != tx) + continue; + + if (mcu_uart_tx_list[j].bank_idx != mcu_uart_rx_list[i].bank_idx) + continue; + + self->rx_pin = &mcu_uart_rx_list[i]; + self->tx_pin = &mcu_uart_tx_list[j]; + + break; + } + } + + if(self->rx_pin == NULL || self->tx_pin == NULL) { + mp_raise_RuntimeError(translate("Invalid UART pin selection")); + } else { + self->uart = mcu_uart_banks[self->tx_pin->bank_idx - 1]; + } + + config_periph_pin(self->rx_pin); + config_periph_pin(self->tx_pin); + + lpuart_config_t config = { 0 }; + LPUART_GetDefaultConfig(&config); + + config.dataBitsCount = self->character_bits == 8 ? kLPUART_EightDataBits : kLPUART_SevenDataBits; + config.baudRate_Bps = self->baudrate; + config.enableTx = self->tx_pin != NULL; + config.enableRx = self->rx_pin != NULL; + + LPUART_Init(self->uart, &config, UART_CLOCK_FREQ); + + claim_pin(self->tx_pin->pin); + + if (self->rx_pin != NULL) { + ringbuf_alloc(&self->rbuf, receiver_buffer_size, true); + + if (!self->rbuf.buf) { + LPUART_Deinit(self->uart); + mp_raise_msg(&mp_type_MemoryError, translate("Failed to allocate RX buffer")); + } + + LPUART_TransferCreateHandle(self->uart, &self->handle, LPUART_UserCallback, self); + LPUART_TransferStartRingBuffer(self->uart, &self->handle, self->rbuf.buf, self->rbuf.size); + + claim_pin(self->rx_pin->pin); + } +} + +bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { + return self->rx_pin == NULL && self->tx_pin == NULL; +} + +void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { + if (common_hal_busio_uart_deinited(self)) { + return; + } + + LPUART_Deinit(self->uart); + + gc_free(self->rbuf.buf); + self->rbuf.size = 0; + self->rbuf.iput = self->rbuf.iget = 0; + +// reset_pin_number(self->rx_pin); +// reset_pin_number(self->tx_pin); + + self->rx_pin = NULL; + self->tx_pin = NULL; +} + +// Read characters. +size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { + if (self->rx_pin == NULL) { + mp_raise_ValueError(translate("No RX pin")); + } + + if (len == 0) { + // Nothing to read. + return 0; + } + + lpuart_transfer_t xfer = { + .data = data, + .dataSize = len, + }; + + self->rx_ongoing = true; + LPUART_TransferReceiveNonBlocking(self->uart, &self->handle, &xfer, NULL); + + uint64_t start_ticks = supervisor_ticks_ms64(); + + // Wait for all bytes received or timeout + while (self->rx_ongoing && (supervisor_ticks_ms64() - start_ticks < self->timeout_ms) ) { + RUN_BACKGROUND_TASKS; + + // Allow user to break out of a timeout with a KeyboardInterrupt. + if (mp_hal_is_interrupted()) { + break; + } + } + + // if we timed out, stop the transfer + if (self->rx_ongoing) { + LPUART_TransferAbortReceive(self->uart, &self->handle); + } + + return len - self->handle.rxDataSize; +} + +// Write characters. +size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { + if (self->tx_pin == NULL) { + mp_raise_ValueError(translate("No TX pin")); + } + + LPUART_WriteBlocking(self->uart, data, len); + + return len; +} + +uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { + return self->baudrate; +} + +void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) { + if (LPUART_SetBaudRate(self->uart, baudrate, UART_CLOCK_FREQ) == kStatus_Success) { + self->baudrate = baudrate; + } +} + +mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self) { + return (mp_float_t) (self->timeout_ms / 1000.0f); +} + +void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeout) { + self->timeout_ms = timeout * 1000; +} + +uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { + return LPUART_TransferGetRxRingBufferLength(self->uart, &self->handle); +} + +void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { + self->handle.rxRingBufferHead = self->handle.rxRingBufferTail; +} + +bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { + if (self->tx_pin == NULL) { + return false; + } + + return LPUART_GetStatusFlags(self->uart) & kLPUART_TxDataRegEmptyFlag; +} diff --git a/ports/mimxrt10xx/common-hal/busio/UART.h b/ports/mimxrt10xx/common-hal/busio/UART.h new file mode 100644 index 0000000000..9e768db3c0 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/UART.h @@ -0,0 +1,54 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_UART_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_UART_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/ringbuf.h" +#include "py/obj.h" +#include "periph.h" + +#include "fsl_lpuart.h" + +typedef struct { + mp_obj_base_t base; + LPUART_Type *uart; + lpuart_handle_t handle; + ringbuf_t rbuf; + bool rx_ongoing; + uint32_t baudrate; + uint8_t character_bits; + uint32_t timeout_ms; + const mcu_periph_obj_t *rx_pin; + const mcu_periph_obj_t *tx_pin; + const mcu_periph_obj_t *cts_pin; + const mcu_periph_obj_t *rts_pin; +} busio_uart_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_UART_H diff --git a/ports/mimxrt10xx/common-hal/busio/__init__.c b/ports/mimxrt10xx/common-hal/busio/__init__.c new file mode 100644 index 0000000000..41761b6743 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/__init__.c @@ -0,0 +1 @@ +// No busio module functions. diff --git a/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c b/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c new file mode 100644 index 0000000000..d69a18d962 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c @@ -0,0 +1,170 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/runtime.h" +#include "py/mphal.h" + +#include "fsl_gpio.h" + +#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "supervisor/shared/translate.h" + +#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT5 5U + +void pin_config(const mcu_pin_obj_t *pin, bool open_drain, digitalio_pull_t pull) +{ + IOMUXC_SetPinConfig(0, 0, 0, 0, pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_HYS(1) + | IOMUXC_SW_PAD_CTL_PAD_PUS((pull == PULL_UP) ? 2 : 0) + | IOMUXC_SW_PAD_CTL_PAD_PUE(pull != PULL_NONE) + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) + | IOMUXC_SW_PAD_CTL_PAD_ODE(open_drain) + | IOMUXC_SW_PAD_CTL_PAD_SPEED(2) + | IOMUXC_SW_PAD_CTL_PAD_DSE(1) + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); +} + +digitalinout_result_t common_hal_digitalio_digitalinout_construct( + digitalio_digitalinout_obj_t* self, const mcu_pin_obj_t* pin) { + claim_pin(pin); + self->pin = pin; + self->output = false; + self->open_drain = false; + self->pull = PULL_NONE; + + // GPIO is always IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT5 until proven otherwise + IOMUXC_SetPinMux(pin->mux_reg, IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT5, 0, 0, 0, 0); + + pin_config(pin, self->open_drain, self->pull); + + const gpio_pin_config_t config = { kGPIO_DigitalInput, 0, kGPIO_NoIntmode }; + GPIO_PinInit(self->pin->gpio, self->pin->number, &config); + + return DIGITALINOUT_OK; +} + +void common_hal_digitalio_digitalinout_never_reset( + digitalio_digitalinout_obj_t *self) { + never_reset_pin_number(self->pin->number); +} + +bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t* self) { + return self->pin == mp_const_none; +} + +void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t* self) { + if (common_hal_digitalio_digitalinout_deinited(self)) { + return; + } + reset_pin_number(self->pin->number); + self->pin = mp_const_none; +} + +void common_hal_digitalio_digitalinout_switch_to_input( + digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { + self->output = false; + + // This also sets direction to input. + common_hal_digitalio_digitalinout_set_pull(self, pull); +} + +void common_hal_digitalio_digitalinout_switch_to_output( + digitalio_digitalinout_obj_t* self, bool value, + digitalio_drive_mode_t drive_mode) { + self->output = true; + self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; + self->pull = PULL_NONE; + + pin_config(self->pin, self->open_drain, self->pull); + + const gpio_pin_config_t config = { kGPIO_DigitalOutput, value, kGPIO_NoIntmode }; + GPIO_PinInit(self->pin->gpio, self->pin->number, &config); +} + +digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( + digitalio_digitalinout_obj_t* self) { + return self->output ? DIRECTION_OUTPUT : DIRECTION_INPUT; +} + +void common_hal_digitalio_digitalinout_set_value( + digitalio_digitalinout_obj_t* self, bool value) { + GPIO_PinWrite(self->pin->gpio, self->pin->number, value); +} + +bool common_hal_digitalio_digitalinout_get_value( + digitalio_digitalinout_obj_t* self) { + return GPIO_PinRead(self->pin->gpio, self->pin->number); +} + +void common_hal_digitalio_digitalinout_set_drive_mode( + digitalio_digitalinout_obj_t* self, + digitalio_drive_mode_t drive_mode) { + bool value = common_hal_digitalio_digitalinout_get_value(self); + self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; + + pin_config(self->pin, self->open_drain, self->pull); + + // True is implemented differently between modes so reset the value to make + // sure it's correct for the new mode. + if (value) { + common_hal_digitalio_digitalinout_set_value(self, value); + } +} + +digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( + digitalio_digitalinout_obj_t* self) { + if (self->open_drain) { + return DRIVE_MODE_OPEN_DRAIN; + } else { + return DRIVE_MODE_PUSH_PULL; + } +} + +void common_hal_digitalio_digitalinout_set_pull( + digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { + self->pull = pull; + + pin_config(self->pin, self->open_drain, self->pull); + + const gpio_pin_config_t config = { kGPIO_DigitalInput, 0, kGPIO_NoIntmode }; + GPIO_PinInit(self->pin->gpio, self->pin->number, &config); +} + +digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( + digitalio_digitalinout_obj_t* self) { + if (self->output) { + mp_raise_AttributeError(translate("Cannot get pull while in output mode")); + return PULL_NONE; + } else { + return self->pull; + } +} diff --git a/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.h b/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.h new file mode 100644 index 0000000000..4c19de20b6 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DIGITALIO_DIGITALINOUT_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DIGITALIO_DIGITALINOUT_H + +#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/digitalio/Pull.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; + bool output; + bool open_drain; + digitalio_pull_t pull; +} digitalio_digitalinout_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DIGITALIO_DIGITALINOUT_H diff --git a/ports/mimxrt10xx/common-hal/digitalio/__init__.c b/ports/mimxrt10xx/common-hal/digitalio/__init__.c new file mode 100644 index 0000000000..20fad45959 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/digitalio/__init__.c @@ -0,0 +1 @@ +// No digitalio module functions. diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Pin.c b/ports/mimxrt10xx/common-hal/microcontroller/Pin.c new file mode 100644 index 0000000000..04dd997393 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/Pin.c @@ -0,0 +1,226 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/rgb_led_status.h" + +#ifdef MICROPY_HW_NEOPIXEL +bool neopixel_in_use; +#endif +#ifdef MICROPY_HW_APA102_MOSI +bool apa102_sck_in_use; +bool apa102_mosi_in_use; +#endif +#ifdef SPEAKER_ENABLE_PIN +bool speaker_enable_in_use; +#endif + +//TODO + +#define PORT_COUNT (IOMUXC_SW_PAD_CTL_PAD_COUNT / 32 + 1) + +//STATIC uint32_t never_reset_pins[PORT_COUNT]; + +void reset_all_pins(void) { +// uint32_t pin_mask[PORT_COUNT] = PORT_OUT_IMPLEMENTED; + +// // Do not full reset USB lines. +// pin_mask[0] &= ~(PORT_PA24 | PORT_PA25); + +// // Do not reset SWD when a debugger is present. +// if (DSU->STATUSB.bit.DBGPRES == 1) { +// pin_mask[0] &= ~(PORT_PA30 | PORT_PA31); +// } + +// for (uint32_t i = 0; i < PORT_COUNT; i++) { +// pin_mask[i] &= ~never_reset_pins[i]; +// } + +// gpio_set_port_direction(GPIO_PORTA, pin_mask[0] & ~MICROPY_PORT_A, GPIO_DIRECTION_OFF); +// gpio_set_port_direction(GPIO_PORTB, pin_mask[1] & ~MICROPY_PORT_B, GPIO_DIRECTION_OFF); +// #if PORT_BITS > 64 +// gpio_set_port_direction(GPIO_PORTC, pin_mask[2] & ~MICROPY_PORT_C, GPIO_DIRECTION_OFF); +// #endif +// #if PORT_BITS > 96 +// gpio_set_port_direction(GPIO_PORTD, pin_mask[3] & ~MICROPY_PORT_D, GPIO_DIRECTION_OFF); +// #endif +// +// // Configure SWD. SWDIO will be automatically switched on PA31 when a signal is input on +// // SWCLK. +// #ifdef SAMD51 +// gpio_set_pin_function(PIN_PA30, MUX_PA30H_CM4_SWCLK); +// #endif +// #ifdef SAMD21 +// gpio_set_pin_function(PIN_PA30, GPIO_PIN_FUNCTION_G); +// gpio_set_pin_function(PIN_PA31, GPIO_PIN_FUNCTION_G); +// #endif +// + #ifdef MICROPY_HW_NEOPIXEL + neopixel_in_use = false; + #endif + #ifdef MICROPY_HW_APA102_MOSI + apa102_sck_in_use = false; + apa102_mosi_in_use = false; + #endif + + // After configuring SWD because it may be shared. + #ifdef SPEAKER_ENABLE_PIN + speaker_enable_in_use = false; +// gpio_set_pin_function(SPEAKER_ENABLE_PIN->number, GPIO_PIN_FUNCTION_OFF); +// gpio_set_pin_direction(SPEAKER_ENABLE_PIN->number, GPIO_DIRECTION_OUT); +// gpio_set_pin_level(SPEAKER_ENABLE_PIN->number, false); + #endif +} + +void never_reset_pin_number(uint8_t pin_number) { +// never_reset_pins[GPIO_PORT(pin_number)] |= 1 << GPIO_PIN(pin_number); +} + +void reset_pin_number(uint8_t pin_number) { + // never_reset_pins[GPIO_PORT(pin_number)] &= ~(1 << GPIO_PIN(pin_number)); + + if (pin_number >= IOMUXC_SW_PAD_CTL_PAD_COUNT) { + return; + } + + #ifdef MICROPY_HW_NEOPIXEL + if (pin_number == MICROPY_HW_NEOPIXEL->number) { + neopixel_in_use = false; + rgb_led_status_init(); + return; + } + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin_number == MICROPY_HW_APA102_MOSI->number || + pin_number == MICROPY_HW_APA102_SCK->number) { +// apa102_mosi_in_use = apa102_mosi_in_use && pin_number != MICROPY_HW_APA102_MOSI->number; +// apa102_sck_in_use = apa102_sck_in_use && pin_number != MICROPY_HW_APA102_SCK->number; + if (!apa102_sck_in_use && !apa102_mosi_in_use) { +// rgb_led_status_init(); + } + return; + } + #endif + +// if (pin_number == PIN_PA30 +// #ifdef SAMD51 +// ) { +// #endif +// #ifdef SAMD21 +// || pin_number == PIN_PA31) { +// #endif +// gpio_set_pin_function(pin_number, SWD_MUX); +// } else { +// gpio_set_pin_direction(pin_number, GPIO_DIRECTION_OFF); +// gpio_set_pin_function(pin_number, GPIO_PIN_FUNCTION_OFF); +// } +// + #ifdef SPEAKER_ENABLE_PIN + if (pin_number == SPEAKER_ENABLE_PIN->number) { + speaker_enable_in_use = false; +// gpio_set_pin_function(pin_number, GPIO_PIN_FUNCTION_OFF); +// gpio_set_pin_direction(SPEAKER_ENABLE_PIN->number, GPIO_DIRECTION_OUT); +// gpio_set_pin_level(SPEAKER_ENABLE_PIN->number, false); + } + #endif +} + +void claim_pin(const mcu_pin_obj_t* pin) { + #ifdef MICROPY_HW_NEOPIXEL + if (pin == MICROPY_HW_NEOPIXEL) { + neopixel_in_use = true; + } + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin == MICROPY_HW_APA102_MOSI) { + apa102_mosi_in_use = true; + } + if (pin == MICROPY_HW_APA102_SCK) { + apa102_sck_in_use = true; + } + #endif + + #ifdef SPEAKER_ENABLE_PIN + if (pin == SPEAKER_ENABLE_PIN) { + speaker_enable_in_use = true; + } + #endif +} + +bool pin_number_is_free(uint8_t pin_number) { +// PortGroup *const port = &PORT->Group[(enum gpio_port)GPIO_PORT(pin_number)]; +// uint8_t pin_index = GPIO_PIN(pin_number); +// volatile PORT_PINCFG_Type *state = &port->PINCFG[pin_index]; +// volatile PORT_PMUX_Type *pmux = &port->PMUX[pin_index / 2]; +// +// if (pin_number == PIN_PA30 || pin_number == PIN_PA31) { +// if (DSU->STATUSB.bit.DBGPRES == 1) { +// return false; +// } +// if (pin_number == PIN_PA30 +// #ifdef SAMD51 +// ) { +// #endif +// #ifdef SAMD21 +// || pin_number == PIN_PA31) { +// #endif) { +// return state->bit.PMUXEN == 1 && ((pmux->reg >> (4 * pin_index % 2)) & 0xf) == SWD_MUX; +// } +// } +// +// return state->bit.PMUXEN == 0 && state->bit.INEN == 0 && +// state->bit.PULLEN == 0 && (port->DIR.reg & (1 << pin_index)) == 0; + return true; +} + +bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) { + #ifdef MICROPY_HW_NEOPIXEL + if (pin == MICROPY_HW_NEOPIXEL) { + return !neopixel_in_use; + } + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin == MICROPY_HW_APA102_MOSI) { + return !apa102_mosi_in_use; + } + if (pin == MICROPY_HW_APA102_SCK) { + return !apa102_sck_in_use; + } + #endif + + #ifdef SPEAKER_ENABLE_PIN + if (pin == SPEAKER_ENABLE_PIN) { + return !speaker_enable_in_use; + } + #endif + + return pin_number_is_free(pin->number); +} + +void common_hal_reset_pin(const mcu_pin_obj_t* pin) { +// reset_pin_number(pin->number); +} diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Pin.h b/ports/mimxrt10xx/common-hal/microcontroller/Pin.h new file mode 100644 index 0000000000..74a1f7cbbd --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/Pin.h @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PIN_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PIN_H + +#include + +#include "pins.h" + +#ifdef MICROPY_HW_NEOPIXEL +extern bool neopixel_in_use; +#endif +#ifdef MICROPY_HW_APA102_MOSI +extern bool apa102_sck_in_use; +extern bool apa102_mosi_in_use; +#endif + +void reset_all_pins(void); +// reset_pin_number takes the pin number instead of the pointer so that objects don't +// need to store a full pointer. +void reset_pin_number(uint8_t pin_number); +void never_reset_pin_number(uint8_t pin_number); +void claim_pin(const mcu_pin_obj_t* pin); +bool pin_number_is_free(uint8_t pin_number); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Processor.c b/ports/mimxrt10xx/common-hal/microcontroller/Processor.c new file mode 100644 index 0000000000..23493f7660 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/Processor.c @@ -0,0 +1,65 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Dan Halbert for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "common-hal/microcontroller/Processor.h" + +#include "fsl_tempmon.h" +#include "fsl_ocotp.h" +#include "clocks.h" + +float common_hal_mcu_processor_get_temperature(void) { + tempmon_config_t config; + TEMPMON_GetDefaultConfig(&config); + + TEMPMON_Init(TEMPMON, &config); + TEMPMON_StartMeasure(TEMPMON); + + const float temp = TEMPMON_GetCurrentTemperature(TEMPMON); + TEMPMON_Deinit(TEMPMON); + + return temp; +} + +float common_hal_mcu_processor_get_voltage(void) { + return NAN; +} + +uint32_t common_hal_mcu_processor_get_frequency(void) { + return SystemCoreClock; +} + +void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { + OCOTP_Init(OCOTP, CLOCK_GetFreq(kCLOCK_IpgClk)); + + // Reads shadow registers 0x01 - 0x04 (Configuration and Manufacturing Info) + for (int i = 0; i < 4; ++i) + ((uint32_t*) raw_id)[i] = OCOTP_ReadFuseShadowRegister(OCOTP, i + 1); + + OCOTP_Deinit(OCOTP); +} diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Processor.h b/ports/mimxrt10xx/common-hal/microcontroller/Processor.h new file mode 100644 index 0000000000..43b0ec878c --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/Processor.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Dan Halbert for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H + +#define COMMON_HAL_MCU_PROCESSOR_UID_LENGTH 16 + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + // Stores no state currently. +} mcu_processor_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H diff --git a/ports/mimxrt10xx/common-hal/microcontroller/__init__.c b/ports/mimxrt10xx/common-hal/microcontroller/__init__.c new file mode 100644 index 0000000000..68de3a8907 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/__init__.c @@ -0,0 +1,284 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +//TODO +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" + +#include "fsl_device_registers.h" + +#include "reset.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/microcontroller/Processor.h" +#include "supervisor/shared/safe_mode.h" +#include "supervisor/shared/translate.h" + +void common_hal_mcu_delay_us(uint32_t delay) { + mp_hal_delay_us(delay); +} + +volatile uint32_t nesting_count = 0; +void common_hal_mcu_disable_interrupts(void) { + __disable_irq(); + __DMB(); + nesting_count++; +} + +void HardFault_Handler(void); +void common_hal_mcu_enable_interrupts(void) { + if (nesting_count == 0) { + // This is very very bad because it means there was mismatched disable/enables so we + // "HardFault". + HardFault_Handler(); + } + nesting_count--; + if (nesting_count > 0) { + return; + } + __DMB(); + __enable_irq(); +} + +void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { + if (runmode == RUNMODE_BOOTLOADER) { + if (!bootloader_available()) { + mp_raise_ValueError(translate("Cannot reset into bootloader because no bootloader is present.")); + } + // Pretend to be the first of the two reset presses needed to enter the + // bootloader. That way one reset will end in the bootloader. + _bootloader_dbl_tap = DBL_TAP_MAGIC; + } else { + // Set up the default. + _bootloader_dbl_tap = DBL_TAP_MAGIC_QUICK_BOOT; + } + if (runmode == RUNMODE_SAFE_MODE) { + safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE); + } +} + +void common_hal_mcu_reset(void) { + NVIC_SystemReset(); +} + +// The singleton microcontroller.Processor object, bound to microcontroller.cpu +// It currently only has properties, and no state. +const mcu_processor_obj_t common_hal_mcu_processor_obj = { + .base = { + .type = &mcu_processor_type, + }, +}; + +// NVM is only available on Express boards for now. +#if CIRCUITPY_INTERNAL_NVM_SIZE > 0 +// The singleton nvm.ByteArray object. +const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = { + .base = { + .type = &nvm_bytearray_type, + }, + .len = CIRCUITPY_INTERNAL_NVM_SIZE, + .start_address = (uint8_t*) (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE) +}; +#endif + +// This maps MCU pin names to pin objects. +STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { +#ifdef MIMXRT1011_SERIES + { MP_ROM_QSTR(MP_QSTR_GPIO_00), MP_ROM_PTR(&pin_GPIO_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_01), MP_ROM_PTR(&pin_GPIO_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_02), MP_ROM_PTR(&pin_GPIO_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_03), MP_ROM_PTR(&pin_GPIO_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_04), MP_ROM_PTR(&pin_GPIO_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_05), MP_ROM_PTR(&pin_GPIO_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_06), MP_ROM_PTR(&pin_GPIO_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_07), MP_ROM_PTR(&pin_GPIO_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_08), MP_ROM_PTR(&pin_GPIO_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_09), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_10), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_11), MP_ROM_PTR(&pin_GPIO_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_12), MP_ROM_PTR(&pin_GPIO_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_13), MP_ROM_PTR(&pin_GPIO_13) }, + + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_00), MP_ROM_PTR(&pin_GPIO_SD_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_01), MP_ROM_PTR(&pin_GPIO_SD_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_02), MP_ROM_PTR(&pin_GPIO_SD_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_03), MP_ROM_PTR(&pin_GPIO_SD_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_04), MP_ROM_PTR(&pin_GPIO_SD_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_05), MP_ROM_PTR(&pin_GPIO_SD_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_06), MP_ROM_PTR(&pin_GPIO_SD_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_07), MP_ROM_PTR(&pin_GPIO_SD_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_08), MP_ROM_PTR(&pin_GPIO_SD_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_09), MP_ROM_PTR(&pin_GPIO_SD_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_10), MP_ROM_PTR(&pin_GPIO_SD_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_11), MP_ROM_PTR(&pin_GPIO_SD_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_12), MP_ROM_PTR(&pin_GPIO_SD_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_13), MP_ROM_PTR(&pin_GPIO_SD_13) }, + + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_00), MP_ROM_PTR(&pin_GPIO_AD_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_01), MP_ROM_PTR(&pin_GPIO_AD_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_02), MP_ROM_PTR(&pin_GPIO_AD_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_03), MP_ROM_PTR(&pin_GPIO_AD_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_04), MP_ROM_PTR(&pin_GPIO_AD_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_05), MP_ROM_PTR(&pin_GPIO_AD_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_06), MP_ROM_PTR(&pin_GPIO_AD_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_07), MP_ROM_PTR(&pin_GPIO_AD_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_08), MP_ROM_PTR(&pin_GPIO_AD_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_09), MP_ROM_PTR(&pin_GPIO_AD_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_10), MP_ROM_PTR(&pin_GPIO_AD_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_11), MP_ROM_PTR(&pin_GPIO_AD_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_12), MP_ROM_PTR(&pin_GPIO_AD_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_13), MP_ROM_PTR(&pin_GPIO_AD_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_14), MP_ROM_PTR(&pin_GPIO_AD_14) }, +#else + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_00), MP_ROM_PTR(&pin_GPIO_EMC_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_01), MP_ROM_PTR(&pin_GPIO_EMC_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_02), MP_ROM_PTR(&pin_GPIO_EMC_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_03), MP_ROM_PTR(&pin_GPIO_EMC_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_04), MP_ROM_PTR(&pin_GPIO_EMC_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_05), MP_ROM_PTR(&pin_GPIO_EMC_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_06), MP_ROM_PTR(&pin_GPIO_EMC_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_07), MP_ROM_PTR(&pin_GPIO_EMC_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_08), MP_ROM_PTR(&pin_GPIO_EMC_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_09), MP_ROM_PTR(&pin_GPIO_EMC_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_10), MP_ROM_PTR(&pin_GPIO_EMC_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_11), MP_ROM_PTR(&pin_GPIO_EMC_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_12), MP_ROM_PTR(&pin_GPIO_EMC_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_13), MP_ROM_PTR(&pin_GPIO_EMC_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_14), MP_ROM_PTR(&pin_GPIO_EMC_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_15), MP_ROM_PTR(&pin_GPIO_EMC_15) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_16), MP_ROM_PTR(&pin_GPIO_EMC_16) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_17), MP_ROM_PTR(&pin_GPIO_EMC_17) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_18), MP_ROM_PTR(&pin_GPIO_EMC_18) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_19), MP_ROM_PTR(&pin_GPIO_EMC_19) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_20), MP_ROM_PTR(&pin_GPIO_EMC_20) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_21), MP_ROM_PTR(&pin_GPIO_EMC_21) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_22), MP_ROM_PTR(&pin_GPIO_EMC_22) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_23), MP_ROM_PTR(&pin_GPIO_EMC_23) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_24), MP_ROM_PTR(&pin_GPIO_EMC_24) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_25), MP_ROM_PTR(&pin_GPIO_EMC_25) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_26), MP_ROM_PTR(&pin_GPIO_EMC_26) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_27), MP_ROM_PTR(&pin_GPIO_EMC_27) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_28), MP_ROM_PTR(&pin_GPIO_EMC_28) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_29), MP_ROM_PTR(&pin_GPIO_EMC_29) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_30), MP_ROM_PTR(&pin_GPIO_EMC_30) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_31), MP_ROM_PTR(&pin_GPIO_EMC_31) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_32), MP_ROM_PTR(&pin_GPIO_EMC_32) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_33), MP_ROM_PTR(&pin_GPIO_EMC_33) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_34), MP_ROM_PTR(&pin_GPIO_EMC_34) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_35), MP_ROM_PTR(&pin_GPIO_EMC_35) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_36), MP_ROM_PTR(&pin_GPIO_EMC_36) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_37), MP_ROM_PTR(&pin_GPIO_EMC_37) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_38), MP_ROM_PTR(&pin_GPIO_EMC_38) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_39), MP_ROM_PTR(&pin_GPIO_EMC_39) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_40), MP_ROM_PTR(&pin_GPIO_EMC_40) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_41), MP_ROM_PTR(&pin_GPIO_EMC_41) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_00), MP_ROM_PTR(&pin_GPIO_AD_B0_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_01), MP_ROM_PTR(&pin_GPIO_AD_B0_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_02), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_03), MP_ROM_PTR(&pin_GPIO_AD_B0_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_04), MP_ROM_PTR(&pin_GPIO_AD_B0_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_05), MP_ROM_PTR(&pin_GPIO_AD_B0_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_06), MP_ROM_PTR(&pin_GPIO_AD_B0_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_07), MP_ROM_PTR(&pin_GPIO_AD_B0_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_08), MP_ROM_PTR(&pin_GPIO_AD_B0_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_09), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_10), MP_ROM_PTR(&pin_GPIO_AD_B0_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_11), MP_ROM_PTR(&pin_GPIO_AD_B0_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_12), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_13), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_14), MP_ROM_PTR(&pin_GPIO_AD_B0_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_15), MP_ROM_PTR(&pin_GPIO_AD_B0_15) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_00), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_01), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_02), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_03), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_04), MP_ROM_PTR(&pin_GPIO_AD_B1_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_05), MP_ROM_PTR(&pin_GPIO_AD_B1_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_06), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_07), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_08), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_09), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_10), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_11), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_12), MP_ROM_PTR(&pin_GPIO_AD_B1_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_13), MP_ROM_PTR(&pin_GPIO_AD_B1_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_14), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_15), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_00), MP_ROM_PTR(&pin_GPIO_B0_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_01), MP_ROM_PTR(&pin_GPIO_B0_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_02), MP_ROM_PTR(&pin_GPIO_B0_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_03), MP_ROM_PTR(&pin_GPIO_B0_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_04), MP_ROM_PTR(&pin_GPIO_B0_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_05), MP_ROM_PTR(&pin_GPIO_B0_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_06), MP_ROM_PTR(&pin_GPIO_B0_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_07), MP_ROM_PTR(&pin_GPIO_B0_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_08), MP_ROM_PTR(&pin_GPIO_B0_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_09), MP_ROM_PTR(&pin_GPIO_B0_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_10), MP_ROM_PTR(&pin_GPIO_B0_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_11), MP_ROM_PTR(&pin_GPIO_B0_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_12), MP_ROM_PTR(&pin_GPIO_B0_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_13), MP_ROM_PTR(&pin_GPIO_B0_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_14), MP_ROM_PTR(&pin_GPIO_B0_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_15), MP_ROM_PTR(&pin_GPIO_B0_15) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_00), MP_ROM_PTR(&pin_GPIO_B1_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_01), MP_ROM_PTR(&pin_GPIO_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_02), MP_ROM_PTR(&pin_GPIO_B1_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_03), MP_ROM_PTR(&pin_GPIO_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_04), MP_ROM_PTR(&pin_GPIO_B1_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_05), MP_ROM_PTR(&pin_GPIO_B1_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_06), MP_ROM_PTR(&pin_GPIO_B1_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_07), MP_ROM_PTR(&pin_GPIO_B1_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_08), MP_ROM_PTR(&pin_GPIO_B1_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_09), MP_ROM_PTR(&pin_GPIO_B1_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_10), MP_ROM_PTR(&pin_GPIO_B1_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_11), MP_ROM_PTR(&pin_GPIO_B1_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_12), MP_ROM_PTR(&pin_GPIO_B1_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_13), MP_ROM_PTR(&pin_GPIO_B1_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_14), MP_ROM_PTR(&pin_GPIO_B1_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_15), MP_ROM_PTR(&pin_GPIO_B1_15) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_00), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_01), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_02), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_03), MP_ROM_PTR(&pin_GPIO_SD_B0_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_04), MP_ROM_PTR(&pin_GPIO_SD_B0_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_05), MP_ROM_PTR(&pin_GPIO_SD_B0_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_00), MP_ROM_PTR(&pin_GPIO_SD_B1_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_01), MP_ROM_PTR(&pin_GPIO_SD_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_02), MP_ROM_PTR(&pin_GPIO_SD_B1_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_03), MP_ROM_PTR(&pin_GPIO_SD_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_04), MP_ROM_PTR(&pin_GPIO_SD_B1_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_05), MP_ROM_PTR(&pin_GPIO_SD_B1_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_06), MP_ROM_PTR(&pin_GPIO_SD_B1_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_07), MP_ROM_PTR(&pin_GPIO_SD_B1_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_08), MP_ROM_PTR(&pin_GPIO_SD_B1_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_09), MP_ROM_PTR(&pin_GPIO_SD_B1_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_10), MP_ROM_PTR(&pin_GPIO_SD_B1_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_11), MP_ROM_PTR(&pin_GPIO_SD_B1_11) }, +#endif +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_global_dict_table); diff --git a/ports/mimxrt10xx/common-hal/neopixel_write/__init__.c b/ports/mimxrt10xx/common-hal/neopixel_write/__init__.c new file mode 100644 index 0000000000..9ea2335021 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/neopixel_write/__init__.c @@ -0,0 +1,106 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2020 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include "shared-bindings/neopixel_write/__init__.h" + +#include "tick.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "common-hal/microcontroller/Pin.h" +#include "fsl_gpio.h" + +uint64_t next_start_tick_ms = 0; +uint32_t next_start_tick_us = 1000; + +//sysclock divisors +#define MAGIC_800_INT 900000 // ~1.11 us -> 1.2 field +#define MAGIC_800_T0H 2800000 // ~0.36 us -> 0.44 field +#define MAGIC_800_T1H 1350000 // ~0.74 us -> 0.84 field + +#pragma GCC push_options +#pragma GCC optimize ("Os") + +void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, + uint32_t numBytes) { + uint8_t *p = pixels, *end = p + numBytes, pix = *p++, mask = 0x80; + uint32_t start = 0; + uint32_t cyc = 0; + + //assumes 800_000Hz frequency + //Theoretical values here are 800_000 -> 1.25us, 2500000->0.4us, 1250000->0.8us + //TODO: try to get dynamic weighting working again +#ifdef MIMXRT1011_SERIES + uint32_t sys_freq = CLOCK_GetCoreFreq(); +#else + uint32_t sys_freq = CLOCK_GetAhbFreq(); +#endif + uint32_t interval = sys_freq/MAGIC_800_INT; + uint32_t t0 = (sys_freq/MAGIC_800_T0H); + uint32_t t1 = (sys_freq/MAGIC_800_T1H); + + // This must be called while interrupts are on in case we're waiting for a + // future ms tick. + wait_until(next_start_tick_ms, next_start_tick_us); + + GPIO_Type *gpio = digitalinout->pin->gpio; + const uint32_t pin = digitalinout->pin->number; + + __disable_irq(); + // Enable DWT in debug core. Useable when interrupts disabled, as opposed to Systick->VAL + CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; + DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; + DWT->CYCCNT = 0; + + for(;;) { + cyc = (pix & mask) ? t1 : t0; + start = DWT->CYCCNT; + GPIO_PinWrite(gpio, pin, 1); + while((DWT->CYCCNT - start) < cyc); + GPIO_PinWrite(gpio, pin, 0); + while((DWT->CYCCNT - start) < interval); + if(!(mask >>= 1)) { + if(p >= end) break; + pix = *p++; + mask = 0x80; + } + } + + // Enable interrupts again + __enable_irq(); + + // Update the next start. + current_tick(&next_start_tick_ms, &next_start_tick_us); + if (next_start_tick_us < 100) { + next_start_tick_ms += 1; + next_start_tick_us = 100 - next_start_tick_us; + } else { + next_start_tick_us -= 100; + } +} + +#pragma GCC pop_options diff --git a/ports/mimxrt10xx/common-hal/os/__init__.c b/ports/mimxrt10xx/common-hal/os/__init__.c new file mode 100644 index 0000000000..e84beb526c --- /dev/null +++ b/ports/mimxrt10xx/common-hal/os/__init__.c @@ -0,0 +1,72 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "genhdr/mpversion.h" +#include "py/mpconfig.h" +#include "py/objstr.h" +#include "py/objtuple.h" +#include "py/qstr.h" + +#include "fsl_trng.h" + +STATIC const qstr os_uname_info_fields[] = { + MP_QSTR_sysname, MP_QSTR_nodename, + MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine +}; +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "mimxrt10xx"); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "mimxrt10xx"); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); + +STATIC MP_DEFINE_ATTRTUPLE( + os_uname_info_obj, + os_uname_info_fields, + 5, + (mp_obj_t)&os_uname_info_sysname_obj, + (mp_obj_t)&os_uname_info_nodename_obj, + (mp_obj_t)&os_uname_info_release_obj, + (mp_obj_t)&os_uname_info_version_obj, + (mp_obj_t)&os_uname_info_machine_obj +); + +mp_obj_t common_hal_os_uname(void) { + return (mp_obj_t)&os_uname_info_obj; +} + +bool common_hal_os_urandom(uint8_t* buffer, uint32_t length) { + trng_config_t trngConfig; + + TRNG_GetDefaultConfig(&trngConfig); + trngConfig.sampleMode = kTRNG_SampleModeVonNeumann; + + TRNG_Init(TRNG, &trngConfig); + TRNG_GetRandomData(TRNG, buffer, length); + TRNG_Deinit(TRNG); + + return true; +} diff --git a/ports/mimxrt10xx/common-hal/pulseio/PWMOut.c b/ports/mimxrt10xx/common-hal/pulseio/PWMOut.c new file mode 100644 index 0000000000..c75b75316a --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PWMOut.c @@ -0,0 +1,551 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2016 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "common-hal/pulseio/PWMOut.h" +#include "shared-bindings/pulseio/PWMOut.h" +#include "shared-bindings/microcontroller/Processor.h" + +#include "fsl_pwm.h" + +#include "supervisor/shared/translate.h" +#include "periph.h" + +#include + +// TODO +//#include "samd/pins.h" + +//#undef ENABLE +// +//# define _TCC_SIZE(unused, n) TCC ## n ## _SIZE, +//# define TCC_SIZES { REPEAT_MACRO(_TCC_SIZE, 0, TCC_INST_NUM) } +// +//static uint32_t tcc_periods[TCC_INST_NUM]; +//static uint32_t tc_periods[TC_INST_NUM]; +// +//uint32_t target_tcc_frequencies[TCC_INST_NUM]; +//uint8_t tcc_refcount[TCC_INST_NUM]; +// +//// This bitmask keeps track of which channels of a TCC are currently claimed. +//#ifdef SAMD21 +//uint8_t tcc_channels[3]; // Set by pwmout_reset() to {0xf0, 0xfc, 0xfc} initially. +//#endif +//#ifdef SAMD51 +//uint8_t tcc_channels[5]; // Set by pwmout_reset() to {0xc0, 0xf0, 0xf8, 0xfc, 0xfc} initially. +//#endif +// +//static uint8_t never_reset_tc_or_tcc[TC_INST_NUM + TCC_INST_NUM]; + +void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) { +// if (self->timer->is_tc) { +// never_reset_tc_or_tcc[self->timer->index] += 1; +// } else { +// never_reset_tc_or_tcc[TC_INST_NUM + self->timer->index] += 1; +// } +// +// never_reset_pin_number(self->pin->number); +} + +void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) { +// if (self->timer->is_tc) { +// never_reset_tc_or_tcc[self->timer->index] -= 1; +// } else { +// never_reset_tc_or_tcc[TC_INST_NUM + self->timer->index] -= 1; +// } +} + +void pwmout_reset(void) { +// // Reset all timers +// for (int i = 0; i < TCC_INST_NUM; i++) { +// target_tcc_frequencies[i] = 0; +// tcc_refcount[i] = 0; +// } +// Tcc *tccs[TCC_INST_NUM] = TCC_INSTS; +// for (int i = 0; i < TCC_INST_NUM; i++) { +// if (never_reset_tc_or_tcc[TC_INST_NUM + i] > 0) { +// continue; +// } +// // Disable the module before resetting it. +// if (tccs[i]->CTRLA.bit.ENABLE == 1) { +// tccs[i]->CTRLA.bit.ENABLE = 0; +// while (tccs[i]->SYNCBUSY.bit.ENABLE == 1) { +// } +// } +// uint8_t mask = 0xff; +// for (uint8_t j = 0; j < tcc_cc_num[i]; j++) { +// mask <<= 1; +// } +// tcc_channels[i] = mask; +// tccs[i]->CTRLA.bit.SWRST = 1; +// while (tccs[i]->CTRLA.bit.SWRST == 1) { +// } +// } +// Tc *tcs[TC_INST_NUM] = TC_INSTS; +// for (int i = 0; i < TC_INST_NUM; i++) { +// if (never_reset_tc_or_tcc[i] > 0) { +// continue; +// } +// tcs[i]->COUNT16.CTRLA.bit.SWRST = 1; +// while (tcs[i]->COUNT16.CTRLA.bit.SWRST == 1) { +// } +// } +} + +//static uint8_t tcc_channel(const pin_timer_t* t) { +// // For the SAMD51 this hardcodes the use of OTMX == 0x0, the output matrix mapping, which uses +// // SAMD21-style modulo mapping. +// return t->wave_output % tcc_cc_num[t->index]; +//} + +//bool channel_ok(const pin_timer_t* t) { +// uint8_t channel_bit = 1 << tcc_channel(t); +// return (!t->is_tc && ((tcc_channels[t->index] & channel_bit) == 0)) || +// t->is_tc; +//} + +#define PWM_SRC_CLK_FREQ CLOCK_GetFreq(kCLOCK_IpgClk) + +pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t *self, + const mcu_pin_obj_t *pin, + uint16_t duty, + uint32_t frequency, + bool variable_frequency) { + self->pin = pin; + self->variable_frequency = variable_frequency; + + const uint32_t pwm_count = sizeof(mcu_pwm_list) / sizeof(mcu_pwm_obj_t); + + for (uint32_t i = 0; i < pwm_count; ++i) { + if (mcu_pwm_list[i].pin != pin) + continue; + + printf("pwm: 0x%p, sum %d, chan %d, mux %d\r\n", mcu_pwm_list[i].pwm, mcu_pwm_list[i].submodule, mcu_pwm_list[i].channel, mcu_pwm_list[i].mux_mode); + + self->pwm = &mcu_pwm_list[i]; + + break; + } + + if (self->pwm == NULL) { + return PWMOUT_INVALID_PIN; + } + + CLOCK_SetDiv(kCLOCK_AhbDiv, 0x2); /* Set AHB PODF to 2, divide by 3 */ + CLOCK_SetDiv(kCLOCK_IpgDiv, 0x3); /* Set IPG PODF to 3, divede by 4 */ + +//TODO re-enable +// IOMUXC_SetPinMux( +// IOMUXC_GPIO_SD_02_FLEXPWM1_PWM0_A, /* GPIO_02 is configured as FLEXPWM1_PWM0_A */ +// 0U); /* Software Input On Field: Input Path is determined by functionality */ +// +// IOMUXC_SetPinConfig( +// IOMUXC_GPIO_SD_02_FLEXPWM1_PWM0_A, /* GPIO_02 PAD functional properties : */ +// 0x10A0U); /* Slew Rate Field: Slow Slew Rate +// Drive Strength Field: R0/4 +// Speed Field: fast(150MHz) +// Open Drain Enable Field: Open Drain Disabled +// Pull / Keep Enable Field: Pull/Keeper Enabled +// Pull / Keep Select Field: Keeper +// Pull Up / Down Config. Field: 100K Ohm Pull Down +// Hyst. Enable Field: Hysteresis Disabled */ + + pwm_config_t pwmConfig; + + /* + * pwmConfig.enableDebugMode = false; + * pwmConfig.enableWait = false; + * pwmConfig.reloadSelect = kPWM_LocalReload; + * pwmConfig.faultFilterCount = 0; + * pwmConfig.faultFilterPeriod = 0; + * pwmConfig.clockSource = kPWM_BusClock; + * pwmConfig.prescale = kPWM_Prescale_Divide_1; + * pwmConfig.initializationControl = kPWM_Initialize_LocalSync; + * pwmConfig.forceTrigger = kPWM_Force_Local; + * pwmConfig.reloadFrequency = kPWM_LoadEveryOportunity; + * pwmConfig.reloadLogic = kPWM_ReloadImmediate; + * pwmConfig.pairOperation = kPWM_Independent; + */ + PWM_GetDefaultConfig(&pwmConfig); + + //pwmConfig.reloadLogic = kPWM_ReloadPwmFullCycle; + pwmConfig.enableDebugMode = true; + + if (PWM_Init(PWM1, self->pwm->submodule, &pwmConfig) == kStatus_Fail) { + printf("PWM initialization failed\r\n"); + return PWMOUT_INVALID_PIN; + } + + pwm_signal_param_t pwmSignal; + + /* Set deadtime count, we set this to about 650ns */ + uint16_t deadTimeVal = ((uint64_t)PWM_SRC_CLK_FREQ * 650) / 1000000000; + + pwmSignal.pwmChannel = self->pwm->channel; + pwmSignal.level = kPWM_HighTrue; + pwmSignal.dutyCyclePercent = frequency / 2; /* 1 percent dutycycle */ + pwmSignal.deadtimeValue = deadTimeVal; + + PWM_SetupPwm(PWM1, self->pwm->submodule, &pwmSignal, 1, kPWM_SignedCenterAligned, frequency, PWM_SRC_CLK_FREQ); + + PWM_SetPwmLdok(PWM1, kPWM_Control_Module_0 | kPWM_Control_Module_1 | kPWM_Control_Module_2, true); + + PWM_StartTimer(PWM1, kPWM_Control_Module_0 | kPWM_Control_Module_1 | kPWM_Control_Module_2); + +// if (frequency == 0 || frequency > 6000000) { +// return PWMOUT_INVALID_FREQUENCY; +// } + +// // Figure out which timer we are using. +// // First see if a tcc is already going with the frequency we want and our +// // channel is unused. tc's don't have enough channels to share. +// const pin_timer_t* timer = NULL; +// uint8_t mux_position = 0; +// if (!variable_frequency) { +// for (uint8_t i = 0; i < TCC_INST_NUM && timer == NULL; i++) { +// if (target_tcc_frequencies[i] != frequency) { +// continue; +// } +// for (uint8_t j = 0; j < NUM_TIMERS_PER_PIN && timer == NULL; j++) { +// const pin_timer_t* t = &pin->timer[j]; +// if (t->index != i || t->is_tc || t->index >= TCC_INST_NUM) { +// continue; +// } +// Tcc* tcc = tcc_insts[t->index]; +// if (tcc->CTRLA.bit.ENABLE == 1 && channel_ok(t)) { +// timer = t; +// mux_position = j; +// // Claim channel. +// tcc_channels[timer->index] |= (1 << tcc_channel(timer)); +// +// } +// } +// } +// } +// +// // No existing timer has been found, so find a new one to use and set it up. +// if (timer == NULL) { +// // By default, with fixed frequency we want to share a TCC because its likely we'll have +// // other outputs at the same frequency. If the frequency is variable then we'll only have +// // one output so we start with the TCs to see if they work. +// int8_t direction = -1; +// uint8_t start = NUM_TIMERS_PER_PIN - 1; +// bool found = false; +// if (variable_frequency) { +// direction = 1; +// start = 0; +// } +// for (int8_t i = start; i >= 0 && i < NUM_TIMERS_PER_PIN && timer == NULL; i += direction) { +// const pin_timer_t* t = &pin->timer[i]; +// if ((!t->is_tc && t->index >= TCC_INST_NUM) || +// (t->is_tc && t->index >= TC_INST_NUM)) { +// continue; +// } +// if (t->is_tc) { +// found = true; +// Tc* tc = tc_insts[t->index]; +// if (tc->COUNT16.CTRLA.bit.ENABLE == 0 && t->wave_output == 1) { +// timer = t; +// mux_position = i; +// } +// } else { +// Tcc* tcc = tcc_insts[t->index]; +// if (tcc->CTRLA.bit.ENABLE == 0 && channel_ok(t)) { +// timer = t; +// mux_position = i; +// } +// } +// } +// +// if (timer == NULL) { +// if (found) { +// return PWMOUT_ALL_TIMERS_ON_PIN_IN_USE; +// } +// return PWMOUT_ALL_TIMERS_IN_USE; +// } +// +// uint8_t resolution = 0; +// if (timer->is_tc) { +// resolution = 16; +// } else { +// // TCC resolution varies so look it up. +// const uint8_t _tcc_sizes[TCC_INST_NUM] = TCC_SIZES; +// resolution = _tcc_sizes[timer->index]; +// } +// // First determine the divisor that gets us the highest resolution. +// uint32_t system_clock = common_hal_mcu_processor_get_frequency(); +// uint32_t top; +// uint8_t divisor; +// for (divisor = 0; divisor < 8; divisor++) { +// top = (system_clock / prescaler[divisor] / frequency) - 1; +// if (top < (1u << resolution)) { +// break; +// } +// } +// +// set_timer_handler(timer->is_tc, timer->index, TC_HANDLER_NO_INTERRUPT); +// // We use the zeroeth clock on either port to go full speed. +// turn_on_clocks(timer->is_tc, timer->index, 0); +// +// if (timer->is_tc) { +// tc_periods[timer->index] = top; +// Tc* tc = tc_insts[timer->index]; +// #ifdef SAMD21 +// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | +// TC_CTRLA_PRESCALER(divisor) | +// TC_CTRLA_WAVEGEN_MPWM; +// tc->COUNT16.CC[0].reg = top; +// #endif +// #ifdef SAMD51 +// +// tc->COUNT16.CTRLA.bit.SWRST = 1; +// while (tc->COUNT16.CTRLA.bit.SWRST == 1) { +// } +// tc_set_enable(tc, false); +// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER(divisor); +// tc->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MPWM; +// tc->COUNT16.CCBUF[0].reg = top; +// tc->COUNT16.CCBUF[1].reg = 0; +// #endif +// +// tc_set_enable(tc, true); +// } else { +// tcc_periods[timer->index] = top; +// Tcc* tcc = tcc_insts[timer->index]; +// tcc_set_enable(tcc, false); +// tcc->CTRLA.bit.PRESCALER = divisor; +// tcc->PER.bit.PER = top; +// tcc->WAVE.bit.WAVEGEN = TCC_WAVE_WAVEGEN_NPWM_Val; +// tcc_set_enable(tcc, true); +// target_tcc_frequencies[timer->index] = frequency; +// tcc_refcount[timer->index]++; +// if (variable_frequency) { +// // We're changing frequency so claim all of the channels. +// tcc_channels[timer->index] = 0xff; +// } else { +// tcc_channels[timer->index] |= (1 << tcc_channel(timer)); +// } +// } +// } +// +// self->timer = timer; +// +// gpio_set_pin_function(pin->number, GPIO_PIN_FUNCTION_E + mux_position); + + common_hal_pulseio_pwmout_set_duty_cycle(self, duty); + + return PWMOUT_OK; +} + +bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) { + return self->pin == NULL; +} + +void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { + if (common_hal_pulseio_pwmout_deinited(self)) { + return; + } + +// const pin_timer_t* t = self->timer; +// if (t->is_tc) { +// Tc* tc = tc_insts[t->index]; +// tc_set_enable(tc, false); +// tc->COUNT16.CTRLA.bit.SWRST = true; +// tc_wait_for_sync(tc); +// } else { +// tcc_refcount[t->index]--; +// tcc_channels[t->index] &= ~(1 << tcc_channel(t)); +// if (tcc_refcount[t->index] == 0) { +// target_tcc_frequencies[t->index] = 0; +// Tcc* tcc = tcc_insts[t->index]; +// tcc_set_enable(tcc, false); +// tcc->CTRLA.bit.SWRST = true; +// while (tcc->SYNCBUSY.bit.SWRST != 0) { +// /* Wait for sync */ +// } +// } +// } +// reset_pin_number(self->pin->number); + self->pin = NULL; +} + +void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t *self, uint16_t duty) { + PWM_UpdatePwmDutycycle(PWM1, self->pwm->submodule, self->pwm->channel, kPWM_SignedCenterAligned, duty); + +// const pin_timer_t* t = self->timer; +// if (t->is_tc) { +// uint16_t adjusted_duty = tc_periods[t->index] * duty / 0xffff; +// #ifdef SAMD21 +// tc_insts[t->index]->COUNT16.CC[t->wave_output].reg = adjusted_duty; +// #endif +// #ifdef SAMD51 +// Tc* tc = tc_insts[t->index]; +// while (tc->COUNT16.SYNCBUSY.bit.CC1 != 0) {} +// tc->COUNT16.CCBUF[1].reg = adjusted_duty; +// #endif +// } else { +// uint32_t adjusted_duty = ((uint64_t) tcc_periods[t->index]) * duty / 0xffff; +// uint8_t channel = tcc_channel(t); +// Tcc* tcc = tcc_insts[t->index]; +// +// // Write into the CC buffer register, which will be transferred to the +// // CC register on an UPDATE (when period is finished). +// // Do clock domain syncing as necessary. +// +// while (tcc->SYNCBUSY.reg != 0) {} +// +// // Lock out double-buffering while updating the CCB value. +// tcc->CTRLBSET.bit.LUPD = 1; +// #ifdef SAMD21 +// tcc->CCB[channel].reg = adjusted_duty; +// #endif +// #ifdef SAMD51 +// tcc->CCBUF[channel].reg = adjusted_duty; +// #endif +// tcc->CTRLBCLR.bit.LUPD = 1; +// } +} + +uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { + return 0; +// const pin_timer_t* t = self->timer; +// if (t->is_tc) { +// Tc* tc = tc_insts[t->index]; +// tc_wait_for_sync(tc); +// uint16_t cv = tc->COUNT16.CC[t->wave_output].reg; +// return cv * 0xffff / tc_periods[t->index]; +// } else { +// Tcc* tcc = tcc_insts[t->index]; +// uint8_t channel = tcc_channel(t); +// uint32_t cv = 0; +// +// while (tcc->SYNCBUSY.bit.CTRLB) {} +// +// #ifdef SAMD21 +// // If CCBV (CCB valid) is set, the CCB value hasn't yet been copied +// // to the CC value. +// if ((tcc->STATUS.vec.CCBV & (1 << channel)) != 0) { +// cv = tcc->CCB[channel].reg; +// } else { +// cv = tcc->CC[channel].reg; +// } +// #endif +// #ifdef SAMD51 +// if ((tcc->STATUS.vec.CCBUFV & (1 << channel)) != 0) { +// cv = tcc->CCBUF[channel].reg; +// } else { +// cv = tcc->CC[channel].reg; +// } +// #endif +// +// uint32_t duty_cycle = ((uint64_t) cv) * 0xffff / tcc_periods[t->index]; +// +// return duty_cycle; +// } +} + +void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, + uint32_t frequency) { +// if (frequency == 0 || frequency > 6000000) { +// mp_raise_ValueError(translate("Invalid PWM frequency")); +// } +// const pin_timer_t* t = self->timer; +// uint8_t resolution; +// if (t->is_tc) { +// resolution = 16; +// } else { +// resolution = 24; +// } +// uint32_t system_clock = common_hal_mcu_processor_get_frequency(); +// uint32_t new_top; +// uint8_t new_divisor; +// for (new_divisor = 0; new_divisor < 8; new_divisor++) { +// new_top = (system_clock / prescaler[new_divisor] / frequency) - 1; +// if (new_top < (1u << resolution)) { +// break; +// } +// } +// uint16_t old_duty = common_hal_pulseio_pwmout_get_duty_cycle(self); +// if (t->is_tc) { +// Tc* tc = tc_insts[t->index]; +// uint8_t old_divisor = tc->COUNT16.CTRLA.bit.PRESCALER; +// if (new_divisor != old_divisor) { +// tc_set_enable(tc, false); +// tc->COUNT16.CTRLA.bit.PRESCALER = new_divisor; +// tc_set_enable(tc, true); +// } +// tc_periods[t->index] = new_top; +// #ifdef SAMD21 +// tc->COUNT16.CC[0].reg = new_top; +// #endif +// #ifdef SAMD51 +// while (tc->COUNT16.SYNCBUSY.reg != 0) {} +// tc->COUNT16.CCBUF[0].reg = new_top; +// #endif +// } else { +// Tcc* tcc = tcc_insts[t->index]; +// uint8_t old_divisor = tcc->CTRLA.bit.PRESCALER; +// if (new_divisor != old_divisor) { +// tcc_set_enable(tcc, false); +// tcc->CTRLA.bit.PRESCALER = new_divisor; +// tcc_set_enable(tcc, true); +// } +// while (tcc->SYNCBUSY.reg != 0) {} +// tcc_periods[t->index] = new_top; +// #ifdef SAMD21 +// tcc->PERB.bit.PERB = new_top; +// #endif +// #ifdef SAMD51 +// tcc->PERBUF.bit.PERBUF = new_top; +// #endif +// } + +// common_hal_pulseio_pwmout_set_duty_cycle(self, old_duty); +} + +uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) { +// uint32_t system_clock = common_hal_mcu_processor_get_frequency(); +// const pin_timer_t* t = self->timer; +// uint8_t divisor; +// uint32_t top; +// if (t->is_tc) { +// divisor = tc_insts[t->index]->COUNT16.CTRLA.bit.PRESCALER; +// top = tc_periods[t->index]; +// } else { +// divisor = tcc_insts[t->index]->CTRLA.bit.PRESCALER; +// top = tcc_periods[t->index]; +// } +// return (system_clock / prescaler[divisor]) / (top + 1); + return 0; +} + +bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self) { + return self->variable_frequency; +} diff --git a/ports/mimxrt10xx/common-hal/pulseio/PWMOut.h b/ports/mimxrt10xx/common-hal/pulseio/PWMOut.h new file mode 100644 index 0000000000..2f0fe94c44 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PWMOut.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PWMOUT_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PWMOUT_H + +#include "common-hal/microcontroller/Pin.h" +#include "periph.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; + const mcu_pwm_obj_t *pwm; + bool variable_frequency; +} pulseio_pwmout_obj_t; + +void pwmout_reset(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PWMOUT_H diff --git a/ports/mimxrt10xx/common-hal/pulseio/PulseIn.c b/ports/mimxrt10xx/common-hal/pulseio/PulseIn.c new file mode 100644 index 0000000000..24e9ad85de --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PulseIn.c @@ -0,0 +1,248 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017-2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/pulseio/PulseIn.h" + +#include + +#include "background.h" +#include "mpconfigport.h" +#include "py/gc.h" +#include "py/runtime.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/pulseio/PulseIn.h" +#include "supervisor/shared/translate.h" + +#include "tick.h" + +// TODO +//static void pulsein_set_config(pulseio_pulsein_obj_t* self, bool first_edge) { +// uint32_t sense_setting; +// if (!first_edge) { +// sense_setting = EIC_CONFIG_SENSE0_BOTH_Val; +// configure_eic_channel(self->channel, sense_setting); +// return; +// } else if (self->idle_state) { +// sense_setting = EIC_CONFIG_SENSE0_FALL_Val; +// } else { +// sense_setting = EIC_CONFIG_SENSE0_RISE_Val; +// } +// set_eic_handler(self->channel, EIC_HANDLER_PULSEIN); +// turn_on_eic_channel(self->channel, sense_setting); +//} + +//void pulsein_interrupt_handler(uint8_t channel) { +// // Grab the current time first. +// uint32_t current_us; +// uint64_t current_ms; +// current_tick(¤t_ms, ¤t_us); +// +// // current_tick gives us the remaining us until the next tick but we want the number since the +// // last ms. +// current_us = 1000 - current_us; +// pulseio_pulsein_obj_t* self = get_eic_channel_data(channel); +// if (!background_tasks_ok() || self->errored_too_fast) { +// self->errored_too_fast = true; +// common_hal_pulseio_pulsein_pause(self); +// return; +// } +// if (self->first_edge) { +// self->first_edge = false; +// pulsein_set_config(self, false); +// } else { +// uint32_t ms_diff = current_ms - self->last_ms; +// uint16_t us_diff = current_us - self->last_us; +// uint32_t total_diff = us_diff; +// if (self->last_us > current_us) { +// total_diff = 1000 + current_us - self->last_us; +// if (ms_diff > 1) { +// total_diff += (ms_diff - 1) * 1000; +// } +// } else { +// total_diff += ms_diff * 1000; +// } +// uint16_t duration = 0xffff; +// if (total_diff < duration) { +// duration = total_diff; +// } +// +// uint16_t i = (self->start + self->len) % self->maxlen; +// self->buffer[i] = duration; +// if (self->len < self->maxlen) { +// self->len++; +// } else { +// self->start++; +// } +// } +// self->last_ms = current_ms; +// self->last_us = current_us; +//} + +void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, + const mcu_pin_obj_t* pin, uint16_t maxlen, bool idle_state) { +// if (!pin->has_extint) { +// mp_raise_RuntimeError(translate("No hardware support on pin")); +// } +// if (eic_get_enable() && !eic_channel_free(pin->extint_channel)) { +// mp_raise_RuntimeError(translate("EXTINT channel already in use")); +// } +// +// self->buffer = (uint16_t *) m_malloc(maxlen * sizeof(uint16_t), false); +// if (self->buffer == NULL) { +// mp_raise_msg_varg(&mp_type_MemoryError, translate("Failed to allocate RX buffer of %d bytes"), maxlen * sizeof(uint16_t)); +// } +// self->channel = pin->extint_channel; +// self->pin = pin->number; +// self->maxlen = maxlen; +// self->idle_state = idle_state; +// self->start = 0; +// self->len = 0; +// self->first_edge = true; +// self->last_us = 0; +// self->last_ms = 0; +// self->errored_too_fast = false; +// +// set_eic_channel_data(pin->extint_channel, (void*) self); +// +// // Check to see if the EIC is enabled and start it up if its not.' +// if (eic_get_enable() == 0) { +// turn_on_external_interrupt_controller(); +// } +// +// gpio_set_pin_function(pin->number, GPIO_PIN_FUNCTION_A); +// +// turn_on_cpu_interrupt(self->channel); +// +// claim_pin(pin); +// +// // Set config will enable the EIC. +// pulsein_set_config(self, true); +} + +bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t* self) { +// return self->pin == NO_PIN; + return true; +} + +void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) { +// if (common_hal_pulseio_pulsein_deinited(self)) { +// return; +// } +// set_eic_handler(self->channel, EIC_HANDLER_NO_INTERRUPT); +// turn_off_eic_channel(self->channel); +// reset_pin_number(self->pin); +// self->pin = NO_PIN; +} + +void common_hal_pulseio_pulsein_pause(pulseio_pulsein_obj_t* self) { +// uint32_t mask = 1 << self->channel; +// EIC->INTENCLR.reg = mask << EIC_INTENSET_EXTINT_Pos; +} + +void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, + uint16_t trigger_duration) { +// // Make sure we're paused. +// common_hal_pulseio_pulsein_pause(self); +// +// // Reset erroring +// self->errored_too_fast = false; +// +// // Send the trigger pulse. +// if (trigger_duration > 0) { +// gpio_set_pin_pull_mode(self->pin, GPIO_PULL_OFF); +// gpio_set_pin_direction(self->pin, GPIO_DIRECTION_OUT); +// gpio_set_pin_level(self->pin, !self->idle_state); +// common_hal_mcu_delay_us((uint32_t)trigger_duration); +// gpio_set_pin_level(self->pin, self->idle_state); +// } +// +// // Reconfigure the pin and make sure its set to detect the first edge. +// self->first_edge = true; +// self->last_ms = 0; +// self->last_us = 0; +// gpio_set_pin_function(self->pin, GPIO_PIN_FUNCTION_A); +// uint32_t mask = 1 << self->channel; +// // Clear previous interrupt state and re-enable it. +// EIC->INTFLAG.reg = mask << EIC_INTFLAG_EXTINT_Pos; +// EIC->INTENSET.reg = mask << EIC_INTENSET_EXTINT_Pos; +// +// pulsein_set_config(self, true); +} + +void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t* self) { +// common_hal_mcu_disable_interrupts(); +// self->start = 0; +// self->len = 0; +// common_hal_mcu_enable_interrupts(); +} + +uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { +// if (self->len == 0) { +// mp_raise_IndexError(translate("pop from an empty PulseIn")); +// } +// common_hal_mcu_disable_interrupts(); +// uint16_t value = self->buffer[self->start]; +// self->start = (self->start + 1) % self->maxlen; +// self->len--; +// common_hal_mcu_enable_interrupts(); +// +// return value; + return 0; +} + +uint16_t common_hal_pulseio_pulsein_get_maxlen(pulseio_pulsein_obj_t* self) { +// return self->maxlen; + return 0; +} + +uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t* self) { +// return self->len; + return 0; +} + +bool common_hal_pulseio_pulsein_get_paused(pulseio_pulsein_obj_t* self) { +// uint32_t mask = 1 << self->channel; +// return (EIC->INTENSET.reg & (mask << EIC_INTENSET_EXTINT_Pos)) == 0; + return true; +} + +uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, + int16_t index) { +// common_hal_mcu_disable_interrupts(); +// if (index < 0) { +// index += self->len; +// } +// if (index < 0 || index >= self->len) { +// common_hal_mcu_enable_interrupts(); +// mp_raise_IndexError(translate("index out of range")); +// } +// uint16_t value = self->buffer[(self->start + index) % self->maxlen]; +// common_hal_mcu_enable_interrupts(); +// return value; + return 0; +} diff --git a/ports/mimxrt10xx/common-hal/pulseio/PulseIn.h b/ports/mimxrt10xx/common-hal/pulseio/PulseIn.h new file mode 100644 index 0000000000..af742f319f --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PulseIn.h @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEIN_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEIN_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +// TODO +typedef struct { + mp_obj_base_t base; +// uint8_t channel; +// uint8_t pin; +// uint16_t* buffer; +// uint16_t maxlen; +// bool idle_state; +// volatile uint16_t start; +// volatile uint16_t len; +// volatile bool first_edge; +// volatile uint64_t last_ms; +// volatile uint16_t last_us; +// volatile bool errored_too_fast; +} pulseio_pulsein_obj_t; + +//void pulsein_reset(void); +// +//void pulsein_interrupt_handler(uint8_t channel); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEIN_H diff --git a/ports/mimxrt10xx/common-hal/pulseio/PulseOut.c b/ports/mimxrt10xx/common-hal/pulseio/PulseOut.c new file mode 100644 index 0000000000..a49cfa7af7 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PulseOut.c @@ -0,0 +1,207 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/pulseio/PulseOut.h" + +#include + +#include "mpconfigport.h" +#include "py/gc.h" +#include "py/runtime.h" +#include "shared-bindings/pulseio/PulseOut.h" +#include "supervisor/shared/translate.h" + +// TODO + +// This timer is shared amongst all PulseOut objects under the assumption that +// the code is single threaded. +//static uint8_t refcount = 0; +// +//static uint8_t pulseout_tc_index = 0xff; +// +//static __IO PORT_PINCFG_Type *active_pincfg = NULL; +//static uint16_t *pulse_buffer = NULL; +//static volatile uint16_t pulse_index = 0; +//static uint16_t pulse_length; +//static volatile uint32_t current_compare = 0; +// +//static void turn_on(__IO PORT_PINCFG_Type * pincfg) { +// pincfg->reg = PORT_PINCFG_PMUXEN; +//} +// +//static void turn_off(__IO PORT_PINCFG_Type * pincfg) { +// pincfg->reg = PORT_PINCFG_RESETVALUE; +//} +// +//void pulse_finish(void) { +// pulse_index++; +// +// if (active_pincfg == NULL) { +// return; +// } +// // Always turn it off. +// turn_off(active_pincfg); +// if (pulse_index >= pulse_length) { +// return; +// } +// current_compare = (current_compare + pulse_buffer[pulse_index] * 3 / 4) & 0xffff; +// Tc* tc = tc_insts[pulseout_tc_index]; +// tc->COUNT16.CC[0].reg = current_compare; +// if (pulse_index % 2 == 0) { +// turn_on(active_pincfg); +// } +//} + +void pulseout_interrupt_handler(uint8_t index) { +// if (index != pulseout_tc_index) return; +// Tc* tc = tc_insts[index]; +// if (!tc->COUNT16.INTFLAG.bit.MC0) return; +// +// pulse_finish(); +// +// // Clear the interrupt bit. +// tc->COUNT16.INTFLAG.reg = TC_INTFLAG_MC0; +} + +void pulseout_reset() { +// refcount = 0; +// pulseout_tc_index = 0xff; +// active_pincfg = NULL; +} + +void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, + const pulseio_pwmout_obj_t* carrier) { +// if (refcount == 0) { +// // Find a spare timer. +// Tc *tc = NULL; +// int8_t index = TC_INST_NUM - 1; +// for (; index >= 0; index--) { +// if (tc_insts[index]->COUNT16.CTRLA.bit.ENABLE == 0) { +// tc = tc_insts[index]; +// break; +// } +// } +// if (tc == NULL) { +// mp_raise_RuntimeError(translate("All timers in use")); +// } +// +// pulseout_tc_index = index; +// +// set_timer_handler(true, index, TC_HANDLER_PULSEOUT); +// // We use GCLK0 for SAMD21 and GCLK1 for SAMD51 because they both run at 48mhz making our +// // math the same across the boards. +// #ifdef SAMD21 +// turn_on_clocks(true, index, 0); +// #endif +// #ifdef SAMD51 +// turn_on_clocks(true, index, 1); +// #endif +// +// +// #ifdef SAMD21 +// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | +// TC_CTRLA_PRESCALER_DIV64 | +// TC_CTRLA_WAVEGEN_NFRQ; +// #endif +// #ifdef SAMD51 +// tc_reset(tc); +// tc_set_enable(tc, false); +// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER_DIV64; +// tc->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_NFRQ; +// #endif +// +// tc_set_enable(tc, true); +// tc->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_STOP; +// } +// refcount++; +// +// self->pin = carrier->pin->number; +// +// PortGroup *const port_base = &PORT->Group[GPIO_PORT(self->pin)]; +// self->pincfg = &port_base->PINCFG[self->pin % 32]; +// +// // Set the port to output a zero. +// port_base->OUTCLR.reg = 1 << (self->pin % 32); +// port_base->DIRSET.reg = 1 << (self->pin % 32); +// +// // Turn off the pinmux which should connect the port output. +// turn_off(self->pincfg); +} + +bool common_hal_pulseio_pulseout_deinited(pulseio_pulseout_obj_t* self) { +// return self->pin == NO_PIN; + return false; +} + +void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t* self) { +// if (common_hal_pulseio_pulseout_deinited(self)) { +// return; +// } +// PortGroup *const port_base = &PORT->Group[GPIO_PORT(self->pin)]; +// port_base->DIRCLR.reg = 1 << (self->pin % 32); +// +// turn_on(self->pincfg); +// +// refcount--; +// if (refcount == 0) { +// tc_reset(tc_insts[pulseout_tc_index]); +// pulseout_tc_index = 0xff; +// } +// self->pin = NO_PIN; +} + +void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, uint16_t* pulses, uint16_t length) { +// if (active_pincfg != NULL) { +// mp_raise_RuntimeError(translate("Another send is already active")); +// } +// active_pincfg = self->pincfg; +// pulse_buffer = pulses; +// pulse_index = 0; +// pulse_length = length; +// +// current_compare = pulses[0] * 3 / 4; +// Tc* tc = tc_insts[pulseout_tc_index]; +// tc->COUNT16.CC[0].reg = current_compare; +// +// // Clear our interrupt in case it was set earlier +// tc->COUNT16.INTFLAG.reg = TC_INTFLAG_MC0; +// tc->COUNT16.INTENSET.reg = TC_INTENSET_MC0; +// tc_enable_interrupts(pulseout_tc_index); +// turn_on(active_pincfg); +// tc->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_RETRIGGER; +// +// while(pulse_index < length) { +// // Do other things while we wait. The interrupts will handle sending the +// // signal. +// RUN_BACKGROUND_TASKS; +// } +// +// tc->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_STOP; +// tc->COUNT16.INTENCLR.reg = TC_INTENCLR_MC0; +// tc_disable_interrupts(pulseout_tc_index); +// active_pincfg = NULL; +} diff --git a/ports/mimxrt10xx/common-hal/pulseio/PulseOut.h b/ports/mimxrt10xx/common-hal/pulseio/PulseOut.h new file mode 100644 index 0000000000..ee70ac17ec --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PulseOut.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEOUT_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEOUT_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +// TODO +typedef struct { + mp_obj_base_t base; +// __IO PORT_PINCFG_Type *pincfg; +// uint8_t pin; +} pulseio_pulseout_obj_t; + +void pulseout_reset(void); +//void pulseout_interrupt_handler(uint8_t index); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEOUT_H diff --git a/ports/mimxrt10xx/common-hal/pulseio/__init__.c b/ports/mimxrt10xx/common-hal/pulseio/__init__.c new file mode 100644 index 0000000000..2bee925bc7 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/__init__.c @@ -0,0 +1 @@ +// No pulseio module functions. diff --git a/ports/mimxrt10xx/common-hal/rtc/RTC.c b/ports/mimxrt10xx/common-hal/rtc/RTC.c new file mode 100644 index 0000000000..5d6cae5201 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/rtc/RTC.c @@ -0,0 +1,76 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Nick Moore for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/timeutils/timeutils.h" +#include "shared-bindings/rtc/__init__.h" +#include "supervisor/shared/translate.h" + +#include "fsl_snvs_hp.h" + +void rtc_init(void) { + snvs_hp_rtc_config_t config; + SNVS_HP_RTC_GetDefaultConfig(&config); + + SNVS_HP_RTC_Init(SNVS, &config); + SNVS_HP_RTC_StartTimer(SNVS); +} + +void common_hal_rtc_get_time(timeutils_struct_time_t *tm) { + snvs_hp_rtc_datetime_t rtcDate; + SNVS_HP_RTC_GetDatetime(SNVS, &rtcDate); + + tm->tm_year = rtcDate.year; + tm->tm_mon = rtcDate.month; + tm->tm_mday = rtcDate.day; + tm->tm_hour = rtcDate.hour; + tm->tm_min = rtcDate.minute; + tm->tm_sec = rtcDate.second; +} + +void common_hal_rtc_set_time(timeutils_struct_time_t *tm) { + snvs_hp_rtc_datetime_t rtcDate; + rtcDate.year = tm->tm_year; + rtcDate.month = tm->tm_mon; + rtcDate.day = tm->tm_mday; + rtcDate.hour = tm->tm_hour; + rtcDate.minute = tm->tm_min; + rtcDate.second = tm->tm_sec; + + SNVS_HP_RTC_SetDatetime(SNVS, &rtcDate); +} + +int common_hal_rtc_get_calibration(void) { + return 0; +} + +void common_hal_rtc_set_calibration(int calibration) { + mp_raise_NotImplementedError(translate("RTC calibration is not supported on this board")); +} diff --git a/ports/mimxrt10xx/common-hal/rtc/RTC.h b/ports/mimxrt10xx/common-hal/rtc/RTC.h new file mode 100644 index 0000000000..4965356c50 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/rtc/RTC.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_RTC_RTC_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_RTC_RTC_H + +extern void rtc_init(void); +extern void rtc_reset(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_RTC_RTC_H diff --git a/ports/mimxrt10xx/common-hal/rtc/__init__.c b/ports/mimxrt10xx/common-hal/rtc/__init__.c new file mode 100644 index 0000000000..e69de29bb2 diff --git a/ports/mimxrt10xx/common-hal/supervisor/Runtime.c b/ports/mimxrt10xx/common-hal/supervisor/Runtime.c new file mode 100755 index 0000000000..6be38f216a --- /dev/null +++ b/ports/mimxrt10xx/common-hal/supervisor/Runtime.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "shared-bindings/supervisor/Runtime.h" +#include "supervisor/serial.h" + +bool common_hal_get_serial_connected(void) { + return (bool) serial_connected(); +} + +bool common_hal_get_serial_bytes_available(void) { + return (bool) serial_bytes_available(); +} diff --git a/ports/mimxrt10xx/common-hal/supervisor/Runtime.h b/ports/mimxrt10xx/common-hal/supervisor/Runtime.h new file mode 100755 index 0000000000..11bb590635 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/supervisor/Runtime.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_SUPERVISOR_RUNTIME_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_SUPERVISOR_RUNTIME_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + // Stores no state currently. +} super_runtime_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_SUPERVISOR_RUNTIME_H diff --git a/ports/mimxrt10xx/common-hal/supervisor/__init__.c b/ports/mimxrt10xx/common-hal/supervisor/__init__.c new file mode 100755 index 0000000000..ac88556b45 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/supervisor/__init__.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include "py/obj.h" + +#include "shared-bindings/supervisor/__init__.h" +#include "shared-bindings/supervisor/Runtime.h" + + +// The singleton supervisor.Runtime object, bound to supervisor.runtime +// It currently only has properties, and no state. +const super_runtime_obj_t common_hal_supervisor_runtime_obj = { + .base = { + .type = &supervisor_runtime_type, + }, +}; \ No newline at end of file diff --git a/ports/mimxrt10xx/common-hal/time/__init__.c b/ports/mimxrt10xx/common-hal/time/__init__.c new file mode 100644 index 0000000000..2d82b3d1ad --- /dev/null +++ b/ports/mimxrt10xx/common-hal/time/__init__.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" + +#include "shared-bindings/time/__init__.h" + +#include "supervisor/shared/tick.h" + +inline uint64_t common_hal_time_monotonic() { + return supervisor_ticks_ms64(); +} + +void common_hal_time_delay_ms(uint32_t delay) { + mp_hal_delay_ms(delay); +} diff --git a/ports/mimxrt10xx/fatfs_port.c b/ports/mimxrt10xx/fatfs_port.c new file mode 100644 index 0000000000..c4ce18c2a7 --- /dev/null +++ b/ports/mimxrt10xx/fatfs_port.c @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" /* FatFs lower layer API */ +#include "lib/oofatfs/diskio.h" /* FatFs lower layer API */ +#include "lib/timeutils/timeutils.h" + +#if CIRCUITPY_RTC +#include "shared-bindings/rtc/RTC.h" +#endif + +DWORD get_fattime(void) { +#if CIRCUITPY_RTC + timeutils_struct_time_t tm; + common_hal_rtc_get_time(&tm); + return ((tm.tm_year - 1980) << 25) | (tm.tm_mon << 21) | (tm.tm_mday << 16) | + (tm.tm_hour << 11) | (tm.tm_min << 5) | (tm.tm_sec >> 1); +#else + return ((2016 - 1980) << 25) | ((9) << 21) | ((1) << 16) | ((16) << 11) | ((43) << 5) | (35 / 2); +#endif + + +} diff --git a/ports/mimxrt10xx/mpconfigport.h b/ports/mimxrt10xx/mpconfigport.h new file mode 100644 index 0000000000..47b793fed9 --- /dev/null +++ b/ports/mimxrt10xx/mpconfigport.h @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef __INCLUDED_MPCONFIGPORT_H +#define __INCLUDED_MPCONFIGPORT_H + +#define MICROPY_PY_SYS_PLATFORM "NXP IMXRT10XX" +#define SPI_FLASH_MAX_BAUDRATE 24000000 + +// 20kiB stack +#define CIRCUITPY_DEFAULT_STACK_SIZE 0x5000 +#define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (0) +#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) +#define MICROPY_PY_FUNCTION_ATTRS (0) +#define MICROPY_PY_IO (1) +#define MICROPY_PY_UJSON (1) +#define MICROPY_PY_REVERSE_SPECIAL_METHODS (0) + +#include "py/circuitpy_mpconfig.h" + +#define MICROPY_PORT_ROOT_POINTERS \ + CIRCUITPY_COMMON_ROOT_POINTERS \ + +// TODO: +// mp_obj_t playing_audio[AUDIO_DMA_CHANNEL_COUNT]; + +#endif // __INCLUDED_MPCONFIGPORT_H diff --git a/ports/mimxrt10xx/mpconfigport.mk b/ports/mimxrt10xx/mpconfigport.mk new file mode 100644 index 0000000000..f1106e88f0 --- /dev/null +++ b/ports/mimxrt10xx/mpconfigport.mk @@ -0,0 +1,20 @@ +# Define an equivalent for MICROPY_LONGINT_IMPL, to pass to $(MPY-TOOL) in py/mkrules.mk +# $(MPY-TOOL) needs to know what kind of longint to use (if any) to freeze long integers. +# This should correspond to the MICROPY_LONGINT_IMPL definition in mpconfigport.h. + +ifeq ($(LONGINT_IMPL),NONE) +MPY_TOOL_LONGINT_IMPL = -mlongint-impl=none +endif + +ifeq ($(LONGINT_IMPL),MPZ) +MPY_TOOL_LONGINT_IMPL = -mlongint-impl=mpz +endif + +ifeq ($(LONGINT_IMPL),LONGLONG) +MPY_TOOL_LONGINT_IMPL = -mlongint-impl=longlong +endif + +INTERNAL_LIBM = 1 + +USB_SERIAL_NUMBER_LENGTH = 32 +USB_MSC_MAX_PACKET_SIZE = 512 diff --git a/ports/mimxrt10xx/mphalport.c b/ports/mimxrt10xx/mphalport.c new file mode 100644 index 0000000000..b333730b9a --- /dev/null +++ b/ports/mimxrt10xx/mphalport.c @@ -0,0 +1,65 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mpstate.h" +#include "py/smallint.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "supervisor/shared/tick.h" + +#include "fsl_common.h" + +void mp_hal_delay_ms(mp_uint_t delay) { + uint64_t start_tick = supervisor_ticks_ms64(); + uint64_t duration = 0; + while (duration < delay) { + RUN_BACKGROUND_TASKS; + // Check to see if we've been CTRL-Ced by autoreload or the user. + if(MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)) || + MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception))) { + break; + } + duration = (supervisor_ticks_ms64() - start_tick); + // TODO(tannewt): Go to sleep for a little while while we wait. + } +} + +void mp_hal_delay_us(mp_uint_t delay) { +#ifdef MIMXRT1011_SERIES + SDK_DelayAtLeastUs(delay, SystemCoreClock); +#else + SDK_DelayAtLeastUs(delay); +#endif +} + +void mp_hal_disable_all_interrupts(void) { + common_hal_mcu_disable_interrupts(); +} + +void mp_hal_enable_all_interrupts(void) { + common_hal_mcu_enable_interrupts(); +} diff --git a/ports/mimxrt10xx/mphalport.h b/ports/mimxrt10xx/mphalport.h new file mode 100644 index 0000000000..1acc461b7e --- /dev/null +++ b/ports/mimxrt10xx/mphalport.h @@ -0,0 +1,52 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_MPHALPORT_H +#define MICROPY_INCLUDED_MIMXRT10XX_MPHALPORT_H + +#include "py/obj.h" + +#include "lib/oofatfs/ff.h" + +#include "supervisor/shared/tick.h" + +// Global millisecond tick count (driven by SysTick interrupt). +static inline mp_uint_t mp_hal_ticks_ms(void) { + return supervisor_ticks_ms32(); +} +// Number of bytes in receive buffer +volatile uint8_t usb_rx_count; +volatile bool mp_cdc_enabled; + +int receive_usb(void); + +void mp_hal_set_interrupt_char(int c); + +void mp_hal_disable_all_interrupts(void); +void mp_hal_enable_all_interrupts(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_MPHALPORT_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c new file mode 100644 index 0000000000..c039917856 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c @@ -0,0 +1,291 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +/* + * Copyright 2019 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "mpconfigport.h" + +#include "fsl_clock.h" +#include "fsl_iomuxc.h" + +#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */ +#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */ + +#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 500000000U /*!< Core clock frequency: 500000000Hz */ + +/* Clock outputs (values are in Hz): */ +#define BOARD_BOOTCLOCKRUN_ADC_ALT_CLK 40000000UL +#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL +#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL +#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL +#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL +#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL +#define BOARD_BOOTCLOCKRUN_CORE_CLK_ROOT 500000000UL +#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK 500000000UL +#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL +#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 132000000UL +#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 62500000UL +#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 62500000UL +#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 125000000UL +#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL +#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL +#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL +#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 62500000UL +#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL +#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL +#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL +#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL +#define BOARD_BOOTCLOCKRUN_USBPHY_CLK 0UL + +const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = { + .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */ + .numerator = 0, /* 30 bit numerator of fractional loop divider */ + .denominator = 1, /* 30 bit denominator of fractional loop divider */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; +const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = { + .loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; +const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN = { + .enableClkOutput500M = true, /* Enable the PLL providing the ENET 500MHz reference clock */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; + +// Based on the hello_world example in the SDK +void clocks_init(void) { + /* Init RTC OSC clock frequency. */ + CLOCK_SetRtcXtalFreq(32768U); + /* Enable 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK; + /* Use free 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK; + /* Set XTAL 24MHz clock frequency. */ + CLOCK_SetXtalFreq(24000000U); + /* Enable XTAL 24MHz clock source. */ + CLOCK_InitExternalClk(0); + /* Enable internal RC. */ + CLOCK_InitRcOsc24M(); + /* Switch clock source to external OSC. */ + CLOCK_SwitchOsc(kCLOCK_XtalOsc); + /* Set Oscillator ready counter value. */ + CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127); + /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */ + CLOCK_SetMux(kCLOCK_PeriphMux, 1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */ + /* Setting the VDD_SOC to 1.5V. It is necessary to config CORE to 500Mhz. */ + DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12); + /* Waiting for DCDC_STS_DC_OK bit is asserted */ + while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0)) + { + } + /* Set AHB_PODF. */ + CLOCK_SetDiv(kCLOCK_AhbDiv, 0); + /* Disable IPG clock gate. */ + CLOCK_DisableClock(kCLOCK_Adc1); + CLOCK_DisableClock(kCLOCK_Xbar1); + /* Set IPG_PODF. */ + CLOCK_SetDiv(kCLOCK_IpgDiv, 3); + /* Disable PERCLK clock gate. */ + CLOCK_DisableClock(kCLOCK_Gpt1); + CLOCK_DisableClock(kCLOCK_Gpt1S); + CLOCK_DisableClock(kCLOCK_Gpt2); + CLOCK_DisableClock(kCLOCK_Gpt2S); + CLOCK_DisableClock(kCLOCK_Pit); + /* Set PERCLK_PODF. */ + CLOCK_SetDiv(kCLOCK_PerclkDiv, 1); + /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. + * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left + * unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as + * well.*/ +#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) + /* Disable Flexspi clock gate. */ + CLOCK_DisableClock(kCLOCK_FlexSpi); + /* Set FLEXSPI_PODF. */ + CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3); + /* Set Flexspi clock source. */ + CLOCK_SetMux(kCLOCK_FlexspiMux, 0); + CLOCK_SetMux(kCLOCK_FlexspiSrcMux, 0); +#endif + /* Disable ADC_ACLK_EN clock gate. */ + CCM->CSCMR2 &= ~CCM_CSCMR2_ADC_ACLK_EN_MASK; + /* Set ADC_ACLK_PODF. */ + CLOCK_SetDiv(kCLOCK_AdcDiv, 11); + /* Disable LPSPI clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpspi1); + CLOCK_DisableClock(kCLOCK_Lpspi2); + /* Set LPSPI_PODF. */ + CLOCK_SetDiv(kCLOCK_LpspiDiv, 7); + /* Set Lpspi clock source. */ + CLOCK_SetMux(kCLOCK_LpspiMux, 1); + /* Disable TRACE clock gate. */ + CLOCK_DisableClock(kCLOCK_Trace); + /* Set TRACE_PODF. */ + CLOCK_SetDiv(kCLOCK_TraceDiv, 2); + /* Set Trace clock source. */ + CLOCK_SetMux(kCLOCK_TraceMux, 2); + /* Disable SAI1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai1); + /* Set SAI1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3); + /* Set SAI1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai1Div, 1); + /* Set Sai1 clock source. */ + CLOCK_SetMux(kCLOCK_Sai1Mux, 0); + /* Disable SAI3 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai3); + /* Set SAI3_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3); + /* Set SAI3_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai3Div, 1); + /* Set Sai3 clock source. */ + CLOCK_SetMux(kCLOCK_Sai3Mux, 0); + /* Disable Lpi2c clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpi2c1); + CLOCK_DisableClock(kCLOCK_Lpi2c2); + /* Set LPI2C_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 5U); + /* Set Lpi2c clock source. */ + CLOCK_SetMux(kCLOCK_Lpi2cMux, 0); + /* Disable UART clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpuart1); + CLOCK_DisableClock(kCLOCK_Lpuart2); + CLOCK_DisableClock(kCLOCK_Lpuart3); + CLOCK_DisableClock(kCLOCK_Lpuart4); + /* Set UART_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_UartDiv, 0); + /* Set Uart clock source. */ + CLOCK_SetMux(kCLOCK_UartMux, 0); + /* Disable SPDIF clock gate. */ + CLOCK_DisableClock(kCLOCK_Spdif); + /* Set SPDIF0_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1); + /* Set SPDIF0_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Spdif0Div, 7); + /* Set Spdif clock source. */ + CLOCK_SetMux(kCLOCK_SpdifMux, 3); + /* Disable Flexio1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Flexio1); + /* Set FLEXIO1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1); + /* Set FLEXIO1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Flexio1Div, 7); + /* Set Flexio1 clock source. */ + CLOCK_SetMux(kCLOCK_Flexio1Mux, 3); + /* Set Pll3 sw clock source. */ + CLOCK_SetMux(kCLOCK_Pll3SwMux, 0); + /* Init System PLL. */ + CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN); + /* Init System pfd0. */ + CLOCK_InitSysPfd(kCLOCK_Pfd0, 27); + /* Init System pfd1. */ + CLOCK_InitSysPfd(kCLOCK_Pfd1, 16); + /* Init System pfd2. */ + CLOCK_InitSysPfd(kCLOCK_Pfd2, 18); + /* Init System pfd3. */ + CLOCK_InitSysPfd(kCLOCK_Pfd3, 18); + /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. + * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left + * unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as + * well.*/ +#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) + /* Init Usb1 PLL. */ + CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN); + /* Init Usb1 pfd0. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22); + /* Init Usb1 pfd1. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16); + /* Init Usb1 pfd2. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17); + /* Init Usb1 pfd3. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18); + /* Disable Usb1 PLL output for USBPHY1. */ + CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK; +#endif + /* DeInit Audio PLL. */ + CLOCK_DeinitAudioPll(); + /* Bypass Audio PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1); + /* Set divider for Audio PLL. */ + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK; + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK; + /* Enable Audio PLL output. */ + CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK; + /* Init Enet PLL. */ + CLOCK_InitEnetPll(&enetPllConfig_BOARD_BootClockRUN); + /* Set preperiph clock source. */ + CLOCK_SetMux(kCLOCK_PrePeriphMux, 3); + /* Set periph clock source. */ + CLOCK_SetMux(kCLOCK_PeriphMux, 0); + /* Set periph clock2 clock source. */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0); + /* Set per clock source. */ + CLOCK_SetMux(kCLOCK_PerclkMux, 0); + /* Set clock out1 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0); + /* Set clock out1 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1); + /* Set clock out2 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); + /* Set clock out2 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18); + /* Set clock out1 drives clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK; + /* Disable clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; + /* Disable clock out2. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK; + /* Set SAI1 MCLK1 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0); + /* Set SAI1 MCLK2 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0); + /* Set SAI1 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0); + /* Set SAI3 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0); + /* Set MQS configuration. */ + IOMUXC_MQSConfig(IOMUXC_GPR, kIOMUXC_MqsPwmOverSampleRate32, 0); + /* Set GPT1 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK; + /* Set GPT2 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK; + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; + + CLOCK_EnableClock(kCLOCK_Iomuxc); +} diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c new file mode 100644 index 0000000000..e9d735830f --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c @@ -0,0 +1,148 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/periph.h" + +LPI2C_Type *mcu_i2c_banks[] = { LPI2C1, LPI2C2 }; + +const mcu_periph_obj_t mcu_i2c_sda_list[8] = { + PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_13), + PERIPH_PIN(1, 1, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 1, &pin_GPIO_SD_05), + PERIPH_PIN(1, 1, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 2, &pin_GPIO_11), + PERIPH_PIN(1, 3, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 3, &pin_GPIO_01), + + PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_07), + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 1, &pin_GPIO_AD_01), + PERIPH_PIN(2, 1, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 2, &pin_GPIO_SD_07), + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 3, &pin_GPIO_09), +}; + +const mcu_periph_obj_t mcu_i2c_scl_list[8] = { + PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_14), + PERIPH_PIN(1, 1, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_06), + PERIPH_PIN(1, 1, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 2, &pin_GPIO_12), + PERIPH_PIN(1, 3, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 3, &pin_GPIO_02), + + PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_08), + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_02), + PERIPH_PIN(2, 1, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 2, &pin_GPIO_SD_08), + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 3, &pin_GPIO_10), +}; + +LPSPI_Type *mcu_spi_banks[] = { LPSPI1, LPSPI2 }; + +const mcu_periph_obj_t mcu_spi_sck_list[4] = { + PERIPH_PIN(1, 0, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_06), + PERIPH_PIN(1, 2, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 1, &pin_GPIO_SD_08), + + PERIPH_PIN(2, 0, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_12), + PERIPH_PIN(2, 1, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_SD_11), +}; + +const mcu_periph_obj_t mcu_spi_mosi_list[4] = { + PERIPH_PIN(1, 0, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_04), + PERIPH_PIN(1, 2, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 1, &pin_GPIO_SD_06), + + PERIPH_PIN(2, 0, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_10), + PERIPH_PIN(2, 1, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_SD_10), +}; + +const mcu_periph_obj_t mcu_spi_miso_list[4] = { + PERIPH_PIN(1, 0, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_03), + PERIPH_PIN(1, 2, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 1, &pin_GPIO_SD_05), + + PERIPH_PIN(2, 0, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_09), + PERIPH_PIN(2, 1, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_SD_09), +}; + +LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4 }; + +const mcu_periph_obj_t mcu_uart_rx_list[9] = { + PERIPH_PIN(1, 2, kIOMUXC_LPUART1_RXD_SELECT_INPUT, 0, &pin_GPIO_SD_11), + PERIPH_PIN(1, 0, kIOMUXC_LPUART1_RXD_SELECT_INPUT, 1, &pin_GPIO_09), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RXD_SELECT_INPUT, 0, &pin_GPIO_SD_09), + PERIPH_PIN(2, 0, kIOMUXC_LPUART2_RXD_SELECT_INPUT, 1, &pin_GPIO_13), + + PERIPH_PIN(3, 1, kIOMUXC_LPUART3_RXD_SELECT_INPUT, 0, &pin_GPIO_AD_07), + PERIPH_PIN(3, 0, kIOMUXC_LPUART3_RXD_SELECT_INPUT, 1, &pin_GPIO_11), + PERIPH_PIN(3, 3, kIOMUXC_LPUART3_RXD_SELECT_INPUT, 2, &pin_GPIO_07), + + PERIPH_PIN(4, 0, kIOMUXC_LPUART4_RXD_SELECT_INPUT, 0, &pin_GPIO_AD_01), + PERIPH_PIN(4, 3, kIOMUXC_LPUART4_RXD_SELECT_INPUT, 1, &pin_GPIO_05), +}; + +const mcu_periph_obj_t mcu_uart_tx_list[9] = { + PERIPH_PIN(1, 2, kIOMUXC_LPUART1_TXD_SELECT_INPUT, 0, &pin_GPIO_SD_12), + PERIPH_PIN(1, 0, kIOMUXC_LPUART1_TXD_SELECT_INPUT, 1, &pin_GPIO_10), + + PERIPH_PIN(2, 0, kIOMUXC_LPUART2_TXD_SELECT_INPUT, 0, &pin_GPIO_AD_00), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TXD_SELECT_INPUT, 1, &pin_GPIO_SD_10), + + PERIPH_PIN(3, 1, kIOMUXC_LPUART3_TXD_SELECT_INPUT, 0, &pin_GPIO_AD_08), + PERIPH_PIN(3, 0, kIOMUXC_LPUART3_TXD_SELECT_INPUT, 1, &pin_GPIO_12), + PERIPH_PIN(3, 3, kIOMUXC_LPUART3_TXD_SELECT_INPUT, 2, &pin_GPIO_08), + + PERIPH_PIN(4, 0, kIOMUXC_LPUART4_TXD_SELECT_INPUT, 0, &pin_GPIO_AD_02), + PERIPH_PIN(4, 3, kIOMUXC_LPUART4_TXD_SELECT_INPUT, 1, &pin_GPIO_06), +}; + +const mcu_pwm_obj_t mcu_pwm_list[20] = { + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_02), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_SD_02), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 2, &pin_GPIO_01), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 2, &pin_GPIO_SD_01), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 1, &pin_GPIO_AD_12), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 2, &pin_GPIO_04), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 2, &pin_GPIO_SD_04), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 2, &pin_GPIO_03), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 2, &pin_GPIO_SD_03), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 1, &pin_GPIO_AD_11), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 2, &pin_GPIO_06), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 2, &pin_GPIO_AD_04), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 2, &pin_GPIO_05), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 2, &pin_GPIO_AD_03), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 1, &pin_GPIO_AD_10), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_08), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_AD_06), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_07), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_AD_05), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmX, 1, &pin_GPIO_AD_09), +}; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h new file mode 100644 index 0000000000..c91d5808af --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h @@ -0,0 +1,42 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H + +extern const mcu_periph_obj_t mcu_i2c_sda_list[8]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[8]; + +extern const mcu_periph_obj_t mcu_spi_sck_list[4]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[4]; +extern const mcu_periph_obj_t mcu_spi_miso_list[4]; + +extern const mcu_periph_obj_t mcu_uart_rx_list[9]; +extern const mcu_periph_obj_t mcu_uart_tx_list[9]; + +extern const mcu_pwm_obj_t mcu_pwm_list[20]; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIP_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c new file mode 100644 index 0000000000..0b219468f5 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c @@ -0,0 +1,77 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/pins.h" + +const mcu_pin_obj_t pin_GPIO_00 = PIN(GPIO1, 0, GPIO_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_01 = PIN(GPIO1, 1, GPIO_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_02 = PIN(GPIO1, 2, GPIO_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_03 = PIN(GPIO1, 3, GPIO_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_04 = PIN(GPIO1, 4, GPIO_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_05 = PIN(GPIO1, 5, GPIO_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_06 = PIN(GPIO1, 6, GPIO_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_07 = PIN(GPIO1, 7, GPIO_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_08 = PIN(GPIO1, 8, GPIO_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_09 = PIN(GPIO1, 9, GPIO_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_10 = PIN(GPIO1, 10, GPIO_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_11 = PIN(GPIO1, 11, GPIO_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_12 = PIN(GPIO1, 12, GPIO_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_13 = PIN(GPIO1, 13, GPIO_11, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_AD_00 = PIN(GPIO1, 14, GPIO_AD_00, ADC1, 0); +const mcu_pin_obj_t pin_GPIO_AD_01 = PIN(GPIO1, 15, GPIO_AD_01, ADC1, 1); +const mcu_pin_obj_t pin_GPIO_AD_02 = PIN(GPIO1, 16, GPIO_AD_02, ADC1, 2); +const mcu_pin_obj_t pin_GPIO_AD_03 = PIN(GPIO1, 17, GPIO_AD_03, ADC1, 3); +const mcu_pin_obj_t pin_GPIO_AD_04 = PIN(GPIO1, 18, GPIO_AD_04, ADC1, 4); +const mcu_pin_obj_t pin_GPIO_AD_05 = PIN(GPIO1, 19, GPIO_AD_05, ADC1, 5); +const mcu_pin_obj_t pin_GPIO_AD_06 = PIN(GPIO1, 20, GPIO_AD_06, ADC1, 6); +const mcu_pin_obj_t pin_GPIO_AD_07 = PIN(GPIO1, 21, GPIO_AD_07, ADC1, 7); +const mcu_pin_obj_t pin_GPIO_AD_08 = PIN(GPIO1, 22, GPIO_AD_08, ADC1, 8); +const mcu_pin_obj_t pin_GPIO_AD_09 = PIN(GPIO1, 23, GPIO_AD_09, ADC1, 9); +const mcu_pin_obj_t pin_GPIO_AD_10 = PIN(GPIO1, 24, GPIO_AD_10, ADC1, 10); +const mcu_pin_obj_t pin_GPIO_AD_11 = PIN(GPIO1, 25, GPIO_AD_11, ADC1, 11); +const mcu_pin_obj_t pin_GPIO_AD_12 = PIN(GPIO1, 26, GPIO_AD_12, ADC1, 12); +const mcu_pin_obj_t pin_GPIO_AD_13 = PIN(GPIO1, 27, GPIO_AD_13, ADC1, 13); +const mcu_pin_obj_t pin_GPIO_AD_14 = PIN(GPIO1, 28, GPIO_AD_14, ADC1, 14); + +const mcu_pin_obj_t pin_GPIO_SD_00 = PIN(GPIO2, 0, GPIO_SD_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_01 = PIN(GPIO2, 1, GPIO_SD_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_02 = PIN(GPIO2, 2, GPIO_SD_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_03 = PIN(GPIO2, 3, GPIO_SD_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_04 = PIN(GPIO2, 4, GPIO_SD_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_05 = PIN(GPIO2, 5, GPIO_SD_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_06 = PIN(GPIO2, 6, GPIO_SD_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_07 = PIN(GPIO2, 7, GPIO_SD_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_08 = PIN(GPIO2, 8, GPIO_SD_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_09 = PIN(GPIO2, 9, GPIO_SD_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_10 = PIN(GPIO2, 10, GPIO_SD_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_11 = PIN(GPIO2, 11, GPIO_SD_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_12 = PIN(GPIO2, 12, GPIO_SD_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_13 = PIN(GPIO2, 13, GPIO_SD_13, NO_ADC, 0); + diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.h new file mode 100644 index 0000000000..6b31d6d8ed --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.h @@ -0,0 +1,77 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PINS_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PINS_H + +extern const mcu_pin_obj_t pin_GPIO_00; +extern const mcu_pin_obj_t pin_GPIO_01; +extern const mcu_pin_obj_t pin_GPIO_02; +extern const mcu_pin_obj_t pin_GPIO_03; +extern const mcu_pin_obj_t pin_GPIO_04; +extern const mcu_pin_obj_t pin_GPIO_05; +extern const mcu_pin_obj_t pin_GPIO_06; +extern const mcu_pin_obj_t pin_GPIO_07; +extern const mcu_pin_obj_t pin_GPIO_08; +extern const mcu_pin_obj_t pin_GPIO_09; +extern const mcu_pin_obj_t pin_GPIO_10; +extern const mcu_pin_obj_t pin_GPIO_11; +extern const mcu_pin_obj_t pin_GPIO_12; +extern const mcu_pin_obj_t pin_GPIO_13; + +extern const mcu_pin_obj_t pin_GPIO_SD_00; +extern const mcu_pin_obj_t pin_GPIO_SD_01; +extern const mcu_pin_obj_t pin_GPIO_SD_02; +extern const mcu_pin_obj_t pin_GPIO_SD_03; +extern const mcu_pin_obj_t pin_GPIO_SD_04; +extern const mcu_pin_obj_t pin_GPIO_SD_05; +extern const mcu_pin_obj_t pin_GPIO_SD_06; +extern const mcu_pin_obj_t pin_GPIO_SD_07; +extern const mcu_pin_obj_t pin_GPIO_SD_08; +extern const mcu_pin_obj_t pin_GPIO_SD_09; +extern const mcu_pin_obj_t pin_GPIO_SD_10; +extern const mcu_pin_obj_t pin_GPIO_SD_11; +extern const mcu_pin_obj_t pin_GPIO_SD_12; +extern const mcu_pin_obj_t pin_GPIO_SD_13; +extern const mcu_pin_obj_t pin_GPIO_SD_14; + +extern const mcu_pin_obj_t pin_GPIO_AD_00; +extern const mcu_pin_obj_t pin_GPIO_AD_01; +extern const mcu_pin_obj_t pin_GPIO_AD_02; +extern const mcu_pin_obj_t pin_GPIO_AD_03; +extern const mcu_pin_obj_t pin_GPIO_AD_04; +extern const mcu_pin_obj_t pin_GPIO_AD_05; +extern const mcu_pin_obj_t pin_GPIO_AD_06; +extern const mcu_pin_obj_t pin_GPIO_AD_07; +extern const mcu_pin_obj_t pin_GPIO_AD_08; +extern const mcu_pin_obj_t pin_GPIO_AD_09; +extern const mcu_pin_obj_t pin_GPIO_AD_10; +extern const mcu_pin_obj_t pin_GPIO_AD_11; +extern const mcu_pin_obj_t pin_GPIO_AD_12; +extern const mcu_pin_obj_t pin_GPIO_AD_13; +extern const mcu_pin_obj_t pin_GPIO_AD_14; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PINS_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c new file mode 100644 index 0000000000..cafc8efc3b --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c @@ -0,0 +1,364 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +/* + * Copyright 2019 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "mpconfigport.h" + +#include "fsl_clock.h" +#include "fsl_iomuxc.h" + +#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */ +#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */ +#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 600000000U /*!< Core clock frequency: 600000000Hz */ + +const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN = + { + .loopDivider = 100, /* PLL loop divider, Fout = Fin * 50 */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ + }; +const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = + { + .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */ + .numerator = 0, /* 30 bit numerator of fractional loop divider */ + .denominator = 1, /* 30 bit denominator of fractional loop divider */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ + }; +const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = + { + .loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ + }; + +// Based on the hello_world example in the SDK +void clocks_init(void) { + /* Init RTC OSC clock frequency. */ + CLOCK_SetRtcXtalFreq(32768U); + /* Enable 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK; + /* Use free 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK; + /* Set XTAL 24MHz clock frequency. */ + CLOCK_SetXtalFreq(24000000U); + /* Enable XTAL 24MHz clock source. */ + CLOCK_InitExternalClk(0); + /* Enable internal RC. */ + CLOCK_InitRcOsc24M(); + /* Switch clock source to external OSC. */ + CLOCK_SwitchOsc(kCLOCK_XtalOsc); + /* Set Oscillator ready counter value. */ + CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127); + /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */ + CLOCK_SetMux(kCLOCK_PeriphMux, 1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */ + /* Setting the VDD_SOC to 1.275V. It is necessary to config AHB to 600Mhz. */ + DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x13); + /* Waiting for DCDC_STS_DC_OK bit is asserted */ + while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0)) + { + } + /* Set AHB_PODF. */ + CLOCK_SetDiv(kCLOCK_AhbDiv, 0); + /* Disable IPG clock gate. */ + CLOCK_DisableClock(kCLOCK_Adc1); + CLOCK_DisableClock(kCLOCK_Adc2); + CLOCK_DisableClock(kCLOCK_Xbar1); + CLOCK_DisableClock(kCLOCK_Xbar2); + /* Set IPG_PODF. */ + CLOCK_SetDiv(kCLOCK_IpgDiv, 3); + /* Set ARM_PODF. */ + CLOCK_SetDiv(kCLOCK_ArmDiv, 1); + /* Set PERIPH_CLK2_PODF. */ + CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0); + /* Disable PERCLK clock gate. */ + CLOCK_DisableClock(kCLOCK_Gpt1); + CLOCK_DisableClock(kCLOCK_Gpt1S); + CLOCK_DisableClock(kCLOCK_Gpt2); + CLOCK_DisableClock(kCLOCK_Gpt2S); + CLOCK_DisableClock(kCLOCK_Pit); + /* Set PERCLK_PODF. */ + CLOCK_SetDiv(kCLOCK_PerclkDiv, 1); + /* Disable USDHC1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Usdhc1); + /* Set USDHC1_PODF. */ + CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1); + /* Set Usdhc1 clock source. */ + CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0); + /* Disable USDHC2 clock gate. */ + CLOCK_DisableClock(kCLOCK_Usdhc2); + /* Set USDHC2_PODF. */ + CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1); + /* Set Usdhc2 clock source. */ + CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0); + /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. + * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged. + * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/ +#ifndef SKIP_SYSCLK_INIT + /* Disable Semc clock gate. */ + CLOCK_DisableClock(kCLOCK_Semc); + /* Set SEMC_PODF. */ + CLOCK_SetDiv(kCLOCK_SemcDiv, 7); + /* Set Semc alt clock source. */ + CLOCK_SetMux(kCLOCK_SemcAltMux, 0); + /* Set Semc clock source. */ + CLOCK_SetMux(kCLOCK_SemcMux, 0); +#endif + /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. + * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged. + * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/ +#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) + /* Disable Flexspi clock gate. */ + CLOCK_DisableClock(kCLOCK_FlexSpi); + /* Set FLEXSPI_PODF. */ + CLOCK_SetDiv(kCLOCK_FlexspiDiv, 1); + /* Set Flexspi clock source. */ + CLOCK_SetMux(kCLOCK_FlexspiMux, 3); +#endif + /* Disable LPSPI clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpspi1); + CLOCK_DisableClock(kCLOCK_Lpspi2); + CLOCK_DisableClock(kCLOCK_Lpspi3); + CLOCK_DisableClock(kCLOCK_Lpspi4); + /* Set LPSPI_PODF. */ + CLOCK_SetDiv(kCLOCK_LpspiDiv, 4); + /* Set Lpspi clock source. */ + CLOCK_SetMux(kCLOCK_LpspiMux, 2); + /* Disable TRACE clock gate. */ + CLOCK_DisableClock(kCLOCK_Trace); + /* Set TRACE_PODF. */ + CLOCK_SetDiv(kCLOCK_TraceDiv, 2); + /* Set Trace clock source. */ + CLOCK_SetMux(kCLOCK_TraceMux, 2); + /* Disable SAI1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai1); + /* Set SAI1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3); + /* Set SAI1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai1Div, 1); + /* Set Sai1 clock source. */ + CLOCK_SetMux(kCLOCK_Sai1Mux, 0); + /* Disable SAI2 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai2); + /* Set SAI2_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3); + /* Set SAI2_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai2Div, 1); + /* Set Sai2 clock source. */ + CLOCK_SetMux(kCLOCK_Sai2Mux, 0); + /* Disable SAI3 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai3); + /* Set SAI3_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3); + /* Set SAI3_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai3Div, 1); + /* Set Sai3 clock source. */ + CLOCK_SetMux(kCLOCK_Sai3Mux, 0); + /* Disable Lpi2c clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpi2c1); + CLOCK_DisableClock(kCLOCK_Lpi2c2); + CLOCK_DisableClock(kCLOCK_Lpi2c3); + /* Set LPI2C_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0); + /* Set Lpi2c clock source. */ + CLOCK_SetMux(kCLOCK_Lpi2cMux, 0); + /* Disable CAN clock gate. */ + CLOCK_DisableClock(kCLOCK_Can1); + CLOCK_DisableClock(kCLOCK_Can2); + CLOCK_DisableClock(kCLOCK_Can3); + CLOCK_DisableClock(kCLOCK_Can1S); + CLOCK_DisableClock(kCLOCK_Can2S); + CLOCK_DisableClock(kCLOCK_Can3S); + /* Set CAN_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_CanDiv, 1); + /* Set Can clock source. */ + CLOCK_SetMux(kCLOCK_CanMux, 2); + /* Disable UART clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpuart1); + CLOCK_DisableClock(kCLOCK_Lpuart2); + CLOCK_DisableClock(kCLOCK_Lpuart3); + CLOCK_DisableClock(kCLOCK_Lpuart4); + CLOCK_DisableClock(kCLOCK_Lpuart5); + CLOCK_DisableClock(kCLOCK_Lpuart6); + CLOCK_DisableClock(kCLOCK_Lpuart7); + CLOCK_DisableClock(kCLOCK_Lpuart8); + /* Set UART_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_UartDiv, 0); + /* Set Uart clock source. */ + CLOCK_SetMux(kCLOCK_UartMux, 0); + /* Disable SPDIF clock gate. */ + CLOCK_DisableClock(kCLOCK_Spdif); + /* Set SPDIF0_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1); + /* Set SPDIF0_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Spdif0Div, 7); + /* Set Spdif clock source. */ + CLOCK_SetMux(kCLOCK_SpdifMux, 3); + /* Disable Flexio1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Flexio1); + /* Set FLEXIO1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1); + /* Set FLEXIO1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Flexio1Div, 7); + /* Set Flexio1 clock source. */ + CLOCK_SetMux(kCLOCK_Flexio1Mux, 3); + /* Disable Flexio2 clock gate. */ + CLOCK_DisableClock(kCLOCK_Flexio2); + /* Set FLEXIO2_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1); + /* Set FLEXIO2_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Flexio2Div, 7); + /* Set Flexio2 clock source. */ + CLOCK_SetMux(kCLOCK_Flexio2Mux, 3); + /* Set Pll3 sw clock source. */ + CLOCK_SetMux(kCLOCK_Pll3SwMux, 0); + /* Init ARM PLL. */ + CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN); + /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. + * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged. + * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/ +#ifndef SKIP_SYSCLK_INIT + /* Init System PLL. */ + CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN); + /* Init System pfd0. */ + CLOCK_InitSysPfd(kCLOCK_Pfd0, 27); + /* Init System pfd1. */ + CLOCK_InitSysPfd(kCLOCK_Pfd1, 16); + /* Init System pfd2. */ + CLOCK_InitSysPfd(kCLOCK_Pfd2, 24); + /* Init System pfd3. */ + CLOCK_InitSysPfd(kCLOCK_Pfd3, 16); +#endif + /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. + * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged. + * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/ +#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) + /* Init Usb1 PLL. */ + CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN); + /* Init Usb1 pfd0. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33); + /* Init Usb1 pfd1. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16); + /* Init Usb1 pfd2. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17); + /* Init Usb1 pfd3. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19); + /* Disable Usb1 PLL output for USBPHY1. */ + CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK; +#endif + /* DeInit Audio PLL. */ + CLOCK_DeinitAudioPll(); + /* Bypass Audio PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1); + /* Set divider for Audio PLL. */ + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK; + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK; + /* Enable Audio PLL output. */ + CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK; + /* DeInit Video PLL. */ + CLOCK_DeinitVideoPll(); + /* Bypass Video PLL. */ + CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_BYPASS_MASK; + /* Set divider for Video PLL. */ + CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(0); + /* Enable Video PLL output. */ + CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; + /* DeInit Enet PLL. */ + CLOCK_DeinitEnetPll(); + /* Bypass Enet PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1); + /* Set Enet output divider. */ + CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1); + /* Enable Enet output. */ + CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK; + /* Set Enet2 output divider. */ + CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT(0); + /* Enable Enet2 output. */ + CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET2_REF_EN_MASK; + /* Enable Enet25M output. */ + CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK; + /* DeInit Usb2 PLL. */ + CLOCK_DeinitUsb2Pll(); + /* Bypass Usb2 PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllUsb2, 1); + /* Enable Usb2 PLL output. */ + CCM_ANALOG->PLL_USB2 |= CCM_ANALOG_PLL_USB2_ENABLE_MASK; + /* Set preperiph clock source. */ + CLOCK_SetMux(kCLOCK_PrePeriphMux, 3); + /* Set periph clock source. */ + CLOCK_SetMux(kCLOCK_PeriphMux, 0); + /* Set periph clock2 clock source. */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0); + /* Set per clock source. */ + CLOCK_SetMux(kCLOCK_PerclkMux, 0); + /* Set lvds1 clock source. */ + CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0); + /* Set clock out1 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0); + /* Set clock out1 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1); + /* Set clock out2 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); + /* Set clock out2 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18); + /* Set clock out1 drives clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK; + /* Disable clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; + /* Disable clock out2. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK; + /* Set SAI1 MCLK1 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0); + /* Set SAI1 MCLK2 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0); + /* Set SAI1 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0); + /* Set SAI2 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0); + /* Set SAI3 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0); + /* Set MQS configuration. */ + IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0); + /* Set ENET1 Tx clock source. */ + IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1RefClkMode, false); + /* Set ENET2 Tx clock source. */ +#if defined(FSL_IOMUXC_DRIVER_VERSION) && (FSL_IOMUXC_DRIVER_VERSION != (MAKE_VERSION(2, 0, 0))) + IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET2RefClkMode, false); +#else + IOMUXC_EnableMode(IOMUXC_GPR, IOMUXC_GPR_GPR1_ENET2_CLK_SEL_MASK, false); +#endif + /* Set GPT1 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK; + /* Set GPT2 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK; + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; + + CLOCK_EnableClock(kCLOCK_Iomuxc); +} diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c new file mode 100644 index 0000000000..fc90e2374d --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c @@ -0,0 +1,270 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS R COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/periph.h" + +LPI2C_Type *mcu_i2c_banks[] = { LPI2C1, LPI2C2, LPI2C3, LPI2C4 }; + +const mcu_periph_obj_t mcu_i2c_sda_list[9] = { + PERIPH_PIN(1, 2, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_SD_B1_05), + PERIPH_PIN(1, 3, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 1, &pin_GPIO_AD_B1_01), + + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 0, &pin_GPIO_SD_B1_10), + PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 1, &pin_GPIO_B0_05), + + PERIPH_PIN(3, 2, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 0, &pin_GPIO_EMC_21), + PERIPH_PIN(3, 2, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 1, &pin_GPIO_SD_B0_01), + PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 2, &pin_GPIO_AD_B1_06), + + PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 0, &pin_GPIO_EMC_11), + PERIPH_PIN(4, 0, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 1, &pin_GPIO_AD_B0_13), +}; + +const mcu_periph_obj_t mcu_i2c_scl_list[9] = { + PERIPH_PIN(1, 2, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 0, &pin_GPIO_SD_B1_04), + PERIPH_PIN(1, 3, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_B1_00), + + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 0, &pin_GPIO_SD_B1_11), + PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 1, &pin_GPIO_B0_04), + + PERIPH_PIN(3, 2, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 0, &pin_GPIO_EMC_22), + PERIPH_PIN(3, 2, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_B0_00), + PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 2, &pin_GPIO_AD_B1_07), + + PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 0, &pin_GPIO_EMC_12), + PERIPH_PIN(4, 0, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_B0_12), +}; + +LPSPI_Type *mcu_spi_banks[] = { LPSPI1, LPSPI2, LPSPI3, LPSPI4 }; + +const mcu_periph_obj_t mcu_spi_sck_list[8] = { + PERIPH_PIN(1, 3, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_EMC_27), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 1, &pin_GPIO_SD_B0_00), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_SD_B1_07), + PERIPH_PIN(2, 2, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_EMC_00), + + PERIPH_PIN(3, 7, kIOMUXC_LPSPI3_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B0_00), + PERIPH_PIN(3, 2, kIOMUXC_LPSPI3_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B1_15), + + PERIPH_PIN(4, 3, kIOMUXC_LPSPI4_SCK_SELECT_INPUT, 0, &pin_GPIO_B0_03), + PERIPH_PIN(4, 1, kIOMUXC_LPSPI4_SCK_SELECT_INPUT, 1, &pin_GPIO_B1_07), +}; + +const mcu_periph_obj_t mcu_spi_mosi_list[8] = { + PERIPH_PIN(1, 3, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 0, &pin_GPIO_EMC_28), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 1, &pin_GPIO_SD_B0_02), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_SD_B1_08), + PERIPH_PIN(2, 2, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_EMC_02), + + PERIPH_PIN(3, 7, kIOMUXC_LPSPI3_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B0_01), + PERIPH_PIN(3, 2, kIOMUXC_LPSPI3_SDO_SELECT_INPUT, 1, &pin_GPIO_AD_B1_14), + + PERIPH_PIN(4, 3, kIOMUXC_LPSPI4_SDO_SELECT_INPUT, 0, &pin_GPIO_B0_02), + PERIPH_PIN(4, 1, kIOMUXC_LPSPI4_SDO_SELECT_INPUT, 1, &pin_GPIO_B1_06), +}; + +const mcu_periph_obj_t mcu_spi_miso_list[8] = { + PERIPH_PIN(1, 3, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 0, &pin_GPIO_EMC_29), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 1, &pin_GPIO_SD_B0_03), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_SD_B1_09), + PERIPH_PIN(2, 2, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_03), + + PERIPH_PIN(3, 7, kIOMUXC_LPSPI3_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B0_02), + PERIPH_PIN(3, 2, kIOMUXC_LPSPI3_SDI_SELECT_INPUT, 1, &pin_GPIO_AD_B1_13), + + PERIPH_PIN(4, 3, kIOMUXC_LPSPI4_SDI_SELECT_INPUT, 0, &pin_GPIO_B0_01), + PERIPH_PIN(4, 1, kIOMUXC_LPSPI4_SDI_SELECT_INPUT, 1, &pin_GPIO_B1_05), +}; + +LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 }; + +const mcu_periph_obj_t mcu_uart_rx_list[18] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_13), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_10), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_03), + + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 0, &pin_GPIO_AD_B1_07), + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_14), + PERIPH_PIN(3, 3, kIOMUXC_LPUART3_RX_SELECT_INPUT, 2, &pin_GPIO_B0_09), + + PERIPH_PIN(4, 4, kIOMUXC_LPUART4_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_01), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_20), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 2, &pin_GPIO_B1_01), + + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_24), + PERIPH_PIN(5, 1, kIOMUXC_LPUART5_RX_SELECT_INPUT, 1, &pin_GPIO_B1_13), + + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_26), + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_03), + + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_32), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_09), + + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B0_05), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_11), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 2, &pin_GPIO_EMC_39), +}; + +const mcu_periph_obj_t mcu_uart_tx_list[18] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_12), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_11), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_02), + + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 0, &pin_GPIO_AD_B1_06), + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_13), + PERIPH_PIN(3, 3, kIOMUXC_LPUART3_TX_SELECT_INPUT, 2, &pin_GPIO_B0_08), + + PERIPH_PIN(4, 4, kIOMUXC_LPUART4_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_00), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_19), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 2, &pin_GPIO_B1_00), + + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_23), + PERIPH_PIN(5, 1, kIOMUXC_LPUART5_TX_SELECT_INPUT, 1, &pin_GPIO_B1_12), + + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_25), + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_02), + + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_08), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_31), + + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B0_04), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_10), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 2, &pin_GPIO_EMC_38), +}; + +const mcu_pwm_obj_t mcu_pwm_list[67] = { + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_23), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_SD_B0_00), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_24), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_SD_B0_01), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 4, &pin_GPIO_AD_B0_02), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_25), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_SD_B0_02), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_26), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_SD_B0_03), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 4, &pin_GPIO_AD_B0_03), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_27), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_SD_B0_04), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_28), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_SD_B0_05), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 4, &pin_GPIO_AD_B0_12), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_AD_B0_10), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_38), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_SD_B1_00), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 4, &pin_GPIO_EMC_12), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 6, &pin_GPIO_B1_00), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_AD_B0_11), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_39), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_SD_B1_01), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 4, &pin_GPIO_EMC_13), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 6, &pin_GPIO_B1_01), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmX, 4, &pin_GPIO_AD_B0_13), + + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_06), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_B0_06), + + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_07), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 2, &pin_GPIO_B0_07), + + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_08), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 2, &pin_GPIO_B0_08), + + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_09), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 2, &pin_GPIO_B0_09), + + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_10), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 2, &pin_GPIO_B0_10), + + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_11), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 2, &pin_GPIO_B0_11), + + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 0, &pin_GPIO_AD_B0_00), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_AD_B0_09), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_19), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_SD_B1_02), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 6, &pin_GPIO_B1_02), + + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 0, &pin_GPIO_AD_B0_01), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_20), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_SD_B1_03), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 6, &pin_GPIO_B1_03), + + PWM_PIN(PWM3, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_29), + + PWM_PIN(PWM3, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_30), + + PWM_PIN(PWM3, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_31), + + PWM_PIN(PWM3, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_32), + + PWM_PIN(PWM3, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_33), + + PWM_PIN(PWM3, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_34), + + PWM_PIN(PWM3, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_21), + + PWM_PIN(PWM3, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_22), + + PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_AD_B1_08), + PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_00), + + PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_01), + + PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_AD_B1_09), + PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_02), + + PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_03), + + PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_B1_14), + PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_04), + + PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_05), + + PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_B1_15), + PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_17), + + PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_18), + +}; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h new file mode 100644 index 0000000000..b069ca76bb --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h @@ -0,0 +1,42 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H + +extern const mcu_periph_obj_t mcu_i2c_sda_list[9]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[9]; + +extern const mcu_periph_obj_t mcu_spi_sck_list[8]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[8]; +extern const mcu_periph_obj_t mcu_spi_miso_list[8]; + +extern const mcu_periph_obj_t mcu_uart_rx_list[18]; +extern const mcu_periph_obj_t mcu_uart_tx_list[18]; + +extern const mcu_pwm_obj_t mcu_pwm_list[67]; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.c new file mode 100644 index 0000000000..c622e759ae --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.c @@ -0,0 +1,161 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/pins.h" + +const mcu_pin_obj_t pin_GPIO_EMC_00 = PIN(GPIO4, 0, GPIO_EMC_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_01 = PIN(GPIO4, 1, GPIO_EMC_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_02 = PIN(GPIO4, 2, GPIO_EMC_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_03 = PIN(GPIO4, 3, GPIO_EMC_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_04 = PIN(GPIO4, 4, GPIO_EMC_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_05 = PIN(GPIO4, 5, GPIO_EMC_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_06 = PIN(GPIO4, 6, GPIO_EMC_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_07 = PIN(GPIO4, 7, GPIO_EMC_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_08 = PIN(GPIO4, 8, GPIO_EMC_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_09 = PIN(GPIO4, 9, GPIO_EMC_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_10 = PIN(GPIO4, 10, GPIO_EMC_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_11 = PIN(GPIO4, 11, GPIO_EMC_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_12 = PIN(GPIO4, 12, GPIO_EMC_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_13 = PIN(GPIO4, 13, GPIO_EMC_13, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_14 = PIN(GPIO4, 14, GPIO_EMC_14, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_15 = PIN(GPIO4, 15, GPIO_EMC_15, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_16 = PIN(GPIO4, 16, GPIO_EMC_16, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_17 = PIN(GPIO4, 17, GPIO_EMC_17, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_18 = PIN(GPIO4, 18, GPIO_EMC_18, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_19 = PIN(GPIO4, 19, GPIO_EMC_19, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_20 = PIN(GPIO4, 20, GPIO_EMC_20, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_21 = PIN(GPIO4, 21, GPIO_EMC_21, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_22 = PIN(GPIO4, 22, GPIO_EMC_22, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_23 = PIN(GPIO4, 23, GPIO_EMC_23, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_24 = PIN(GPIO4, 24, GPIO_EMC_24, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_25 = PIN(GPIO4, 25, GPIO_EMC_25, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_26 = PIN(GPIO4, 26, GPIO_EMC_26, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_27 = PIN(GPIO4, 27, GPIO_EMC_27, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_28 = PIN(GPIO4, 28, GPIO_EMC_28, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_29 = PIN(GPIO4, 29, GPIO_EMC_29, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_30 = PIN(GPIO4, 30, GPIO_EMC_30, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_31 = PIN(GPIO4, 31, GPIO_EMC_31, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_32 = PIN(GPIO3, 18, GPIO_EMC_32, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_33 = PIN(GPIO3, 19, GPIO_EMC_33, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_34 = PIN(GPIO3, 20, GPIO_EMC_34, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_35 = PIN(GPIO3, 21, GPIO_EMC_35, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_36 = PIN(GPIO3, 22, GPIO_EMC_36, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_37 = PIN(GPIO3, 23, GPIO_EMC_37, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_38 = PIN(GPIO3, 24, GPIO_EMC_38, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_39 = PIN(GPIO3, 25, GPIO_EMC_39, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_40 = PIN(GPIO3, 26, GPIO_EMC_40, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_41 = PIN(GPIO3, 27, GPIO_EMC_41, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_AD_B0_00 = PIN(GPIO1, 0, GPIO_AD_B0_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_01 = PIN(GPIO1, 1, GPIO_AD_B0_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_02 = PIN(GPIO1, 2, GPIO_AD_B0_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_03 = PIN(GPIO1, 3, GPIO_AD_B0_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_04 = PIN(GPIO1, 4, GPIO_AD_B0_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_05 = PIN(GPIO1, 5, GPIO_AD_B0_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_06 = PIN(GPIO1, 6, GPIO_AD_B0_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_07 = PIN(GPIO1, 7, GPIO_AD_B0_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_08 = PIN(GPIO1, 8, GPIO_AD_B0_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_09 = PIN(GPIO1, 9, GPIO_AD_B0_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_10 = PIN(GPIO1, 10, GPIO_AD_B0_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_11 = PIN(GPIO1, 11, GPIO_AD_B0_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_12 = PIN(GPIO1, 12, GPIO_AD_B0_12, ADC1, 1); +const mcu_pin_obj_t pin_GPIO_AD_B0_13 = PIN(GPIO1, 13, GPIO_AD_B0_13, ADC1, 2); +const mcu_pin_obj_t pin_GPIO_AD_B0_14 = PIN(GPIO1, 14, GPIO_AD_B0_14, ADC1, 3); +const mcu_pin_obj_t pin_GPIO_AD_B0_15 = PIN(GPIO1, 15, GPIO_AD_B0_15, ADC1, 4); + +const mcu_pin_obj_t pin_GPIO_AD_B1_00 = PIN(GPIO1, 16, GPIO_AD_B1_00, ADC1, 5); +const mcu_pin_obj_t pin_GPIO_AD_B1_01 = PIN(GPIO1, 17, GPIO_AD_B1_01, ADC1, 6); +const mcu_pin_obj_t pin_GPIO_AD_B1_02 = PIN(GPIO1, 18, GPIO_AD_B1_02, ADC1, 7); +const mcu_pin_obj_t pin_GPIO_AD_B1_03 = PIN(GPIO1, 19, GPIO_AD_B1_03, ADC1, 8); +const mcu_pin_obj_t pin_GPIO_AD_B1_04 = PIN(GPIO1, 20, GPIO_AD_B1_04, ADC1, 9); +const mcu_pin_obj_t pin_GPIO_AD_B1_05 = PIN(GPIO1, 21, GPIO_AD_B1_05, ADC1, 10); +const mcu_pin_obj_t pin_GPIO_AD_B1_06 = PIN(GPIO1, 22, GPIO_AD_B1_06, ADC1, 11); +const mcu_pin_obj_t pin_GPIO_AD_B1_07 = PIN(GPIO1, 23, GPIO_AD_B1_07, ADC1, 12); +const mcu_pin_obj_t pin_GPIO_AD_B1_08 = PIN(GPIO1, 24, GPIO_AD_B1_08, ADC1, 13); +const mcu_pin_obj_t pin_GPIO_AD_B1_09 = PIN(GPIO1, 25, GPIO_AD_B1_09, ADC1, 14); +const mcu_pin_obj_t pin_GPIO_AD_B1_10 = PIN(GPIO1, 26, GPIO_AD_B1_10, ADC1, 15); +const mcu_pin_obj_t pin_GPIO_AD_B1_11 = PIN(GPIO1, 27, GPIO_AD_B1_11, ADC1, 0); +const mcu_pin_obj_t pin_GPIO_AD_B1_12 = PIN(GPIO1, 28, GPIO_AD_B1_12, ADC2, 1); +const mcu_pin_obj_t pin_GPIO_AD_B1_13 = PIN(GPIO1, 29, GPIO_AD_B1_13, ADC2, 2); +const mcu_pin_obj_t pin_GPIO_AD_B1_14 = PIN(GPIO1, 30, GPIO_AD_B1_14, ADC2, 3); +const mcu_pin_obj_t pin_GPIO_AD_B1_15 = PIN(GPIO1, 31, GPIO_AD_B1_15, ADC2, 4); + +const mcu_pin_obj_t pin_GPIO_B0_00 = PIN(GPIO2, 0, GPIO_B0_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_01 = PIN(GPIO2, 1, GPIO_B0_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_02 = PIN(GPIO2, 2, GPIO_B0_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_03 = PIN(GPIO2, 3, GPIO_B0_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_04 = PIN(GPIO2, 4, GPIO_B0_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_05 = PIN(GPIO2, 5, GPIO_B0_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_06 = PIN(GPIO2, 6, GPIO_B0_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_07 = PIN(GPIO2, 7, GPIO_B0_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_08 = PIN(GPIO2, 8, GPIO_B0_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_09 = PIN(GPIO2, 9, GPIO_B0_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_10 = PIN(GPIO2, 10, GPIO_B0_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_11 = PIN(GPIO2, 11, GPIO_B0_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_12 = PIN(GPIO2, 12, GPIO_B0_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_13 = PIN(GPIO2, 13, GPIO_B0_13, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_14 = PIN(GPIO2, 14, GPIO_B0_14, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_15 = PIN(GPIO2, 15, GPIO_B0_15, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_B1_00 = PIN(GPIO2, 16, GPIO_B1_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_01 = PIN(GPIO2, 17, GPIO_B1_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_02 = PIN(GPIO2, 18, GPIO_B1_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_03 = PIN(GPIO2, 19, GPIO_B1_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_04 = PIN(GPIO2, 20, GPIO_B1_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_05 = PIN(GPIO2, 21, GPIO_B1_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_06 = PIN(GPIO2, 22, GPIO_B1_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_07 = PIN(GPIO2, 23, GPIO_B1_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_08 = PIN(GPIO2, 24, GPIO_B1_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_09 = PIN(GPIO2, 25, GPIO_B1_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_10 = PIN(GPIO2, 26, GPIO_B1_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_11 = PIN(GPIO2, 27, GPIO_B1_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_12 = PIN(GPIO2, 28, GPIO_B1_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_13 = PIN(GPIO2, 29, GPIO_B1_13, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_14 = PIN(GPIO2, 30, GPIO_B1_14, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_15 = PIN(GPIO2, 31, GPIO_B1_15, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_SD_B0_00 = PIN(GPIO3, 12, GPIO_SD_B0_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_01 = PIN(GPIO3, 13, GPIO_SD_B0_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_02 = PIN(GPIO3, 14, GPIO_SD_B0_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_03 = PIN(GPIO3, 15, GPIO_SD_B0_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_04 = PIN(GPIO3, 16, GPIO_SD_B0_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_05 = PIN(GPIO3, 17, GPIO_SD_B0_05, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_SD_B1_00 = PIN(GPIO3, 0, GPIO_B1_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_01 = PIN(GPIO3, 1, GPIO_B1_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_02 = PIN(GPIO3, 2, GPIO_B1_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_03 = PIN(GPIO3, 3, GPIO_B1_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_04 = PIN(GPIO3, 4, GPIO_B1_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_05 = PIN(GPIO3, 5, GPIO_B1_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_06 = PIN(GPIO3, 6, GPIO_B1_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_07 = PIN(GPIO3, 7, GPIO_B1_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_08 = PIN(GPIO3, 8, GPIO_B1_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_09 = PIN(GPIO3, 9, GPIO_B1_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_10 = PIN(GPIO3, 10, GPIO_B1_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_11 = PIN(GPIO3, 11, GPIO_B1_11, NO_ADC, 0); diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.h new file mode 100644 index 0000000000..1e69224595 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.h @@ -0,0 +1,161 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1062_PINS_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1062_PINS_H + +extern const mcu_pin_obj_t pin_GPIO_EMC_00; +extern const mcu_pin_obj_t pin_GPIO_EMC_01; +extern const mcu_pin_obj_t pin_GPIO_EMC_02; +extern const mcu_pin_obj_t pin_GPIO_EMC_03; +extern const mcu_pin_obj_t pin_GPIO_EMC_04; +extern const mcu_pin_obj_t pin_GPIO_EMC_05; +extern const mcu_pin_obj_t pin_GPIO_EMC_06; +extern const mcu_pin_obj_t pin_GPIO_EMC_07; +extern const mcu_pin_obj_t pin_GPIO_EMC_08; +extern const mcu_pin_obj_t pin_GPIO_EMC_09; +extern const mcu_pin_obj_t pin_GPIO_EMC_10; +extern const mcu_pin_obj_t pin_GPIO_EMC_11; +extern const mcu_pin_obj_t pin_GPIO_EMC_12; +extern const mcu_pin_obj_t pin_GPIO_EMC_13; +extern const mcu_pin_obj_t pin_GPIO_EMC_14; +extern const mcu_pin_obj_t pin_GPIO_EMC_15; +extern const mcu_pin_obj_t pin_GPIO_EMC_16; +extern const mcu_pin_obj_t pin_GPIO_EMC_17; +extern const mcu_pin_obj_t pin_GPIO_EMC_18; +extern const mcu_pin_obj_t pin_GPIO_EMC_19; +extern const mcu_pin_obj_t pin_GPIO_EMC_20; +extern const mcu_pin_obj_t pin_GPIO_EMC_21; +extern const mcu_pin_obj_t pin_GPIO_EMC_22; +extern const mcu_pin_obj_t pin_GPIO_EMC_23; +extern const mcu_pin_obj_t pin_GPIO_EMC_24; +extern const mcu_pin_obj_t pin_GPIO_EMC_25; +extern const mcu_pin_obj_t pin_GPIO_EMC_26; +extern const mcu_pin_obj_t pin_GPIO_EMC_27; +extern const mcu_pin_obj_t pin_GPIO_EMC_28; +extern const mcu_pin_obj_t pin_GPIO_EMC_29; +extern const mcu_pin_obj_t pin_GPIO_EMC_30; +extern const mcu_pin_obj_t pin_GPIO_EMC_31; +extern const mcu_pin_obj_t pin_GPIO_EMC_32; +extern const mcu_pin_obj_t pin_GPIO_EMC_33; +extern const mcu_pin_obj_t pin_GPIO_EMC_34; +extern const mcu_pin_obj_t pin_GPIO_EMC_35; +extern const mcu_pin_obj_t pin_GPIO_EMC_36; +extern const mcu_pin_obj_t pin_GPIO_EMC_37; +extern const mcu_pin_obj_t pin_GPIO_EMC_38; +extern const mcu_pin_obj_t pin_GPIO_EMC_39; +extern const mcu_pin_obj_t pin_GPIO_EMC_40; +extern const mcu_pin_obj_t pin_GPIO_EMC_41; + +extern const mcu_pin_obj_t pin_GPIO_AD_B0_00; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_01; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_02; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_03; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_04; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_05; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_06; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_07; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_08; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_09; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_10; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_11; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_12; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_13; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_14; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_15; + +extern const mcu_pin_obj_t pin_GPIO_AD_B1_00; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_01; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_02; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_03; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_04; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_05; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_06; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_07; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_08; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_09; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_10; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_11; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_12; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_13; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_14; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_15; + +extern const mcu_pin_obj_t pin_GPIO_B0_00; +extern const mcu_pin_obj_t pin_GPIO_B0_01; +extern const mcu_pin_obj_t pin_GPIO_B0_02; +extern const mcu_pin_obj_t pin_GPIO_B0_03; +extern const mcu_pin_obj_t pin_GPIO_B0_04; +extern const mcu_pin_obj_t pin_GPIO_B0_05; +extern const mcu_pin_obj_t pin_GPIO_B0_06; +extern const mcu_pin_obj_t pin_GPIO_B0_07; +extern const mcu_pin_obj_t pin_GPIO_B0_08; +extern const mcu_pin_obj_t pin_GPIO_B0_09; +extern const mcu_pin_obj_t pin_GPIO_B0_10; +extern const mcu_pin_obj_t pin_GPIO_B0_11; +extern const mcu_pin_obj_t pin_GPIO_B0_12; +extern const mcu_pin_obj_t pin_GPIO_B0_13; +extern const mcu_pin_obj_t pin_GPIO_B0_14; +extern const mcu_pin_obj_t pin_GPIO_B0_15; + +extern const mcu_pin_obj_t pin_GPIO_B1_00; +extern const mcu_pin_obj_t pin_GPIO_B1_01; +extern const mcu_pin_obj_t pin_GPIO_B1_02; +extern const mcu_pin_obj_t pin_GPIO_B1_03; +extern const mcu_pin_obj_t pin_GPIO_B1_04; +extern const mcu_pin_obj_t pin_GPIO_B1_05; +extern const mcu_pin_obj_t pin_GPIO_B1_06; +extern const mcu_pin_obj_t pin_GPIO_B1_07; +extern const mcu_pin_obj_t pin_GPIO_B1_08; +extern const mcu_pin_obj_t pin_GPIO_B1_09; +extern const mcu_pin_obj_t pin_GPIO_B1_10; +extern const mcu_pin_obj_t pin_GPIO_B1_11; +extern const mcu_pin_obj_t pin_GPIO_B1_12; +extern const mcu_pin_obj_t pin_GPIO_B1_13; +extern const mcu_pin_obj_t pin_GPIO_B1_14; +extern const mcu_pin_obj_t pin_GPIO_B1_15; + +extern const mcu_pin_obj_t pin_GPIO_SD_B0_00; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_01; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_02; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_03; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_04; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_05; + +extern const mcu_pin_obj_t pin_GPIO_SD_B1_00; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_01; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_02; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_03; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_04; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_05; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_06; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_07; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_08; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_09; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_10; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_11; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1062_PINS_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/clocks.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/clocks.h new file mode 100644 index 0000000000..ccbba2edd4 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/clocks.h @@ -0,0 +1,29 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +extern uint32_t SystemCoreClock; + +void clocks_init(void); diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h new file mode 100644 index 0000000000..301eb0db47 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h @@ -0,0 +1,77 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PERIPH_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PERIPH_H + +#include "pins.h" + +typedef struct { + uint8_t bank_idx:4; + uint8_t mux_mode:4; + uint32_t input_reg; + uint8_t input_idx; + const mcu_pin_obj_t *pin; +} mcu_periph_obj_t; + +#define PERIPH_PIN(p_bank_idx, p_mux_mode, p_input_reg, p_input_idx, p_pin) \ +{ \ + .bank_idx = p_bank_idx, \ + .mux_mode = p_mux_mode, \ + .input_reg = p_input_reg == 0 ? 0 : (uint32_t)&(IOMUXC->SELECT_INPUT[p_input_reg]), \ + .input_idx = p_input_idx, \ + .pin = p_pin, \ +} + +typedef struct { + PWM_Type *pwm; + pwm_submodule_t submodule:4; + pwm_channels_t channel:4; + uint8_t mux_mode; + const mcu_pin_obj_t *pin; +} mcu_pwm_obj_t; + +#define PWM_PIN(p_pwm, p_submodule, p_channel, p_mux_mode, p_pin) \ +{ \ + .pwm = p_pwm, \ + .submodule = p_submodule, \ + .channel = p_channel, \ + .mux_mode = p_mux_mode, \ + .pin = p_pin, \ +} + +extern LPI2C_Type *mcu_i2c_banks[]; +extern LPSPI_Type *mcu_spi_banks[]; +extern LPUART_Type *mcu_uart_banks[]; + +#ifdef MIMXRT1011_SERIES +#include "MIMXRT1011/periph.h" +#elif defined(MIMXRT1062_SERIES) +#include "MIMXRT1062/periph.h" +#endif + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PERIPH_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h new file mode 100644 index 0000000000..64a8324bd0 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h @@ -0,0 +1,75 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// DO NOT include this file directly. Use shared-bindings/microcontroller/Pin.h instead to ensure +// that all necessary includes are already included. + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PINS_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PINS_H + +#include +#include + +#include "fsl_iomuxc.h" +#include "fsl_pwm.h" +#include "py/obj.h" + +extern const mp_obj_type_t mcu_pin_type; + +// Use illegal pin value to mark unassigned pins. +#define NO_PIN 0xff +#define NO_ADC NULL +#define NO_PWM NULL + +typedef struct { + mp_obj_base_t base; + GPIO_Type *gpio; + uint8_t number; + uint32_t mux_reg; + uint32_t cfg_reg; + ADC_Type *adc; + uint8_t adc_channel; +} mcu_pin_obj_t; + +#define PIN(p_gpio, p_number, p_enum, p_adc, p_adc_channel) \ +{ \ + { &mcu_pin_type }, \ + .gpio = p_gpio, \ + .number = p_number, \ + .mux_reg = (uint32_t)&(IOMUXC->SW_MUX_CTL_PAD[kIOMUXC_SW_MUX_CTL_PAD_ ## p_enum]), \ + .cfg_reg = (uint32_t)&(IOMUXC->SW_PAD_CTL_PAD[kIOMUXC_SW_PAD_CTL_PAD_ ## p_enum]), \ + .adc = p_adc, \ + .adc_channel = p_adc_channel, \ +} + +#ifdef MIMXRT1011_SERIES +#include "MIMXRT1011/pins.h" +#elif defined(MIMXRT1062_SERIES) +#include "MIMXRT1062/pins.h" +#endif + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PINS_H diff --git a/ports/mimxrt10xx/qstrdefsport.h b/ports/mimxrt10xx/qstrdefsport.h new file mode 100644 index 0000000000..3ba897069b --- /dev/null +++ b/ports/mimxrt10xx/qstrdefsport.h @@ -0,0 +1 @@ +// qstrs specific to this port diff --git a/ports/mimxrt10xx/reset.c b/ports/mimxrt10xx/reset.c new file mode 100644 index 0000000000..dc4a1dce11 --- /dev/null +++ b/ports/mimxrt10xx/reset.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "reset.h" +#include "supervisor/filesystem.h" + +#include "fsl_common.h" + +void reset(void) { + filesystem_flush(); + NVIC_SystemReset(); +} + +bool bootloader_available(void) { + return &_bootloader_dbl_tap >= 0; +} diff --git a/ports/mimxrt10xx/reset.h b/ports/mimxrt10xx/reset.h new file mode 100644 index 0000000000..b6dfc38cc2 --- /dev/null +++ b/ports/mimxrt10xx/reset.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_MIMXRT10XX_RESET_H +#define MICROPY_INCLUDED_MIMXRT10XX_RESET_H + +#include +#include + +// Copied from inc/uf2.h in https://github.com/Microsoft/uf2-samd21 +#define DBL_TAP_MAGIC 0xf01669ef // Randomly selected, adjusted to have first and last bit set +#define DBL_TAP_MAGIC_QUICK_BOOT 0xf02669ef + +extern volatile uint32_t _bootloader_dbl_tap; + +void reset_to_bootloader(void); +void reset(void); +bool bootloader_available(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_RESET_H diff --git a/ports/mimxrt10xx/sdk b/ports/mimxrt10xx/sdk new file mode 160000 index 0000000000..2251c7b793 --- /dev/null +++ b/ports/mimxrt10xx/sdk @@ -0,0 +1 @@ +Subproject commit 2251c7b79343966a57a0f36d897873dd40b692b9 diff --git a/ports/mimxrt10xx/supervisor/cpu.S b/ports/mimxrt10xx/supervisor/cpu.S new file mode 100755 index 0000000000..9e6807a5e2 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/cpu.S @@ -0,0 +1,27 @@ +.syntax unified +.cpu cortex-m4 +.thumb +.text +.align 2 + +@ uint cpu_get_regs_and_sp(r0=uint regs[10]) +.global cpu_get_regs_and_sp +.thumb +.thumb_func +.type cpu_get_regs_and_sp, %function +cpu_get_regs_and_sp: +@ store registers into given array +str r4, [r0], #4 +str r5, [r0], #4 +str r6, [r0], #4 +str r7, [r0], #4 +str r8, [r0], #4 +str r9, [r0], #4 +str r10, [r0], #4 +str r11, [r0], #4 +str r12, [r0], #4 +str r13, [r0], #4 + +@ return the sp +mov r0, sp +bx lr diff --git a/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c new file mode 100644 index 0000000000..e20c67fa34 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c @@ -0,0 +1,347 @@ +/* + * Copyright (c) 2016, Freescale Semiconductor, Inc. + * Copyright 2016-2019 NXP + * All rights reserved. + * + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi.h" +#include "internal_flash.h" + +#define FLASH_QUAD_ENABLE 0x02 +#define FLASH_BUSY_STATUS_POL 1 +#define FLASH_BUSY_STATUS_OFFSET 0 + +static inline void flexspi_clock_init(void) +{ +#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1) + /* Switch to PLL2 for XIP to avoid hardfault during re-initialize clock. */ + CLOCK_InitSysPfd(kCLOCK_Pfd2, 24); /* Set PLL2 PFD2 clock 396MHZ. */ + CLOCK_SetMux(kCLOCK_FlexspiMux, 0x2); /* Choose PLL2 PFD2 clock as flexspi source clock. */ + CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2); /* flexspi clock 133M. */ +#else + const clock_usb_pll_config_t g_ccmConfigUsbPll = {.loopDivider = 0U}; + + CLOCK_InitUsb1Pll(&g_ccmConfigUsbPll); + CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 24); /* Set PLL3 PFD0 clock 360MHZ. */ + CLOCK_SetMux(kCLOCK_FlexspiMux, 0x3); /* Choose PLL3 PFD0 clock as flexspi source clock. */ + CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2); /* flexspi clock 120M. */ +#endif +} + +extern flexspi_device_config_t deviceconfig; +extern const uint32_t customLUT[CUSTOM_LUT_LENGTH]; + +status_t flexspi_nor_write_enable(FLEXSPI_Type *base, uint32_t baseAddr) +{ + flexspi_transfer_t flashXfer; + status_t status; + + /* Write enable */ + flashXfer.deviceAddress = baseAddr; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Command; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; + + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + return status; +} + +status_t flexspi_nor_wait_bus_busy(FLEXSPI_Type *base) +{ + /* Wait status ready. */ + bool isBusy; + uint32_t readValue; + status_t status; + flexspi_transfer_t flashXfer; + + flashXfer.deviceAddress = 0; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Read; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_READSTATUSREG; + flashXfer.data = &readValue; + flashXfer.dataSize = 1; + + do + { + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + if (FLASH_BUSY_STATUS_POL) + { + if (readValue & (1U << FLASH_BUSY_STATUS_OFFSET)) + { + isBusy = true; + } + else + { + isBusy = false; + } + } + else + { + if (readValue & (1U << FLASH_BUSY_STATUS_OFFSET)) + { + isBusy = false; + } + else + { + isBusy = true; + } + } + + } while (isBusy); + + return status; +} + +status_t flexspi_nor_enable_quad_mode(FLEXSPI_Type *base) +{ + flexspi_transfer_t flashXfer; + status_t status; + uint32_t writeValue = FLASH_QUAD_ENABLE; + + /* Write enable */ + status = flexspi_nor_write_enable(base, 0); + + if (status != kStatus_Success) + { + return status; + } + + /* Enable quad mode. */ + flashXfer.deviceAddress = 0; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Write; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG; + flashXfer.data = &writeValue; + flashXfer.dataSize = 1; + + status = FLEXSPI_TransferBlocking(base, &flashXfer); + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + /* Do software reset. */ + FLEXSPI_SoftwareReset(base); + + return status; +} + +status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address) +{ + status_t status; + flexspi_transfer_t flashXfer; + + /* Write enable */ + flashXfer.deviceAddress = address; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Command; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; + + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + flashXfer.deviceAddress = address; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Command; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_ERASESECTOR; + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + /* Do software reset. */ + FLEXSPI_SoftwareReset(base); + + return status; +} + +status_t flexspi_nor_flash_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src, uint32_t length) +{ + status_t status; + flexspi_transfer_t flashXfer; + + /* Write enable */ + status = flexspi_nor_write_enable(base, dstAddr); + + if (status != kStatus_Success) + { + return status; + } + + /* Prepare page program command */ + flashXfer.deviceAddress = dstAddr; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Write; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD; + flashXfer.data = (uint32_t *)src; + flashXfer.dataSize = length; + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + /* Do software reset. */ +#if defined(FSL_FEATURE_SOC_OTFAD_COUNT) + base->AHBCR |= FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK; + base->AHBCR &= ~(FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK); +#else + FLEXSPI_SoftwareReset(base); +#endif + + return status; +} + +status_t flexspi_nor_flash_page_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src) +{ + status_t status; + flexspi_transfer_t flashXfer; + + /* Write enable */ + status = flexspi_nor_write_enable(base, dstAddr); + + if (status != kStatus_Success) + { + return status; + } + + /* Prepare page program command */ + flashXfer.deviceAddress = dstAddr; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Write; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD; + flashXfer.data = (uint32_t *)src; + flashXfer.dataSize = FLASH_PAGE_SIZE; + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + /* Do software reset. */ +#if defined(FSL_FEATURE_SOC_OTFAD_COUNT) + base->AHBCR |= FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK; + base->AHBCR &= ~(FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK); +#else + FLEXSPI_SoftwareReset(base); +#endif + + return status; +} + +status_t flexspi_nor_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId) +{ + uint32_t temp; + flexspi_transfer_t flashXfer; + flashXfer.deviceAddress = 0; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Read; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_READID; + flashXfer.data = &temp; + flashXfer.dataSize = 1; + + status_t status = FLEXSPI_TransferBlocking(base, &flashXfer); + + *vendorId = temp; + + /* Do software reset. */ +#if defined(FSL_FEATURE_SOC_OTFAD_COUNT) + base->AHBCR |= FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK; + base->AHBCR &= ~(FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK); +#else + FLEXSPI_SoftwareReset(base); +#endif + + return status; +} + +status_t flexspi_nor_erase_chip(FLEXSPI_Type *base) +{ + status_t status; + flexspi_transfer_t flashXfer; + + /* Write enable */ + status = flexspi_nor_write_enable(base, 0); + + if (status != kStatus_Success) + { + return status; + } + + flashXfer.deviceAddress = 0; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Command; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_ERASECHIP; + + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + return status; +} + +void flexspi_nor_flash_init(FLEXSPI_Type *base) +{ + flexspi_config_t config; + + flexspi_clock_init(); + + /*Get FLEXSPI default settings and configure the flexspi. */ + FLEXSPI_GetDefaultConfig(&config); + + /*Set AHB buffer size for reading data through AHB bus. */ + config.ahbConfig.enableAHBPrefetch = true; + config.ahbConfig.enableAHBBufferable = true; + config.ahbConfig.enableReadAddressOpt = true; + config.ahbConfig.enableAHBCachable = true; + config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackFromDqsPad; + FLEXSPI_Init(base, &config); + + /* Configure flash settings according to serial flash feature. */ + FLEXSPI_SetFlashConfig(base, &deviceconfig, kFLEXSPI_PortA1); + + /* Update LUT table. */ + FLEXSPI_UpdateLUT(base, 0, customLUT, CUSTOM_LUT_LENGTH); + + /* Do software reset. */ + FLEXSPI_SoftwareReset(base); +} diff --git a/ports/mimxrt10xx/supervisor/internal_flash.c b/ports/mimxrt10xx/supervisor/internal_flash.c new file mode 100644 index 0000000000..e15b4962ef --- /dev/null +++ b/ports/mimxrt10xx/supervisor/internal_flash.c @@ -0,0 +1,255 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "supervisor/flash.h" + +#include +#include +#include + +#include "extmod/vfs.h" +#include "extmod/vfs_fat.h" +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" + +#include "fsl_cache.h" +#include "fsl_flexspi.h" +#include "fsl_iomuxc.h" + +// defined in linker +extern uint32_t __fatfs_flash_start_addr[]; +extern uint32_t __fatfs_flash_length[]; + +#define NO_CACHE 0xffffffff +#define SECTOR_SIZE 0x1000 /* 4K */ + +uint8_t _flash_cache[SECTOR_SIZE] __attribute__((aligned(4))); +uint32_t _flash_page_addr = NO_CACHE; +static bool init_done = false; + +flexspi_device_config_t deviceconfig = { + .flexspiRootClk = 133000000, + .flashSize = (BOARD_FLASH_SIZE / 1024), + .CSIntervalUnit = kFLEXSPI_CsIntervalUnit1SckCycle, + .CSInterval = 2, + .CSHoldTime = 3, + .CSSetupTime = 3, + .dataValidTime = 0, + .columnspace = 0, + .enableWordAddress = 0, + .AWRSeqIndex = 0, + .AWRSeqNumber = 0, + .ARDSeqIndex = NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD, + .ARDSeqNumber = 1, + .AHBWriteWaitUnit = kFLEXSPI_AhbWriteWaitUnit2AhbCycle, + .AHBWriteWaitInterval = 0, +}; + +const uint32_t customLUT[CUSTOM_LUT_LENGTH] = { + /* Normal read mode -SDR */ + /* Normal read mode -SDR */ + [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x03, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL + 1] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), + + /* Fast read mode - SDR */ + [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x0B, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST + 1] = FLEXSPI_LUT_SEQ( + kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_1PAD, 0x08, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), + + /* Fast read quad mode - SDR */ + [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xEB, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD + 1] = FLEXSPI_LUT_SEQ( + kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 0x06, kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04), + + /* Read extend parameters */ + [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x81, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), + + /* Write Enable */ + [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x06, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), + + /* Erase Sector */ + [4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x20, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + + /* Page Program - single mode */ + [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x02, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE + 1] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), + + /* Page Program - quad mode */ + [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x32, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD + 1] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_4PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), + + /* Read ID */ + [4 * NOR_CMD_LUT_SEQ_IDX_READID] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x9F, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), + + /* Enable Quad mode */ + [4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x31, kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04), + + /* Read status register */ + [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUSREG] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x05, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), + + /* Erase whole chip */ + [4 * NOR_CMD_LUT_SEQ_IDX_ERASECHIP] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xC7, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), +}; + +extern status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address); +extern status_t flexspi_nor_flash_page_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src); +extern status_t flexspi_nor_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId); +extern status_t flexspi_nor_enable_quad_mode(FLEXSPI_Type *base); +extern status_t flexspi_nor_erase_chip(FLEXSPI_Type *base); +extern void flexspi_nor_flash_init(FLEXSPI_Type *base); + +void supervisor_flash_init(void) { + if (init_done) + return; + + SCB_DisableDCache(); + + status_t status; + uint8_t vendorID = 0; + + flexspi_nor_flash_init(FLEXSPI); + + /* Get vendor ID. */ + status = flexspi_nor_get_vendor_id(FLEXSPI, &vendorID); + if (status != kStatus_Success) { + printf("flexspi_nor_get_vendor_id fail %ld\r\n", status); + return; + } + + /* Enter quad mode. */ + __disable_irq(); + status = flexspi_nor_enable_quad_mode(FLEXSPI); + if (status != kStatus_Success) + { + printf("flexspi_nor_enable_quad_mode fail %ld\r\n", status); + return; + } + __enable_irq(); + + init_done = true; +} + +static inline uint32_t lba2addr(uint32_t block) { + return ((uint32_t)__fatfs_flash_start_addr) + block * FILESYSTEM_BLOCK_SIZE; +} + +uint32_t supervisor_flash_get_block_size(void) { + return FILESYSTEM_BLOCK_SIZE; +} + +uint32_t supervisor_flash_get_block_count(void) { + return ((uint32_t) __fatfs_flash_length) / FILESYSTEM_BLOCK_SIZE; +} + +void supervisor_flash_flush(void) { + if (_flash_page_addr == NO_CACHE) return; + status_t status; + + // Skip if data is the same + if (memcmp(_flash_cache, (void *)_flash_page_addr, SECTOR_SIZE) != 0) { + volatile uint32_t sector_addr = (_flash_page_addr - FlexSPI_AMBA_BASE); + + __disable_irq(); + status = flexspi_nor_flash_erase_sector(FLEXSPI, sector_addr); + if (status != kStatus_Success) { + printf("Page erase failure %ld!\r\n", status); + return; + } + __enable_irq(); + + for (int i = 0; i < SECTOR_SIZE / FLASH_PAGE_SIZE; ++i) { + __disable_irq(); + status = flexspi_nor_flash_page_program(FLEXSPI, sector_addr + i * FLASH_PAGE_SIZE, (void *)_flash_cache + i * FLASH_PAGE_SIZE); + if (status != kStatus_Success) { + printf("Page program failure %ld!\r\n", status); + return; + } + __enable_irq(); + } + + DCACHE_CleanInvalidateByRange(_flash_page_addr, SECTOR_SIZE); + } +} + +mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { + // Must write out anything in cache before trying to read. + supervisor_flash_flush(); + + uint32_t src = lba2addr(block); + memcpy(dest, (uint8_t*)src, FILESYSTEM_BLOCK_SIZE * num_blocks); + return 0; // success +} + +mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32_t num_blocks) { + while (num_blocks) { + uint32_t const addr = lba2addr(lba); + uint32_t const page_addr = addr & ~(SECTOR_SIZE - 1); + + uint32_t count = 8 - (lba % 8); // up to page boundary + count = MIN(num_blocks, count); + + if (page_addr != _flash_page_addr) { + // Write out anything in cache before overwriting it. + supervisor_flash_flush(); + + _flash_page_addr = page_addr; + + // Copy the current contents of the entire page into the cache. + memcpy(_flash_cache, (void *)page_addr, SECTOR_SIZE); + } + + // Overwrite part or all of the page cache with the src data. + memcpy(_flash_cache + (addr & (SECTOR_SIZE - 1)), src, count * FILESYSTEM_BLOCK_SIZE); + + // adjust for next run + lba += count; + src += count * FILESYSTEM_BLOCK_SIZE; + num_blocks -= count; + } + + return 0; // success +} + +void supervisor_flash_release_cache(void) { +} + diff --git a/ports/mimxrt10xx/supervisor/internal_flash.h b/ports/mimxrt10xx/supervisor/internal_flash.h new file mode 100644 index 0000000000..dfbfe1d4b4 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/internal_flash.h @@ -0,0 +1,53 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_H +#define MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_H + +#include +#include + +#include "py/mpconfig.h" + +#define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms +#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2) + +#define CUSTOM_LUT_LENGTH 60 +#define FLASH_PAGE_SIZE 256 + +#define NOR_CMD_LUT_SEQ_IDX_READ_NORMAL 7 +#define NOR_CMD_LUT_SEQ_IDX_READ_FAST 13 +#define NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD 0 +#define NOR_CMD_LUT_SEQ_IDX_READSTATUS 1 +#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 2 +#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 3 +#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE 6 +#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD 4 +#define NOR_CMD_LUT_SEQ_IDX_READID 8 +#define NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG 9 +#define NOR_CMD_LUT_SEQ_IDX_READSTATUSREG 12 +#define NOR_CMD_LUT_SEQ_IDX_ERASECHIP 5 + +#endif // MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_H diff --git a/ports/mimxrt10xx/supervisor/internal_flash_root_pointers.h b/ports/mimxrt10xx/supervisor/internal_flash_root_pointers.h new file mode 100644 index 0000000000..c8173175eb --- /dev/null +++ b/ports/mimxrt10xx/supervisor/internal_flash_root_pointers.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_ROOT_POINTERS_H +#define MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_ROOT_POINTERS_H + +#define FLASH_ROOT_POINTERS + +#endif // MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_ROOT_POINTERS_H diff --git a/ports/mimxrt10xx/supervisor/port.c b/ports/mimxrt10xx/supervisor/port.c new file mode 100644 index 0000000000..3573074279 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/port.c @@ -0,0 +1,168 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2017 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "supervisor/port.h" + +#include "fsl_device_registers.h" + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/pulseio/PulseIn.h" +#include "common-hal/pulseio/PulseOut.h" +#include "common-hal/pulseio/PWMOut.h" +#include "common-hal/rtc/RTC.h" + +#include "reset.h" +#include "tick.h" + +#include "tusb.h" + +#if CIRCUITPY_GAMEPAD +#include "shared-module/gamepad/__init__.h" +#endif +#if CIRCUITPY_GAMEPADSHIFT +#include "shared-module/gamepadshift/__init__.h" +#endif +#include "shared-module/_pew/PewPew.h" + +#include "clocks.h" + +#include "fsl_gpio.h" +#include "fsl_lpuart.h" + +void mpu_init(void) +{ + ARM_MPU_Disable(); + + SCB_EnableDCache(); + SCB_EnableICache(); +} + +safe_mode_t port_init(void) { + mpu_init(); + clocks_init(); + + // Configure millisecond timer initialization. + tick_init(); + +#if CIRCUITPY_RTC + rtc_init(); +#endif + + // Reset everything into a known state before board_init. + reset_port(); + + // Init the board last so everything else is ready + board_init(); + + if (board_requests_safe_mode()) { + return USER_SAFE_MODE; + } + + return NO_SAFE_MODE; +} + +void reset_port(void) { + //reset_sercoms(); + +#if CIRCUITPY_AUDIOIO + audio_dma_reset(); + audioout_reset(); +#endif +#if CIRCUITPY_AUDIOBUSIO + i2sout_reset(); + //pdmin_reset(); +#endif + +#if CIRCUITPY_TOUCHIO && CIRCUITPY_TOUCHIO_USE_NATIVE + touchin_reset(); +#endif + +// eic_reset(); + +#if CIRCUITPY_PULSEIO + pulseout_reset(); + pwmout_reset(); +#endif + +#if CIRCUITPY_RTC + rtc_reset(); +#endif + +#if CIRCUITPY_GAMEPAD + gamepad_reset(); +#endif +#if CIRCUITPY_GAMEPADSHIFT + gamepadshift_reset(); +#endif +#if CIRCUITPY_PEW + pew_reset(); +#endif + + //reset_event_system(); + + reset_all_pins(); +} + +void reset_to_bootloader(void) { + _bootloader_dbl_tap = DBL_TAP_MAGIC; + reset(); +} + +void reset_cpu(void) { + reset(); +} + +extern uint32_t _heap_start, _estack; +uint32_t *port_stack_get_limit(void) { + return &_heap_start; +} + +uint32_t *port_stack_get_top(void) { + return &_estack; +} + +extern uint32_t __bss_end__; +// Place the word to save just after our BSS section that gets blanked. +void port_set_saved_word(uint32_t value) { + __bss_end__ = value; +} + +uint32_t port_get_saved_word(void) { + return __bss_end__; +} + +/** + * \brief Default interrupt handler for unused IRQs. + */ +__attribute__((used)) void HardFault_Handler(void) +{ + reset_into_safe_mode(HARD_CRASH); + while (true) { + asm("nop;"); + } +} diff --git a/ports/mimxrt10xx/supervisor/serial.c b/ports/mimxrt10xx/supervisor/serial.c new file mode 100644 index 0000000000..22c979cf9a --- /dev/null +++ b/ports/mimxrt10xx/supervisor/serial.c @@ -0,0 +1,93 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include +#include "supervisor/serial.h" + +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +// static LPUART_Type *uart_instance = LPUART1; // evk +static LPUART_Type *uart_instance = LPUART4; // feather 1011 +//static LPUART_Type *uart_instance = LPUART2; // feather 1062 + +static uint32_t UartSrcFreq(void) { + uint32_t freq; + + /* To make it simple, we assume default PLL and divider settings, and the only variable + from application is use PLL3 source or OSC source */ + /* PLL3 div6 80M */ + if (CLOCK_GetMux(kCLOCK_UartMux) == 0) { + freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U); + } else { + freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U); + } + + return freq; +} + +void serial_init(void) { + lpuart_config_t config; + + LPUART_GetDefaultConfig(&config); + config.baudRate_Bps = 115200; + config.enableTx = true; + config.enableRx = true; + + LPUART_Init(uart_instance, &config, UartSrcFreq()); +} + +bool serial_connected(void) { + return true; +} + +char serial_read(void) { + uint8_t data; + + LPUART_ReadBlocking(uart_instance, &data, sizeof(data)); + + return data; +} + +bool serial_bytes_available(void) { + return LPUART_GetStatusFlags(uart_instance) & kLPUART_RxDataRegFullFlag; +} + +void serial_write(const char* text) { + LPUART_WriteBlocking(uart_instance, (uint8_t*)text, strlen(text)); +} + +void serial_write_substring(const char *text, uint32_t len) { + if (len == 0) { + return; + } + + LPUART_WriteBlocking(uart_instance, (uint8_t*)text, len); +} + diff --git a/ports/mimxrt10xx/supervisor/usb.c b/ports/mimxrt10xx/supervisor/usb.c new file mode 100644 index 0000000000..c38dd55b9d --- /dev/null +++ b/ports/mimxrt10xx/supervisor/usb.c @@ -0,0 +1,56 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "fsl_clock.h" +#include "tusb.h" + +void init_usb_hardware(void) { + CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 480000000U); + CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, 480000000U); + +#ifdef USBPHY + USBPHY_Type *usb_phy = USBPHY; +#else + USBPHY_Type *usb_phy = USBPHY1; +#endif + + // Enable PHY support for Low speed device + LS via FS Hub + usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK; + + // Enable all power for normal operation + usb_phy->PWD = 0; + + // TX Timing + uint32_t phytx = usb_phy->TX; + phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK); + phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06); + usb_phy->TX = phytx; +} + +void USB_OTG1_IRQHandler(void) { + tud_isr(0); +} diff --git a/ports/mimxrt10xx/tick.c b/ports/mimxrt10xx/tick.c new file mode 100644 index 0000000000..c19ce796ed --- /dev/null +++ b/ports/mimxrt10xx/tick.c @@ -0,0 +1,92 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "tick.h" + +#include "fsl_common.h" + +#include "supervisor/shared/tick.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/microcontroller/Processor.h" + +void SysTick_Handler(void) { + // SysTick interrupt handler called when the SysTick timer reaches zero + // (every millisecond). + common_hal_mcu_disable_interrupts(); + + // Read the control register to reset the COUNTFLAG. + (void) SysTick->CTRL; + + common_hal_mcu_enable_interrupts(); + + // Do things common to all ports when the tick occurs + supervisor_tick(); +} + +void tick_init() { + uint32_t ticks_per_ms = common_hal_mcu_processor_get_frequency() / 1000; + SysTick_Config(ticks_per_ms-1); +} + +void tick_delay(uint32_t us) { + uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; + uint32_t us_until_next_tick = SysTick->VAL / ticks_per_us; + uint32_t start_tick; + while (us >= us_until_next_tick) { + start_tick = SysTick->VAL; // wait for SysTick->VAL to RESET + while (SysTick->VAL < start_tick) {} + us -= us_until_next_tick; + us_until_next_tick = 1000; + } + while (SysTick->VAL > ((us_until_next_tick - us) * ticks_per_us)) {} +} + +// us counts down! +void current_tick(uint64_t* ms, uint32_t* us_until_ms) { + uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; + + // We disable interrupts to prevent ticks_ms from changing while we grab it. + common_hal_mcu_disable_interrupts(); + uint32_t tick_status = SysTick->CTRL; + uint32_t current_us = SysTick->VAL; + uint32_t tick_status2 = SysTick->CTRL; + uint64_t current_ms = supervisor_ticks_ms64(); + // The second clause ensures our value actually rolled over. Its possible it hit zero between + // the VAL read and CTRL read. + if ((tick_status & SysTick_CTRL_COUNTFLAG_Msk) != 0 || + ((tick_status2 & SysTick_CTRL_COUNTFLAG_Msk) != 0 && current_us > ticks_per_us)) { + current_ms++; + } + common_hal_mcu_enable_interrupts(); + *ms = current_ms; + *us_until_ms = current_us / ticks_per_us; +} + +void wait_until(uint64_t ms, uint32_t us_until_ms) { + uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; + while (supervisor_ticks_ms64() <= ms && SysTick->VAL / ticks_per_us >= us_until_ms) {} +} diff --git a/ports/mimxrt10xx/tick.h b/ports/mimxrt10xx/tick.h new file mode 100644 index 0000000000..6660d5b4ae --- /dev/null +++ b/ports/mimxrt10xx/tick.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_MIMXRT10XX_TICK_H +#define MICROPY_INCLUDED_MIMXRT10XX_TICK_H + +#include "py/mpconfig.h" + +extern struct timer_descriptor ms_timer; + +void tick_init(void); + +void tick_delay(uint32_t us); + +void current_tick(uint64_t* ms, uint32_t* us_until_ms); +// Do not call this with interrupts disabled because it may be waiting for +// ticks_ms to increment. +void wait_until(uint64_t ms, uint32_t us_until_ms); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_TICK_H diff --git a/ports/nrf/bluetooth/ble_drv.c b/ports/nrf/bluetooth/ble_drv.c index 7dbb315826..28a265b7fe 100644 --- a/ports/nrf/bluetooth/ble_drv.c +++ b/ports/nrf/bluetooth/ble_drv.c @@ -46,7 +46,7 @@ nrf_nvic_state_t nrf_nvic_state = { 0 }; volatile sd_flash_operation_status_t sd_flash_operation_status; __attribute__((aligned(4))) -static uint8_t m_ble_evt_buf[sizeof(ble_evt_t) + (BLE_GATT_ATT_MTU_DEFAULT)]; +static uint8_t m_ble_evt_buf[sizeof(ble_evt_t) + (BLE_GATTS_VAR_ATTR_LEN_MAX)]; void ble_drv_reset() { // Linked list items will be gc'd. diff --git a/ports/nrf/boards/common.template.ld b/ports/nrf/boards/common.template.ld index 931f95ee9e..b110e6052a 100644 --- a/ports/nrf/boards/common.template.ld +++ b/ports/nrf/boards/common.template.ld @@ -16,7 +16,13 @@ MEMORY FLASH_FATFS (r) : ORIGIN = ${CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE} FLASH_BOOTLOADER (rx) : ORIGIN = ${BOOTLOADER_START_ADDR}, LENGTH = ${BOOTLOADER_SIZE} FLASH_BOOTLOADER_SETTINGS (r) : ORIGIN = ${BOOTLOADER_SETTINGS_START_ADDR}, LENGTH = ${BOOTLOADER_SETTINGS_SIZE} - RAM (xrw) : ORIGIN = 0x20004000, LENGTH = 0x03C000 /* 240 KiB */ + + + /* 0x2000000 - RAM:ORIGIN is reserved for Softdevice */ + /* SoftDevice 6.1.0 takes 0x7b78 bytes (30.86 kb) minimum with high ATT MTU. */ + /* To measure the minimum required amount of memory for given configuration, set this number + high enough to work and then check the mutation of the value done by sd_ble_enable. */ + RAM (xrw) : ORIGIN = 0x20000000 + 32K, LENGTH = 256K - 32K } /* produce a link error if there is not this amount of RAM for these sections */ diff --git a/ports/nrf/common-hal/_bleio/Adapter.c b/ports/nrf/common-hal/_bleio/Adapter.c index cee40a5a0c..b9b6d2e88f 100644 --- a/ports/nrf/common-hal/_bleio/Adapter.c +++ b/ports/nrf/common-hal/_bleio/Adapter.c @@ -67,7 +67,7 @@ STATIC void softdevice_assert_handler(uint32_t id, uint32_t pc, uint32_t info) { reset_into_safe_mode(NORDIC_SOFT_DEVICE_ASSERT); } -bleio_connection_internal_t connections[BLEIO_TOTAL_CONNECTION_COUNT]; +bleio_connection_internal_t bleio_connections[BLEIO_TOTAL_CONNECTION_COUNT]; // Linker script provided ram start. extern uint32_t _ram_start; @@ -133,6 +133,15 @@ STATIC uint32_t ble_stack_enable(void) { return err_code; } + // Set ATT_MTU so that the maximum MTU we can negotiate is up to the full characteristic size. + memset(&ble_conf, 0, sizeof(ble_conf)); + ble_conf.conn_cfg.conn_cfg_tag = BLE_CONN_CFG_TAG_CUSTOM; + ble_conf.conn_cfg.params.gatt_conn_cfg.att_mtu = BLE_GATTS_VAR_ATTR_LEN_MAX; + err_code = sd_ble_cfg_set(BLE_CONN_CFG_GATT, &ble_conf, app_ram_start); + if (err_code != NRF_SUCCESS) { + return err_code; + } + // Triple the GATT Server attribute size to accomodate both the CircuitPython built-in service // and anything the user does. memset(&ble_conf, 0, sizeof(ble_conf)); @@ -142,7 +151,14 @@ STATIC uint32_t ble_stack_enable(void) { return err_code; } - // TODO set ATT_MTU so that the maximum MTU we can negotiate is higher than the default. + // Increase the number of vendor UUIDs supported. Apple uses a complete random number per + // service and characteristic. + memset(&ble_conf, 0, sizeof(ble_conf)); + ble_conf.common_cfg.vs_uuid_cfg.vs_uuid_count = 32; // Defaults to 10. + err_code = sd_ble_cfg_set(BLE_COMMON_CFG_VS_UUID, &ble_conf, app_ram_start); + if (err_code != NRF_SUCCESS) { + return err_code; + } // This sets app_ram_start to the minimum value needed for the settings set above. err_code = sd_ble_enable(&app_ram_start); @@ -150,6 +166,14 @@ STATIC uint32_t ble_stack_enable(void) { return err_code; } + // Turn on connection event extension so we can transmit for a longer period of time as needed. + ble_opt_t opt; + opt.common_opt.conn_evt_ext.enable = true; + err_code = sd_ble_opt_set(BLE_COMMON_OPT_CONN_EVT_EXT, &opt); + if (err_code != NRF_SUCCESS) { + return err_code; + } + ble_gap_conn_params_t gap_conn_params = { .min_conn_interval = BLE_MIN_CONN_INTERVAL, .max_conn_interval = BLE_MAX_CONN_INTERVAL, @@ -177,7 +201,7 @@ STATIC bool adapter_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { // total connection limit. bleio_connection_internal_t *connection; for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { - connection = &connections[i]; + connection = &bleio_connections[i]; if (connection->conn_handle == BLE_CONN_HANDLE_INVALID) { break; } @@ -189,6 +213,7 @@ STATIC bool adapter_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { connection->conn_handle = ble_evt->evt.gap_evt.conn_handle; connection->connection_obj = mp_const_none; connection->pair_status = PAIR_NOT_PAIRED; + connection->mtu = 0; ble_drv_add_event_handler_entry(&connection->handler_entry, connection_on_ble_evt, connection); self->connection_objs = NULL; @@ -216,7 +241,7 @@ STATIC bool adapter_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { // Find the connection that was disconnected. bleio_connection_internal_t *connection; for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { - connection = &connections[i]; + connection = &bleio_connections[i]; if (connection->conn_handle == ble_evt->evt.gap_evt.conn_handle) { break; } @@ -293,7 +318,7 @@ void common_hal_bleio_adapter_set_enabled(bleio_adapter_obj_t *self, bool enable // Add a handler for incoming peripheral connections. if (enabled) { for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { - bleio_connection_internal_t *connection = &connections[i]; + bleio_connection_internal_t *connection = &bleio_connections[i]; connection->conn_handle = BLE_CONN_HANDLE_INVALID; } bleio_adapter_reset_name(self); @@ -497,14 +522,25 @@ mp_obj_t common_hal_bleio_adapter_connect(bleio_adapter_obj_t *self, bleio_addre ble_drv_remove_event_handler(connect_on_ble_evt, &event_info); - if (event_info.conn_handle == BLE_CONN_HANDLE_INVALID) { + uint16_t conn_handle = event_info.conn_handle; + if (conn_handle == BLE_CONN_HANDLE_INVALID) { mp_raise_bleio_BluetoothError(translate("Failed to connect: timeout")); } + // Negotiate for better PHY, larger MTU and data lengths since we are the central. These are + // nice-to-haves so ignore any errors. + ble_gap_phys_t const phys = { + .rx_phys = BLE_GAP_PHY_AUTO, + .tx_phys = BLE_GAP_PHY_AUTO, + }; + sd_ble_gap_phy_update(conn_handle, &phys); + sd_ble_gattc_exchange_mtu_request(conn_handle, BLE_GATTS_VAR_ATTR_LEN_MAX); + sd_ble_gap_data_length_update(conn_handle, NULL, NULL); + // Make the connection object and return it. for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { - bleio_connection_internal_t *connection = &connections[i]; - if (connection->conn_handle == event_info.conn_handle) { + bleio_connection_internal_t *connection = &bleio_connections[i]; + if (connection->conn_handle == conn_handle) { return bleio_connection_new_from_internal(connection); } } @@ -628,7 +664,7 @@ void common_hal_bleio_adapter_stop_advertising(bleio_adapter_obj_t *self) { bool common_hal_bleio_adapter_get_connected(bleio_adapter_obj_t *self) { for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { - bleio_connection_internal_t *connection = &connections[i]; + bleio_connection_internal_t *connection = &bleio_connections[i]; if (connection->conn_handle != BLE_CONN_HANDLE_INVALID) { return true; } @@ -643,7 +679,7 @@ mp_obj_t common_hal_bleio_adapter_get_connections(bleio_adapter_obj_t *self) { size_t total_connected = 0; mp_obj_t items[BLEIO_TOTAL_CONNECTION_COUNT]; for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { - bleio_connection_internal_t *connection = &connections[i]; + bleio_connection_internal_t *connection = &bleio_connections[i]; if (connection->conn_handle != BLE_CONN_HANDLE_INVALID) { if (connection->connection_obj == mp_const_none) { connection->connection_obj = bleio_connection_new_from_internal(connection); @@ -658,7 +694,7 @@ mp_obj_t common_hal_bleio_adapter_get_connections(bleio_adapter_obj_t *self) { void bleio_adapter_gc_collect(bleio_adapter_obj_t* adapter) { gc_collect_root((void**)adapter, sizeof(bleio_adapter_obj_t) / sizeof(size_t)); - gc_collect_root((void**)connections, sizeof(connections) / sizeof(size_t)); + gc_collect_root((void**)bleio_connections, sizeof(bleio_connections) / sizeof(size_t)); } void bleio_adapter_reset(bleio_adapter_obj_t* adapter) { @@ -666,7 +702,7 @@ void bleio_adapter_reset(bleio_adapter_obj_t* adapter) { common_hal_bleio_adapter_stop_advertising(adapter); adapter->connection_objs = NULL; for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { - bleio_connection_internal_t *connection = &connections[i]; + bleio_connection_internal_t *connection = &bleio_connections[i]; connection->connection_obj = mp_const_none; } } diff --git a/ports/nrf/common-hal/_bleio/Adapter.h b/ports/nrf/common-hal/_bleio/Adapter.h index dca4439908..2ac568d661 100644 --- a/ports/nrf/common-hal/_bleio/Adapter.h +++ b/ports/nrf/common-hal/_bleio/Adapter.h @@ -37,7 +37,7 @@ #define BLEIO_TOTAL_CONNECTION_COUNT 2 -extern bleio_connection_internal_t connections[BLEIO_TOTAL_CONNECTION_COUNT]; +extern bleio_connection_internal_t bleio_connections[BLEIO_TOTAL_CONNECTION_COUNT]; typedef struct { mp_obj_base_t base; diff --git a/ports/nrf/common-hal/_bleio/Characteristic.c b/ports/nrf/common-hal/_bleio/Characteristic.c index 9f1255e32f..c7eec94c0d 100644 --- a/ports/nrf/common-hal/_bleio/Characteristic.c +++ b/ports/nrf/common-hal/_bleio/Characteristic.c @@ -154,7 +154,7 @@ void common_hal_bleio_characteristic_set_value(bleio_characteristic_obj_t *self, common_hal_bleio_gatts_write(self->handle, BLE_CONN_HANDLE_INVALID, bufinfo); // Check to see if we need to notify or indicate any active connections. for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { - bleio_connection_internal_t *connection = &connections[i]; + bleio_connection_internal_t *connection = &bleio_connections[i]; uint16_t conn_handle = connection->conn_handle; if (connection->conn_handle == BLE_CONN_HANDLE_INVALID) { continue; diff --git a/ports/nrf/common-hal/_bleio/Connection.c b/ports/nrf/common-hal/_bleio/Connection.c index e0b50901ad..daf5b937b8 100644 --- a/ports/nrf/common-hal/_bleio/Connection.c +++ b/ports/nrf/common-hal/_bleio/Connection.c @@ -85,6 +85,7 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { switch (ble_evt->header.evt_id) { case BLE_GAP_EVT_DISCONNECTED: break; + case BLE_GAP_EVT_PHY_UPDATE_REQUEST: { ble_gap_phys_t const phys = { .rx_phys = BLE_GAP_PHY_AUTO, @@ -94,20 +95,45 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { break; } - case BLE_GAP_EVT_PHY_UPDATE: // 0x22 + case BLE_GAP_EVT_PHY_UPDATE: { // 0x22 break; + } case BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST: // SoftDevice will respond to a length update request. sd_ble_gap_data_length_update(self->conn_handle, NULL, NULL); break; - case BLE_GAP_EVT_DATA_LENGTH_UPDATE: // 0x24 + case BLE_GAP_EVT_DATA_LENGTH_UPDATE: { // 0x24 break; + } case BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST: { - // We only handle MTU of size BLE_GATT_ATT_MTU_DEFAULT. - sd_ble_gatts_exchange_mtu_reply(self->conn_handle, BLE_GATT_ATT_MTU_DEFAULT); + ble_gatts_evt_exchange_mtu_request_t *request = + &ble_evt->evt.gatts_evt.params.exchange_mtu_request; + + uint16_t new_mtu = BLE_GATTS_VAR_ATTR_LEN_MAX; + if (request->client_rx_mtu < new_mtu) { + new_mtu = request->client_rx_mtu; + } + if (new_mtu < BLE_GATT_ATT_MTU_DEFAULT) { + new_mtu = BLE_GATT_ATT_MTU_DEFAULT; + } + if (self->mtu > 0) { + new_mtu = self->mtu; + } + + self->mtu = new_mtu; + sd_ble_gatts_exchange_mtu_reply(self->conn_handle, new_mtu); + break; + } + + + case BLE_GATTC_EVT_EXCHANGE_MTU_RSP: { + ble_gattc_evt_exchange_mtu_rsp_t *response = + &ble_evt->evt.gattc_evt.params.exchange_mtu_rsp; + + self->mtu = response->server_rx_mtu; break; } @@ -319,8 +345,11 @@ STATIC bool discover_next_services(bleio_connection_internal_t* connection, uint m_discovery_successful = false; m_discovery_in_process = true; - check_nrf_error(sd_ble_gattc_primary_services_discover(connection->conn_handle, - start_handle, service_uuid)); + uint32_t nrf_err = NRF_ERROR_BUSY; + while (nrf_err == NRF_ERROR_BUSY) { + nrf_err = sd_ble_gattc_primary_services_discover(connection->conn_handle, start_handle, service_uuid); + } + check_nrf_error(nrf_err); // Wait for a discovery event. while (m_discovery_in_process) { diff --git a/ports/nrf/common-hal/_bleio/Connection.h b/ports/nrf/common-hal/_bleio/Connection.h index 1474a0a6c0..61bbea4a1b 100644 --- a/ports/nrf/common-hal/_bleio/Connection.h +++ b/ports/nrf/common-hal/_bleio/Connection.h @@ -65,6 +65,7 @@ typedef struct { ble_drv_evt_handler_entry_t handler_entry; ble_gap_conn_params_t conn_params; volatile bool conn_params_updating; + uint16_t mtu; } bleio_connection_internal_t; typedef struct { diff --git a/ports/nrf/common-hal/_bleio/PacketBuffer.c b/ports/nrf/common-hal/_bleio/PacketBuffer.c new file mode 100644 index 0000000000..27dacb4938 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/PacketBuffer.c @@ -0,0 +1,335 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019-2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "ble_drv.h" +#include "ble_gatts.h" +#include "nrf_nvic.h" + +#include "lib/utils/interrupt_char.h" +#include "py/runtime.h" +#include "py/stream.h" + +#include "tick.h" + +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Connection.h" +#include "shared-bindings/_bleio/PacketBuffer.h" +#include "supervisor/shared/tick.h" + +STATIC void write_to_ringbuf(bleio_packet_buffer_obj_t *self, uint8_t *data, uint16_t len) { + if (len + sizeof(uint16_t) > self->ringbuf.size) { + // This shouldn't happen. + return; + } + // Push all the data onto the ring buffer. + uint8_t is_nested_critical_region; + sd_nvic_critical_region_enter(&is_nested_critical_region); + // Make room for the new value by dropping the oldest packets first. + while (self->ringbuf.size - ringbuf_count(&self->ringbuf) < (int) (len + sizeof(uint16_t))) { + uint16_t packet_length; + ringbuf_get_n(&self->ringbuf, (uint8_t*) &packet_length, sizeof(uint16_t)); + for (uint16_t i = 0; i < packet_length; i++) { + ringbuf_get(&self->ringbuf); + } + // set an overflow flag? + } + ringbuf_put_n(&self->ringbuf, (uint8_t*) &len, sizeof(uint16_t)); + ringbuf_put_n(&self->ringbuf, data, len); + sd_nvic_critical_region_exit(is_nested_critical_region); +} + +STATIC uint32_t queue_next_write(bleio_packet_buffer_obj_t *self) { + // Queue up the next outgoing buffer. We use two, one that has been passed to the SD for + // transmission (when packet_queued is true) and the other is `pending` and can still be + // modified. By primarily appending to the `pending` buffer we can reduce the protocol overhead + // of the lower level link and ATT layers. + self->packet_queued = false; + if (self->pending_size > 0) { + uint16_t conn_handle = self->conn_handle; + uint32_t err_code; + if (self->client) { + ble_gattc_write_params_t write_params = { + .write_op = self->write_type, + .handle = self->characteristic->handle, + .p_value = self->outgoing[self->pending_index], + .len = self->pending_size, + }; + + err_code = sd_ble_gattc_write(conn_handle, &write_params); + } else { + uint16_t hvx_len = self->pending_size; + + ble_gatts_hvx_params_t hvx_params = { + .handle = self->characteristic->handle, + .type = self->write_type, + .offset = 0, + .p_len = &hvx_len, + .p_data = self->outgoing[self->pending_index], + }; + err_code = sd_ble_gatts_hvx(conn_handle, &hvx_params); + } + if (err_code != NRF_SUCCESS) { + // On error, simply skip updating the pending buffers so that the next HVC or WRITE + // complete event triggers another attempt. + return err_code; + } + self->pending_size = 0; + self->pending_index = (self->pending_index + 1) % 2; + self->packet_queued = true; + } + return NRF_SUCCESS; +} + +STATIC bool packet_buffer_on_ble_client_evt(ble_evt_t *ble_evt, void *param) { + bleio_packet_buffer_obj_t *self = (bleio_packet_buffer_obj_t *) param; + uint16_t conn_handle = ble_evt->evt.gattc_evt.conn_handle; + if (conn_handle != self->conn_handle) { + return false; + } + switch (ble_evt->header.evt_id) { + case BLE_GATTC_EVT_HVX: { + // A remote service wrote to this characteristic. + ble_gattc_evt_hvx_t* evt_hvx = &ble_evt->evt.gattc_evt.params.hvx; + // Must be a notification, and event handle must match the handle for my characteristic. + if (evt_hvx->handle == self->characteristic->handle) { + write_to_ringbuf(self, evt_hvx->data, evt_hvx->len); + if (evt_hvx->type == BLE_GATT_HVX_INDICATION) { + sd_ble_gattc_hv_confirm(conn_handle, evt_hvx->handle); + } + } + break; + } + case BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE: { + queue_next_write(self); + break; + } + case BLE_GATTC_EVT_WRITE_RSP: { + queue_next_write(self); + break; + } + default: + return false; + break; + } + return true; +} + +STATIC bool packet_buffer_on_ble_server_evt(ble_evt_t *ble_evt, void *param) { + bleio_packet_buffer_obj_t *self = (bleio_packet_buffer_obj_t *) param; + uint16_t conn_handle = ble_evt->evt.gatts_evt.conn_handle; + switch (ble_evt->header.evt_id) { + case BLE_GATTS_EVT_WRITE: { + // A client wrote to this server characteristic. + + ble_gatts_evt_write_t *evt_write = &ble_evt->evt.gatts_evt.params.write; + // Event handle must match the handle for my characteristic. + if (evt_write->handle == self->characteristic->handle) { + if (self->conn_handle == BLE_CONN_HANDLE_INVALID) { + self->conn_handle = conn_handle; + } else if (self->conn_handle != conn_handle) { + return false; + } + write_to_ringbuf(self, evt_write->data, evt_write->len); + } else if (evt_write->handle == self->characteristic->cccd_handle && + self->conn_handle == BLE_CONN_HANDLE_INVALID) { + uint16_t cccd = *((uint16_t*) evt_write->data); + if (cccd & BLE_GATT_HVX_NOTIFICATION) { + self->conn_handle = conn_handle; + } else { + self->conn_handle = BLE_CONN_HANDLE_INVALID; + } + } + break; + } + case BLE_GATTS_EVT_HVN_TX_COMPLETE: { + queue_next_write(self); + } + default: + return false; + break; + } + return true; +} + +void common_hal_bleio_packet_buffer_construct( + bleio_packet_buffer_obj_t *self, bleio_characteristic_obj_t *characteristic, + size_t buffer_size) { + + self->characteristic = characteristic; + self->client = self->characteristic->service->is_remote; + bleio_characteristic_properties_t incoming = self->characteristic->props & (CHAR_PROP_WRITE_NO_RESPONSE | CHAR_PROP_WRITE); + bleio_characteristic_properties_t outgoing = self->characteristic->props & (CHAR_PROP_NOTIFY | CHAR_PROP_INDICATE); + + if (self->client) { + // Swap if we're the client. + bleio_characteristic_properties_t temp = incoming; + incoming = outgoing; + outgoing = temp; + self->conn_handle = bleio_connection_get_conn_handle(MP_OBJ_TO_PTR(self->characteristic->service->connection)); + } + + if (incoming) { + // This is a macro. + ringbuf_alloc(&self->ringbuf, buffer_size * (sizeof(uint16_t) + characteristic->max_length), false); + + if (self->ringbuf.buf == NULL) { + mp_raise_ValueError(translate("Buffer too large and unable to allocate")); + } + } + + if (outgoing) { + self->packet_queued = false; + self->pending_index = 0; + self->pending_size = 0; + self->outgoing[0] = m_malloc(characteristic->max_length, false); + self->outgoing[1] = m_malloc(characteristic->max_length, false); + } else { + self->outgoing[0] = NULL; + self->outgoing[1] = NULL; + } + + if (self->client) { + ble_drv_add_event_handler(packet_buffer_on_ble_client_evt, self); + if (incoming) { + // Prefer notify if both are available. + if (incoming & CHAR_PROP_NOTIFY) { + self->write_type = BLE_GATT_HVX_NOTIFICATION; + common_hal_bleio_characteristic_set_cccd(self->characteristic, true, false); + } else { + common_hal_bleio_characteristic_set_cccd(self->characteristic, false, true); + } + } + if (outgoing) { + self->write_type = BLE_GATT_OP_WRITE_REQ; + if (outgoing & CHAR_PROP_WRITE_NO_RESPONSE) { + self->write_type = BLE_GATT_OP_WRITE_CMD; + } + } + } else { + ble_drv_add_event_handler(packet_buffer_on_ble_server_evt, self); + if (outgoing) { + self->write_type = BLE_GATT_HVX_INDICATION; + if (outgoing & CHAR_PROP_NOTIFY) { + self->write_type = BLE_GATT_HVX_NOTIFICATION; + } + } + } +} + +int common_hal_bleio_packet_buffer_readinto(bleio_packet_buffer_obj_t *self, uint8_t *data, size_t len) { + if (ringbuf_count(&self->ringbuf) < 2) { + return 0; + } + + uint16_t packet_length; + ringbuf_get_n(&self->ringbuf, (uint8_t*) &packet_length, sizeof(uint16_t)); + + // Copy received data. Lock out write interrupt handler while copying. + uint8_t is_nested_critical_region; + sd_nvic_critical_region_enter(&is_nested_critical_region); + + if (packet_length > len) { + // TODO: raise an exception. + packet_length = len; + } + + ringbuf_get_n(&self->ringbuf, data, packet_length); + + // Writes now OK. + sd_nvic_critical_region_exit(is_nested_critical_region); + + return packet_length; +} + +void common_hal_bleio_packet_buffer_write(bleio_packet_buffer_obj_t *self, uint8_t *data, size_t len, uint8_t* header, size_t header_len) { + if (self->outgoing[0] == NULL) { + mp_raise_bleio_BluetoothError(translate("Writes not supported on Characteristic")); + } + if (self->conn_handle == BLE_CONN_HANDLE_INVALID) { + return; + } + uint16_t packet_size = common_hal_bleio_packet_buffer_get_packet_size(self); + uint16_t max_size = packet_size - len; + while (max_size < self->pending_size && self->conn_handle != BLE_CONN_HANDLE_INVALID) { + RUN_BACKGROUND_TASKS; + } + if (self->conn_handle == BLE_CONN_HANDLE_INVALID) { + return; + } + uint8_t is_nested_critical_region; + sd_nvic_critical_region_enter(&is_nested_critical_region); + + uint8_t* pending = self->outgoing[self->pending_index]; + + if (self->pending_size == 0) { + memcpy(pending, header, header_len); + self->pending_size += header_len; + } + memcpy(pending + self->pending_size, data, len); + self->pending_size += len; + + sd_nvic_critical_region_exit(is_nested_critical_region); + + // If no writes are queued then sneak in this data. + if (!self->packet_queued) { + queue_next_write(self); + } +} + +uint16_t common_hal_bleio_packet_buffer_get_packet_size(bleio_packet_buffer_obj_t *self) { + uint16_t mtu; + if (self->conn_handle == BLE_CONN_HANDLE_INVALID) { + return 0; + } + bleio_connection_internal_t *connection; + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + connection = &bleio_connections[i]; + if (connection->conn_handle == self->conn_handle) { + break; + } + } + if (connection->mtu == 0) { + mtu = BLE_GATT_ATT_MTU_DEFAULT; + } + if (self->characteristic->max_length > mtu) { + mtu = self->characteristic->max_length; + } + uint16_t att_overhead = 3; + return mtu - att_overhead; +} + +bool common_hal_bleio_packet_buffer_deinited(bleio_packet_buffer_obj_t *self) { + return self->characteristic == NULL; +} + +void common_hal_bleio_packet_buffer_deinit(bleio_packet_buffer_obj_t *self) { + if (!common_hal_bleio_packet_buffer_deinited(self)) { + ble_drv_remove_event_handler(packet_buffer_on_ble_client_evt, self); + } +} diff --git a/ports/nrf/common-hal/_bleio/PacketBuffer.h b/ports/nrf/common-hal/_bleio/PacketBuffer.h new file mode 100644 index 0000000000..cfccc852ed --- /dev/null +++ b/ports/nrf/common-hal/_bleio/PacketBuffer.h @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019-2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_PACKETBUFFER_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_PACKETBUFFER_H + +#include "nrf_soc.h" + +#include "py/ringbuf.h" +#include "shared-bindings/_bleio/Characteristic.h" + +typedef struct { + mp_obj_base_t base; + bleio_characteristic_obj_t *characteristic; + // Ring buffer storing consecutive incoming values. + ringbuf_t ringbuf; + // Two outgoing buffers to alternate between. One will be queued for transmission by the SD and + // the other is waiting to be queued and can be extended. + uint8_t* outgoing[2]; + uint16_t pending_size; + uint16_t conn_handle; + uint8_t pending_index; + uint8_t write_type; + bool client; + bool packet_queued; +} bleio_packet_buffer_obj_t; + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_PACKETBUFFER_H diff --git a/ports/nrf/common-hal/_bleio/__init__.c b/ports/nrf/common-hal/_bleio/__init__.c index 4b2780dedc..8606c89ec1 100644 --- a/ports/nrf/common-hal/_bleio/__init__.c +++ b/ports/nrf/common-hal/_bleio/__init__.c @@ -48,6 +48,9 @@ void check_nrf_error(uint32_t err_code) { case NRF_ERROR_TIMEOUT: mp_raise_msg(&mp_type_TimeoutError, NULL); return; + case BLE_ERROR_INVALID_CONN_HANDLE: + mp_raise_bleio_ConnectionError(translate("Not connected")); + return; default: mp_raise_bleio_BluetoothError(translate("Unknown soft device error: %04x"), err_code); break; diff --git a/ports/nrf/fatfs_port.c b/ports/nrf/fatfs_port.c index 13ac21fb1b..cb1bfa8347 100644 --- a/ports/nrf/fatfs_port.c +++ b/ports/nrf/fatfs_port.c @@ -26,8 +26,17 @@ #include "py/runtime.h" #include "lib/oofatfs/ff.h" +#include "lib/timeutils/timeutils.h" +#include "shared-bindings/rtc/RTC.h" +#include "shared-bindings/time/__init__.h" DWORD get_fattime(void) { - // TODO: Implement this function. For now, fake it. - return ((2016 - 1980) << 25) | ((12) << 21) | ((4) << 16) | ((00) << 11) | ((18) << 5) | (23 / 2); +#if CIRCUITPY_RTC + timeutils_struct_time_t tm; + common_hal_rtc_get_time(&tm); + return ((tm.tm_year - 1980) << 25) | (tm.tm_mon << 21) | (tm.tm_mday << 16) | + (tm.tm_hour << 11) | (tm.tm_min << 5) | (tm.tm_sec >> 1); +#else + return ((2016 - 1980) << 25) | ((9) << 21) | ((1) << 16) | ((16) << 11) | ((43) << 5) | (35 / 2); +#endif } diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index e97d793bed..0371685d8b 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -39,7 +39,7 @@ #define BOARD_NO_VBUS_SENSE // On-board flash -// #define SPI_FLASH_MOSI_PIN (&pin_PB15) -// #define SPI_FLASH_MISO_PIN (&pin_PB14) -// #define SPI_FLASH_SCK_PIN (&pin_PB13) -// #define SPI_FLASH_CS_PIN (&pin_PB01) +#define SPI_FLASH_MOSI_PIN (&pin_PB15) +#define SPI_FLASH_MISO_PIN (&pin_PB14) +#define SPI_FLASH_SCK_PIN (&pin_PB13) +#define SPI_FLASH_CS_PIN (&pin_PB01) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index fc9209d15d..e8a257983f 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -4,13 +4,13 @@ USB_PRODUCT = "Meowbit" USB_MANUFACTURER = "Kittenbot" USB_DEVICES = "CDC,MSC" -# SPI_FLASH_FILESYSTEM = 1 -# EXTERNAL_FLASH_DEVICE_COUNT = 1 -# EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ -# LONGINT_IMPL = MPZ +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ +LONGINT_IMPL = MPZ -INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE +# INTERNAL_FLASH_FILESYSTEM = 1 +# LONGINT_IMPL = NONE MCU_SERIES = m4 MCU_VARIANT = stm32f4 diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index 32089887f9..deacedb507 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -36,6 +36,9 @@ #include "supervisor/shared/translate.h" #include "common-hal/microcontroller/Pin.h" +// Note that any bugs introduced in this file can cause crashes at startup +// for chips using external SPI flash. + #define MAX_SPI 6 //TODO; replace this as part of periph cleanup #define ALL_CLOCKS 0xFF @@ -49,10 +52,10 @@ STATIC void spi_clock_disable(uint8_t mask); STATIC uint32_t get_busclock(SPI_TypeDef * instance) { //SPI2 and 3 are on PCLK1, if they exist. #ifdef SPI2 - if(instance == SPI2) return HAL_RCC_GetPCLK1Freq(); + if (instance == SPI2) return HAL_RCC_GetPCLK1Freq(); #endif #ifdef SPI3 - if(instance == SPI3) return HAL_RCC_GetPCLK1Freq(); + if (instance == SPI3) return HAL_RCC_GetPCLK1Freq(); #endif return HAL_RCC_GetPCLK2Freq(); } @@ -79,38 +82,80 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, uint8_t sck_len = sizeof(mcu_spi_sck_list)/sizeof(*mcu_spi_sck_list); uint8_t mosi_len = sizeof(mcu_spi_mosi_list)/sizeof(*mcu_spi_mosi_list); uint8_t miso_len = sizeof(mcu_spi_miso_list)/sizeof(*mcu_spi_miso_list); - bool spi_taken = false; - //sck - for(uint i=0; isck = &mcu_spi_sck_list[i]; + self->mosi = &mcu_spi_mosi_list[j]; + self->miso = &mcu_spi_miso_list[k]; + break; } - //store pins if not - self->sck = &mcu_spi_sck_list[i]; - self->mosi = &mcu_spi_mosi_list[j]; - self->miso = &mcu_spi_miso_list[k]; - break; - } - } + } + } } + // if just MISO, reduce search + } else if (miso != mp_const_none) { + for (uint j=0; jsck = &mcu_spi_sck_list[i]; + self->mosi = NULL; + self->miso = &mcu_spi_miso_list[j]; + break; + } + } + // if just MOSI, reduce search + } else if (mosi != mp_const_none) { + for (uint j=0; jsck = &mcu_spi_sck_list[i]; + self->mosi = &mcu_spi_mosi_list[j]; + self->miso = NULL; + break; + } + } + } else { + //throw an error immediately + mp_raise_ValueError(translate("Must provide MISO or MOSI pin")); } } } //handle typedef selection, errors - if(self->sck!=NULL && self->mosi!=NULL && self->miso!=NULL ) { + if ( (self->sck!=NULL && self->mosi!=NULL && self->miso != NULL) || + (self->sck!=NULL && self->mosi!=NULL && miso == mp_const_none) || + (self->sck!=NULL && self->miso!=NULL && mosi == mp_const_none)) { SPIx = mcu_spi_banks[self->sck->spi_index-1]; } else { if (spi_taken) { @@ -129,26 +174,31 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, GPIO_InitStruct.Alternate = self->sck->altfn_index; HAL_GPIO_Init(pin_port(sck->port), &GPIO_InitStruct); - GPIO_InitStruct.Pin = pin_mask(mosi->number); - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = self->mosi->altfn_index; - HAL_GPIO_Init(pin_port(mosi->port), &GPIO_InitStruct); + if (self->mosi != NULL) { + GPIO_InitStruct.Pin = pin_mask(mosi->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->mosi->altfn_index; + HAL_GPIO_Init(pin_port(mosi->port), &GPIO_InitStruct); + } - GPIO_InitStruct.Pin = pin_mask(miso->number); - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = self->miso->altfn_index; - HAL_GPIO_Init(pin_port(miso->port), &GPIO_InitStruct); + if (self->miso != NULL) { + GPIO_InitStruct.Pin = pin_mask(miso->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->miso->altfn_index; + HAL_GPIO_Init(pin_port(miso->port), &GPIO_InitStruct); + } spi_clock_enable(1<<(self->sck->spi_index - 1)); reserved_spi[self->sck->spi_index - 1] = true; self->handle.Instance = SPIx; self->handle.Init.Mode = SPI_MODE_MASTER; - self->handle.Init.Direction = SPI_DIRECTION_2LINES; + // Direction change only required for RX-only, see RefMan RM0090:884 + self->handle.Init.Direction = (self->mosi == NULL) ? SPI_CR1_RXONLY : SPI_DIRECTION_2LINES; self->handle.Init.DataSize = SPI_DATASIZE_8BIT; self->handle.Init.CLKPolarity = SPI_POLARITY_LOW; self->handle.Init.CLKPhase = SPI_PHASE_1EDGE; @@ -169,17 +219,25 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, self->bits = 8; claim_pin(sck); - claim_pin(mosi); - claim_pin(miso); + if (self->mosi != NULL) { + claim_pin(mosi); + } + if (self->miso != NULL) { + claim_pin(miso); + } } void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { - for(size_t i = 0 ; i < MP_ARRAY_SIZE(mcu_spi_banks); i++) { + for (size_t i = 0 ; i < MP_ARRAY_SIZE(mcu_spi_banks); i++) { if (mcu_spi_banks[i] == self->handle.Instance) { never_reset_spi[i] = true; never_reset_pin_number(self->sck->pin->port, self->sck->pin->number); - never_reset_pin_number(self->mosi->pin->port, self->mosi->pin->number); - never_reset_pin_number(self->miso->pin->port, self->miso->pin->number); + if (self->mosi != NULL) { + never_reset_pin_number(self->mosi->pin->port, self->mosi->pin->number); + } + if (self->miso != NULL) { + never_reset_pin_number(self->miso->pin->port, self->miso->pin->number); + } break; } } @@ -195,8 +253,12 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { never_reset_spi[self->sck->spi_index - 1] = false; reset_pin_number(self->sck->pin->port,self->sck->pin->number); - reset_pin_number(self->mosi->pin->port,self->mosi->pin->number); - reset_pin_number(self->miso->pin->port,self->miso->pin->number); + if (self->mosi != NULL) { + reset_pin_number(self->mosi->pin->port,self->mosi->pin->number); + } + if (self->miso != NULL) { + reset_pin_number(self->miso->pin->port,self->miso->pin->number); + } self->sck = mp_const_none; self->mosi = mp_const_none; self->miso = mp_const_none; @@ -232,7 +294,9 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { //This resets the SPI, so check before updating it redundantly if (baudrate == self->baudrate && polarity== self->polarity - && phase == self->phase && bits == self->bits) return true; + && phase == self->phase && bits == self->bits) { + return true; + } //Deinit SPI HAL_SPI_DeInit(&self->handle); @@ -243,13 +307,6 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self, self->handle.Init.BaudRatePrescaler = stm32_baud_to_spi_div(baudrate, &self->prescaler, get_busclock(self->handle.Instance)); - self->handle.Init.Mode = SPI_MODE_MASTER; - self->handle.Init.Direction = SPI_DIRECTION_2LINES; - self->handle.Init.NSS = SPI_NSS_SOFT; - self->handle.Init.FirstBit = SPI_FIRSTBIT_MSB; - self->handle.Init.TIMode = SPI_TIMODE_DISABLE; - self->handle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - self->handle.Init.CRCPolynomial = 10; if (HAL_SPI_Init(&self->handle) != HAL_OK) { @@ -292,18 +349,27 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { + if (self->mosi == NULL) { + mp_raise_ValueError(translate("No MOSI Pin")); + } HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, HAL_MAX_DELAY); return result == HAL_OK; } bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { + if (self->miso == NULL) { + mp_raise_ValueError(translate("No MISO Pin")); + } HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, HAL_MAX_DELAY); return result == HAL_OK; } bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { + if (self->miso == NULL || self->mosi == NULL) { + mp_raise_ValueError(translate("Missing MISO or MOSI Pin")); + } HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle, data_out, data_in, (uint16_t)len,HAL_MAX_DELAY); return result == HAL_OK; diff --git a/py/circuitpy_defns.mk b/py/circuitpy_defns.mk index 8dd4fc6b16..1f2d6c73ef 100644 --- a/py/circuitpy_defns.mk +++ b/py/circuitpy_defns.mk @@ -236,6 +236,7 @@ SRC_COMMON_HAL_ALL = \ _bleio/CharacteristicBuffer.c \ _bleio/Connection.c \ _bleio/Descriptor.c \ + _bleio/PacketBuffer.c \ _bleio/Service.c \ _bleio/UUID.c \ analogio/AnalogIn.c \ @@ -322,7 +323,7 @@ SRC_SHARED_MODULE_ALL = \ audiomixer/Mixer.c \ audiomixer/MixerVoice.c \ audiomp3/__init__.c \ - audiomp3/MP3File.c \ + audiomp3/MP3Decoder.c \ bitbangio/I2C.c \ bitbangio/OneWire.c \ bitbangio/SPI.c \ diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 932d4f855f..8c7454cf26 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -328,7 +328,9 @@ extern const struct _mp_obj_module_t terminalio_module; #define DISPLAYIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_displayio), (mp_obj_t)&displayio_module }, #define FONTIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_fontio), (mp_obj_t)&fontio_module }, #define TERMINALIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_terminalio), (mp_obj_t)&terminalio_module }, +#ifndef CIRCUITPY_DISPLAY_LIMIT #define CIRCUITPY_DISPLAY_LIMIT (1) +#endif #else #define DISPLAYIO_MODULE #define FONTIO_MODULE diff --git a/shared-bindings/_bleio/PacketBuffer.c b/shared-bindings/_bleio/PacketBuffer.c new file mode 100644 index 0000000000..f9f171870b --- /dev/null +++ b/shared-bindings/_bleio/PacketBuffer.c @@ -0,0 +1,201 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mperrno.h" +#include "py/ioctl.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/stream.h" + +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/PacketBuffer.h" +#include "shared-bindings/_bleio/UUID.h" +#include "shared-bindings/util.h" + +//| .. currentmodule:: _bleio +//| +//| :class:`PacketBuffer` -- Packet-oriented characteristic usage. +//| ===================================================================== +//| +//| Accumulates a Characteristic's incoming packets in a FIFO buffer and facilitates packet aware +//| outgoing writes. A packet's size is either the characteristic length or the maximum transmission +//| unit (MTU), whichever is smaller. The MTU can change so check `packet_size` before creating a +//| buffer to store data. +//| +//| When we're the server, we ignore all connections besides the first to subscribe to +//| notifications. +//| +//| .. class:: PacketBuffer(characteristic, *, buffer_size) +//| +//| Monitor the given Characteristic. Each time a new value is written to the Characteristic +//| add the newly-written bytes to a FIFO buffer. +//| +//| :param Characteristic characteristic: The Characteristic to monitor. +//| It may be a local Characteristic provided by a Peripheral Service, or a remote Characteristic +//| in a remote Service that a Central has connected to. +//| :param int buffer_size: Size of ring buffer (in packets of the Characteristic's maximum +//| length) that stores incoming packets coming from the peer. +//| +STATIC mp_obj_t bleio_packet_buffer_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_characteristic, ARG_buffer_size }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_characteristic, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_buffer_size, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT }, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mp_obj_t characteristic = args[ARG_characteristic].u_obj; + + const int buffer_size = args[ARG_buffer_size].u_int; + if (buffer_size < 1) { + mp_raise_ValueError_varg(translate("%q must be >= 1"), MP_QSTR_buffer_size); + } + + if (!MP_OBJ_IS_TYPE(characteristic, &bleio_characteristic_type)) { + mp_raise_TypeError(translate("Expected a Characteristic")); + } + + bleio_packet_buffer_obj_t *self = m_new_obj(bleio_packet_buffer_obj_t); + self->base.type = &bleio_packet_buffer_type; + + common_hal_bleio_packet_buffer_construct(self, MP_OBJ_TO_PTR(characteristic), buffer_size); + + return MP_OBJ_FROM_PTR(self); +} + +STATIC void check_for_deinit(bleio_packet_buffer_obj_t *self) { + if (common_hal_bleio_packet_buffer_deinited(self)) { + raise_deinited_error(); + } +} + +//| .. method:: readinto(buf) +//| +//| Reads a single BLE packet into the ``buf``. Raises an exception if the next packet is longer +//| than the given buffer. Use `packet_size` to read the maximum length of a single packet. +//| +//| :return: number of bytes read and stored into ``buf`` +//| :rtype: int +//| +STATIC mp_obj_t bleio_packet_buffer_readinto(mp_obj_t self_in, mp_obj_t buffer_obj) { + bleio_packet_buffer_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buffer_obj, &bufinfo, MP_BUFFER_WRITE); + + return MP_OBJ_NEW_SMALL_INT(common_hal_bleio_packet_buffer_readinto(self, bufinfo.buf, bufinfo.len)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bleio_packet_buffer_readinto_obj, bleio_packet_buffer_readinto); + +//| .. method:: write(data, *, header=None) +//| +//| Writes all bytes from data into the same outgoing packet. The bytes from header are included +//| before data when the pending packet is currently empty. +//| +//| This does not block until the data is sent. It only blocks until the data is pending. +//| +// TODO: Add a kwarg `merge=False` to dictate whether subsequent writes are merged into a pending +// one. +STATIC mp_obj_t bleio_packet_buffer_write(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_data, ARG_header }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_header, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}}, + }; + + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + bleio_packet_buffer_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + check_for_deinit(self); + + mp_buffer_info_t data_bufinfo; + mp_get_buffer_raise(args[ARG_data].u_obj, &data_bufinfo, MP_BUFFER_READ); + + mp_buffer_info_t header_bufinfo; + header_bufinfo.len = 0; + if (args[ARG_header].u_obj != MP_OBJ_NULL) { + mp_get_buffer_raise(args[ARG_header].u_obj, &header_bufinfo, MP_BUFFER_READ); + } + + common_hal_bleio_packet_buffer_write(self, data_bufinfo.buf, data_bufinfo.len, + header_bufinfo.buf, header_bufinfo.len); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_packet_buffer_write_obj, 1, bleio_packet_buffer_write); + +//| .. method:: deinit() +//| +//| Disable permanently. +//| +STATIC mp_obj_t bleio_packet_buffer_deinit(mp_obj_t self_in) { + bleio_packet_buffer_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_bleio_packet_buffer_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_packet_buffer_deinit_obj, bleio_packet_buffer_deinit); + +//| .. attribute:: packet_size +//| +//| Maximum size of each packet in bytes. This is the minimum of the Characterstic length and +//| the negotiated Maximum Transfer Unit (MTU). +//| +STATIC mp_obj_t bleio_packet_buffer_get_packet_size(mp_obj_t self_in) { + bleio_packet_buffer_obj_t *self = MP_OBJ_TO_PTR(self_in); + + return mp_obj_new_bool(common_hal_bleio_packet_buffer_get_packet_size(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_packet_buffer_get_packet_size_obj, bleio_packet_buffer_get_packet_size); + +const mp_obj_property_t bleio_packet_buffer_packet_size_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&bleio_packet_buffer_get_packet_size_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +STATIC const mp_rom_map_elem_t bleio_packet_buffer_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&bleio_packet_buffer_deinit_obj) }, + + // Standard stream methods. + { MP_OBJ_NEW_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&bleio_packet_buffer_readinto_obj) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_write), MP_ROM_PTR(&bleio_packet_buffer_write_obj) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_packet_size), MP_ROM_PTR(&bleio_packet_buffer_packet_size_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(bleio_packet_buffer_locals_dict, bleio_packet_buffer_locals_dict_table); + + +const mp_obj_type_t bleio_packet_buffer_type = { + { &mp_type_type }, + .name = MP_QSTR_PacketBuffer, + .make_new = bleio_packet_buffer_make_new, + .locals_dict = (mp_obj_dict_t*)&bleio_packet_buffer_locals_dict +}; diff --git a/shared-bindings/_bleio/PacketBuffer.h b/shared-bindings/_bleio/PacketBuffer.h new file mode 100644 index 0000000000..990a2f8bb0 --- /dev/null +++ b/shared-bindings/_bleio/PacketBuffer.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_PACKETBUFFER_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_PACKETBUFFER_H + +#include "common-hal/_bleio/PacketBuffer.h" + +extern const mp_obj_type_t bleio_packet_buffer_type; + +extern void common_hal_bleio_packet_buffer_construct( + bleio_packet_buffer_obj_t *self, bleio_characteristic_obj_t *characteristic, + size_t buffer_size); +void common_hal_bleio_packet_buffer_write(bleio_packet_buffer_obj_t *self, uint8_t *data, size_t len, uint8_t* header, size_t header_len); +int common_hal_bleio_packet_buffer_readinto(bleio_packet_buffer_obj_t *self, uint8_t *data, size_t len); +uint16_t common_hal_bleio_packet_buffer_get_packet_size(bleio_packet_buffer_obj_t *self); +bool common_hal_bleio_packet_buffer_deinited(bleio_packet_buffer_obj_t *self); +void common_hal_bleio_packet_buffer_deinit(bleio_packet_buffer_obj_t *self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_PACKETBUFFER_H diff --git a/shared-bindings/_bleio/__init__.c b/shared-bindings/_bleio/__init__.c index ba2454da45..5d26862a64 100644 --- a/shared-bindings/_bleio/__init__.c +++ b/shared-bindings/_bleio/__init__.c @@ -35,6 +35,7 @@ #include "shared-bindings/_bleio/CharacteristicBuffer.h" #include "shared-bindings/_bleio/Connection.h" #include "shared-bindings/_bleio/Descriptor.h" +#include "shared-bindings/_bleio/PacketBuffer.h" #include "shared-bindings/_bleio/ScanEntry.h" #include "shared-bindings/_bleio/ScanResults.h" #include "shared-bindings/_bleio/Service.h" @@ -69,6 +70,7 @@ //| CharacteristicBuffer //| Connection //| Descriptor +//| PacketBuffer //| ScanEntry //| ScanResults //| Service @@ -140,8 +142,9 @@ STATIC const mp_rom_map_elem_t bleio_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_Characteristic), MP_ROM_PTR(&bleio_characteristic_type) }, { MP_ROM_QSTR(MP_QSTR_CharacteristicBuffer), MP_ROM_PTR(&bleio_characteristic_buffer_type) }, { MP_ROM_QSTR(MP_QSTR_Descriptor), MP_ROM_PTR(&bleio_descriptor_type) }, + { MP_ROM_QSTR(MP_QSTR_PacketBuffer), MP_ROM_PTR(&bleio_packet_buffer_type) }, { MP_ROM_QSTR(MP_QSTR_ScanEntry), MP_ROM_PTR(&bleio_scanentry_type) }, - { MP_ROM_QSTR(MP_QSTR_ScanResults), MP_ROM_PTR(&bleio_scanresults_type) }, + { MP_ROM_QSTR(MP_QSTR_ScanResults), MP_ROM_PTR(&bleio_scanresults_type) }, { MP_ROM_QSTR(MP_QSTR_Service), MP_ROM_PTR(&bleio_service_type) }, { MP_ROM_QSTR(MP_QSTR_UUID), MP_ROM_PTR(&bleio_uuid_type) }, diff --git a/shared-bindings/audiomp3/MP3File.c b/shared-bindings/audiomp3/MP3Decoder.c similarity index 79% rename from shared-bindings/audiomp3/MP3File.c rename to shared-bindings/audiomp3/MP3Decoder.c index f518bae4bb..2240422127 100644 --- a/shared-bindings/audiomp3/MP3File.c +++ b/shared-bindings/audiomp3/MP3Decoder.c @@ -30,18 +30,16 @@ #include "lib/utils/context_manager_helpers.h" #include "py/objproperty.h" #include "py/runtime.h" -#include "shared-bindings/audiomp3/MP3File.h" +#include "shared-bindings/audiomp3/MP3Decoder.h" #include "shared-bindings/util.h" #include "supervisor/shared/translate.h" //| .. currentmodule:: audiomp3 //| -//| :class:`MP3` -- Load a mp3 file for audio playback -//| ======================================================== +//| :class:`MP3Decoder` -- Load a mp3 file for audio playback +//| ========================================================= //| -//| A .mp3 file prepped for audio playback. Only mono and stereo files are supported. Samples must -//| be 8 bit unsigned or 16 bit signed. If a buffer is provided, it will be used instead of allocating -//| an internal buffer. +//| An object that decodes MP3 files for playback on an audio device. //| //| .. class:: MP3(file[, buffer]) //| @@ -63,7 +61,7 @@ //| speaker_enable.switch_to_output(value=True) //| //| data = open("cplay-16bit-16khz-64kbps.mp3", "rb") -//| mp3 = audiomp3.MP3File(data) +//| mp3 = audiomp3.MP3Decoder(data) //| a = audioio.AudioOut(board.A0) //| //| print("playing") @@ -129,6 +127,37 @@ STATIC mp_obj_t audiomp3_mp3file_obj___exit__(size_t n_args, const mp_obj_t *arg } STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(audiomp3_mp3file___exit___obj, 4, 4, audiomp3_mp3file_obj___exit__); +//| .. attribute:: file +//| +//| File to play back. +//| +STATIC mp_obj_t audiomp3_mp3file_obj_get_file(mp_obj_t self_in) { + audiomp3_mp3file_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return self->file; +} +MP_DEFINE_CONST_FUN_OBJ_1(audiomp3_mp3file_get_file_obj, audiomp3_mp3file_obj_get_file); + +STATIC mp_obj_t audiomp3_mp3file_obj_set_file(mp_obj_t self_in, mp_obj_t file) { + audiomp3_mp3file_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + if (!MP_OBJ_IS_TYPE(file, &mp_type_fileio)) { + mp_raise_TypeError(translate("file must be a file opened in byte mode")); + } + common_hal_audiomp3_mp3file_set_file(self, file); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(audiomp3_mp3file_set_file_obj, audiomp3_mp3file_obj_set_file); + +const mp_obj_property_t audiomp3_mp3file_file_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiomp3_mp3file_get_file_obj, + (mp_obj_t)&audiomp3_mp3file_set_file_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + + //| .. attribute:: sample_rate //| //| 32 bit value that dictates how quickly samples are loaded into the DAC @@ -193,6 +222,24 @@ const mp_obj_property_t audiomp3_mp3file_channel_count_obj = { (mp_obj_t)&mp_const_none_obj}, }; +//| .. attribute:: rms_level +//| +//| The RMS audio level of a recently played moment of audio. (read only) +//| +STATIC mp_obj_t audiomp3_mp3file_obj_get_rms_level(mp_obj_t self_in) { + audiomp3_mp3file_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return mp_obj_new_float(common_hal_audiomp3_mp3file_get_rms_level(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(audiomp3_mp3file_get_rms_level_obj, audiomp3_mp3file_obj_get_rms_level); + +const mp_obj_property_t audiomp3_mp3file_rms_level_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&audiomp3_mp3file_get_rms_level_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + STATIC const mp_rom_map_elem_t audiomp3_mp3file_locals_dict_table[] = { // Methods @@ -201,9 +248,11 @@ STATIC const mp_rom_map_elem_t audiomp3_mp3file_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&audiomp3_mp3file___exit___obj) }, // Properties + { MP_ROM_QSTR(MP_QSTR_file), MP_ROM_PTR(&audiomp3_mp3file_file_obj) }, { MP_ROM_QSTR(MP_QSTR_sample_rate), MP_ROM_PTR(&audiomp3_mp3file_sample_rate_obj) }, { MP_ROM_QSTR(MP_QSTR_bits_per_sample), MP_ROM_PTR(&audiomp3_mp3file_bits_per_sample_obj) }, { MP_ROM_QSTR(MP_QSTR_channel_count), MP_ROM_PTR(&audiomp3_mp3file_channel_count_obj) }, + { MP_ROM_QSTR(MP_QSTR_rms_level), MP_ROM_PTR(&audiomp3_mp3file_rms_level_obj) }, }; STATIC MP_DEFINE_CONST_DICT(audiomp3_mp3file_locals_dict, audiomp3_mp3file_locals_dict_table); @@ -219,7 +268,7 @@ STATIC const audiosample_p_t audiomp3_mp3file_proto = { const mp_obj_type_t audiomp3_mp3file_type = { { &mp_type_type }, - .name = MP_QSTR_MP3File, + .name = MP_QSTR_MP3Decoder, .make_new = audiomp3_mp3file_make_new, .locals_dict = (mp_obj_dict_t*)&audiomp3_mp3file_locals_dict, .protocol = &audiomp3_mp3file_proto, diff --git a/shared-bindings/audiomp3/MP3File.h b/shared-bindings/audiomp3/MP3Decoder.h similarity index 90% rename from shared-bindings/audiomp3/MP3File.h rename to shared-bindings/audiomp3/MP3Decoder.h index adc13ea2c0..36d525e938 100644 --- a/shared-bindings/audiomp3/MP3File.h +++ b/shared-bindings/audiomp3/MP3Decoder.h @@ -31,18 +31,20 @@ #include "py/obj.h" #include "extmod/vfs_fat.h" -#include "shared-module/audiomp3/MP3File.h" +#include "shared-module/audiomp3/MP3Decoder.h" extern const mp_obj_type_t audiomp3_mp3file_type; void common_hal_audiomp3_mp3file_construct(audiomp3_mp3file_obj_t* self, pyb_file_obj_t* file, uint8_t *buffer, size_t buffer_size); +void common_hal_audiomp3_mp3file_set_file(audiomp3_mp3file_obj_t* self, pyb_file_obj_t* file); void common_hal_audiomp3_mp3file_deinit(audiomp3_mp3file_obj_t* self); bool common_hal_audiomp3_mp3file_deinited(audiomp3_mp3file_obj_t* self); uint32_t common_hal_audiomp3_mp3file_get_sample_rate(audiomp3_mp3file_obj_t* self); void common_hal_audiomp3_mp3file_set_sample_rate(audiomp3_mp3file_obj_t* self, uint32_t sample_rate); uint8_t common_hal_audiomp3_mp3file_get_bits_per_sample(audiomp3_mp3file_obj_t* self); uint8_t common_hal_audiomp3_mp3file_get_channel_count(audiomp3_mp3file_obj_t* self); +float common_hal_audiomp3_mp3file_get_rms_level(audiomp3_mp3file_obj_t* self); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOIO_MP3FILE_H diff --git a/shared-bindings/audiomp3/__init__.c b/shared-bindings/audiomp3/__init__.c index 06f852ff1c..fb2187669c 100644 --- a/shared-bindings/audiomp3/__init__.c +++ b/shared-bindings/audiomp3/__init__.c @@ -29,7 +29,7 @@ #include "py/obj.h" #include "py/runtime.h" -#include "shared-bindings/audiomp3/MP3File.h" +#include "shared-bindings/audiomp3/MP3Decoder.h" //| :mod:`audiomp3` --- Support for MP3-compressed audio files //| ========================================================== @@ -44,12 +44,12 @@ //| .. toctree:: //| :maxdepth: 3 //| -//| MP3File +//| MP3Decoder //| STATIC const mp_rom_map_elem_t audiomp3_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_audiomp3) }, - { MP_ROM_QSTR(MP_QSTR_MP3File), MP_ROM_PTR(&audiomp3_mp3file_type) }, + { MP_ROM_QSTR(MP_QSTR_MP3Decoder), MP_ROM_PTR(&audiomp3_mp3file_type) }, }; STATIC MP_DEFINE_CONST_DICT(audiomp3_module_globals, audiomp3_module_globals_table); diff --git a/shared-module/audiomp3/MP3File.c b/shared-module/audiomp3/MP3Decoder.c similarity index 86% rename from shared-module/audiomp3/MP3File.c rename to shared-module/audiomp3/MP3Decoder.c index 0aa4f24a66..30357c6161 100644 --- a/shared-module/audiomp3/MP3File.c +++ b/shared-module/audiomp3/MP3Decoder.c @@ -25,18 +25,21 @@ * THE SOFTWARE. */ -#include "shared-bindings/audiomp3/MP3File.h" +#include "shared-bindings/audiomp3/MP3Decoder.h" #include #include +#include #include "py/mperrno.h" #include "py/runtime.h" -#include "shared-module/audiomp3/MP3File.h" +#include "shared-module/audiomp3/MP3Decoder.h" #include "supervisor/shared/translate.h" #include "lib/mp3/src/mp3common.h" +#define MAX_BUFFER_LEN (MAX_NSAMP * MAX_NGRAN * MAX_NCHAN * sizeof(int16_t)) + /** Fill the input buffer if it is less than half full. * * Returns true if the input buffer contains any useful data, @@ -143,7 +146,7 @@ STATIC bool mp3file_get_next_frame_info(audiomp3_mp3file_obj_t* self, MP3FrameIn do { err = MP3GetNextFrameInfo(self->decoder, fi, READ_PTR(self)); if (err == ERR_MP3_NONE) { - break; + break; } CONSUME(self, 1); mp3file_find_sync_word(self); @@ -165,7 +168,6 @@ void common_hal_audiomp3_mp3file_construct(audiomp3_mp3file_obj_t* self, // than the two 4kB output buffers, except that the alignment allows to // never allocate that extra frame buffer. - self->file = file; self->inbuf_length = 2048; self->inbuf_offset = self->inbuf_length; self->inbuf = m_malloc(self->inbuf_length, false); @@ -181,7 +183,46 @@ void common_hal_audiomp3_mp3file_construct(audiomp3_mp3file_obj_t* self, translate("Couldn't allocate decoder")); } + if ((intptr_t)buffer & 1) { + buffer += 1; buffer_size -= 1; + } + if (buffer_size >= 2 * MAX_BUFFER_LEN) { + self->buffers[0] = (int16_t*)(void*)buffer; + self->buffers[1] = (int16_t*)(void*)(buffer + MAX_BUFFER_LEN); + } else { + self->buffers[0] = m_malloc(MAX_BUFFER_LEN, false); + if (self->buffers[0] == NULL) { + common_hal_audiomp3_mp3file_deinit(self); + mp_raise_msg(&mp_type_MemoryError, + translate("Couldn't allocate first buffer")); + } + + self->buffers[1] = m_malloc(MAX_BUFFER_LEN, false); + if (self->buffers[1] == NULL) { + common_hal_audiomp3_mp3file_deinit(self); + mp_raise_msg(&mp_type_MemoryError, + translate("Couldn't allocate second buffer")); + } + } + + common_hal_audiomp3_mp3file_set_file(self, file); +} + +void common_hal_audiomp3_mp3file_set_file(audiomp3_mp3file_obj_t* self, pyb_file_obj_t* file) { + self->file = file; + f_lseek(&self->file->fp, 0); + self->inbuf_offset = self->inbuf_length; + self->eof = 0; + self->other_channel = -1; + mp3file_update_inbuf(self); mp3file_find_sync_word(self); + // It **SHOULD** not be necessary to do this; the buffer should be filled + // with fresh content before it is returned by get_buffer(). The fact that + // this is necessary to avoid a glitch at the start of playback of a second + // track using the same decoder object means there's still a bug in + // get_buffer() that I didn't understand. + memset(self->buffers[0], 0, MAX_BUFFER_LEN); + memset(self->buffers[1], 0, MAX_BUFFER_LEN); MP3FrameInfo fi; if(!mp3file_get_next_frame_info(self, &fi)) { mp_raise_msg(&mp_type_RuntimeError, @@ -191,30 +232,7 @@ void common_hal_audiomp3_mp3file_construct(audiomp3_mp3file_obj_t* self, self->sample_rate = fi.samprate; self->channel_count = fi.nChans; self->frame_buffer_size = fi.outputSamps*sizeof(int16_t); - - if ((intptr_t)buffer & 1) { - buffer += 1; buffer_size -= 1; - } - if (buffer_size >= 2 * self->frame_buffer_size) { - self->len = buffer_size / 2 / self->frame_buffer_size * self->frame_buffer_size; - self->buffers[0] = (int16_t*)(void*)buffer; - self->buffers[1] = (int16_t*)(void*)buffer + self->len; - } else { - self->len = 2 * self->frame_buffer_size; - self->buffers[0] = m_malloc(self->len, false); - if (self->buffers[0] == NULL) { - common_hal_audiomp3_mp3file_deinit(self); - mp_raise_msg(&mp_type_MemoryError, - translate("Couldn't allocate first buffer")); - } - - self->buffers[1] = m_malloc(self->len, false); - if (self->buffers[1] == NULL) { - common_hal_audiomp3_mp3file_deinit(self); - mp_raise_msg(&mp_type_MemoryError, - translate("Couldn't allocate second buffer")); - } - } + self->len = 2 * self->frame_buffer_size; } void common_hal_audiomp3_mp3file_deinit(audiomp3_mp3file_obj_t* self) { @@ -280,7 +298,6 @@ audioio_get_buffer_result_t audiomp3_mp3file_get_buffer(audiomp3_mp3file_obj_t* channel = 0; } - *bufptr = (uint8_t*)(self->buffers[self->buffer_index] + channel); *buffer_length = self->frame_buffer_size; if (channel == self->other_channel) { @@ -289,11 +306,12 @@ audioio_get_buffer_result_t audiomp3_mp3file_get_buffer(audiomp3_mp3file_obj_t* return GET_BUFFER_MORE_DATA; } - self->other_channel = 1-channel; - self->other_buffer_index = self->buffer_index; self->buffer_index = !self->buffer_index; + self->other_channel = 1-channel; + self->other_buffer_index = self->buffer_index; int16_t *buffer = (int16_t *)(void *)self->buffers[self->buffer_index]; + *bufptr = (uint8_t*)buffer; mp3file_skip_id3v2(self); if (!mp3file_find_sync_word(self)) { @@ -322,3 +340,13 @@ void audiomp3_mp3file_get_buffer_structure(audiomp3_mp3file_obj_t* self, bool si *spacing = 1; } } + +float common_hal_audiomp3_mp3file_get_rms_level(audiomp3_mp3file_obj_t* self) { + float sumsq = 0.f; + // Assumes no DC component to the audio. Is that a safe assumption? + int16_t *buffer = (int16_t *)(void *)self->buffers[self->buffer_index]; + for(size_t i=0; iframe_buffer_size / sizeof(int16_t); i++) { + sumsq += (float)buffer[i] * buffer[i]; + } + return sqrtf(sumsq) / (self->frame_buffer_size / sizeof(int16_t)); +} diff --git a/shared-module/audiomp3/MP3File.h b/shared-module/audiomp3/MP3Decoder.h similarity index 97% rename from shared-module/audiomp3/MP3File.h rename to shared-module/audiomp3/MP3Decoder.h index 9d99e8d1f0..9ee1d0949b 100644 --- a/shared-module/audiomp3/MP3File.h +++ b/shared-module/audiomp3/MP3Decoder.h @@ -67,4 +67,6 @@ void audiomp3_mp3file_get_buffer_structure(audiomp3_mp3file_obj_t* self, bool si bool* single_buffer, bool* samples_signed, uint32_t* max_buffer_length, uint8_t* spacing); +float audiomp3_mp3file_get_rms_level(audiomp3_mp3file_obj_t* self); + #endif // MICROPY_INCLUDED_SHARED_MODULE_AUDIOIO_MP3FILE_H diff --git a/tools/build_board_info.py b/tools/build_board_info.py index 7c4484a659..d583fc63f2 100644 --- a/tools/build_board_info.py +++ b/tools/build_board_info.py @@ -12,7 +12,7 @@ from sh.contrib import git sys.path.append("adabot") import adabot.github_requests as github -SUPPORTED_PORTS = ["nrf", "atmel-samd", "stm32f4", "cxd56"] +SUPPORTED_PORTS = ["nrf", "atmel-samd", "stm32f4", "cxd56", "mimxrt10xx"] BIN = ('bin',) UF2 = ('uf2',) @@ -26,6 +26,7 @@ extension_by_port = { "atmel-samd": UF2, "stm32f4": BIN, "cxd56": SPK, + "mimxrt10xx": UF2, } # Per board overrides diff --git a/tools/uf2 b/tools/uf2 index 968716efd3..84da66ce62 160000 --- a/tools/uf2 +++ b/tools/uf2 @@ -1 +1 @@ -Subproject commit 968716efd30600984139d706bcbd8ec1a1b2336d +Subproject commit 84da66ce62215c1daa62204f2c3fa83c05143a42