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stm32/powerctrlboot: Fix config of systick IRQ priority on F0/L0/WB MCU.

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Prior to this commit the systick IRQ priority was set at lowest priority on
F0/L0/WB MCUs, because it was left at the default and never configured.
This commit ensures the priority is configured and sets it to the highest
priority.
This commit is contained in:
Damien George 2019-10-21 12:23:41 +11:00
parent 8f9e2e325a
commit 12413e92a3
2 changed files with 12 additions and 11 deletions
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4
ports/stm32/irq.h
View File

@ -120,7 +120,7 @@ MP_DECLARE_CONST_FUN_OBJ_0(pyb_irq_stats_obj);
#if __CORTEX_M == 0 #if __CORTEX_M == 0
//#def IRQ_PRI_SYSTICK 0 #define IRQ_PRI_SYSTICK 0
#define IRQ_PRI_UART 1 #define IRQ_PRI_UART 1
#define IRQ_PRI_SDIO 1 #define IRQ_PRI_SDIO 1
#define IRQ_PRI_DMA 1 #define IRQ_PRI_DMA 1
@ -136,7 +136,7 @@ MP_DECLARE_CONST_FUN_OBJ_0(pyb_irq_stats_obj);
#else #else
//#def IRQ_PRI_SYSTICK NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 0, 0) #define IRQ_PRI_SYSTICK NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 0, 0)
// The UARTs have no FIFOs, so if they don't get serviced quickly then characters // The UARTs have no FIFOs, so if they don't get serviced quickly then characters
// get dropped. The handling for each character only consumes about 0.5 usec // get dropped. The handling for each character only consumes about 0.5 usec

19
ports/stm32/powerctrlboot.c
View File

@ -27,6 +27,13 @@
#include "py/mphal.h" #include "py/mphal.h"
#include "powerctrl.h" #include "powerctrl.h"
static inline void powerctrl_config_systick(void) {
// Configure SYSTICK to run at 1kHz (1ms interval)
SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
SysTick_Config(HAL_RCC_GetHCLKFreq() / 1000);
NVIC_SetPriority(SysTick_IRQn, IRQ_PRI_SYSTICK);
}
#if defined(STM32F0) #if defined(STM32F0)
void SystemClock_Config(void) { void SystemClock_Config(void) {
@ -88,9 +95,7 @@ void SystemClock_Config(void) {
} }
SystemCoreClockUpdate(); SystemCoreClockUpdate();
powerctrl_config_systick();
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
} }
#elif defined(STM32L0) #elif defined(STM32L0)
@ -122,9 +127,7 @@ void SystemClock_Config(void) {
} }
SystemCoreClockUpdate(); SystemCoreClockUpdate();
powerctrl_config_systick();
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
#if MICROPY_HW_ENABLE_RNG || MICROPY_HW_ENABLE_USB #if MICROPY_HW_ENABLE_RNG || MICROPY_HW_ENABLE_USB
// Enable the 48MHz internal oscillator // Enable the 48MHz internal oscillator
@ -189,9 +192,7 @@ void SystemClock_Config(void) {
RCC->CCIPR = 2 << RCC_CCIPR_CLK48SEL_Pos; RCC->CCIPR = 2 << RCC_CCIPR_CLK48SEL_Pos;
SystemCoreClockUpdate(); SystemCoreClockUpdate();
powerctrl_config_systick();
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
} }
#endif #endif