cc3200: Update HAL to SDK release version 1.1.0.
This commit is contained in:
danicampora
parent
dac79324b5
commit
0d0646d915
@ -19,6 +19,7 @@ BOOT_CPPDEFINES = -Dgcc -DBOOTLOADER -DTARGET_IS_CC3200 -DSL_TINY
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BOOT_HAL_SRC_C = $(addprefix hal/,\
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BOOT_HAL_SRC_C = $(addprefix hal/,\
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cpu.c \
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cpu.c \
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interrupt.c \
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interrupt.c \
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pin.c \
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prcm.c \
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prcm.c \
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shamd5.c \
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shamd5.c \
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spi.c \
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spi.c \
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@ -48,7 +48,7 @@
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//*****************************************************************************
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//*****************************************************************************
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C"
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extern "C"
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//{
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{
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#endif
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#endif
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//*****************************************************************************
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//*****************************************************************************
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2690
cc3200/hal/aes.c
2690
cc3200/hal/aes.c
File diff suppressed because it is too large
Load Diff
435
cc3200/hal/aes.h
435
cc3200/hal/aes.h
@ -1,217 +1,218 @@
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//*****************************************************************************
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//*****************************************************************************
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//
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//
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// aes.h
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// aes.h
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//
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//
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// Defines and Macros for the AES module.
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// Defines and Macros for the AES module.
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//
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//
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// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
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// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
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//
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//
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//
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//
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// Redistribution and use in source and binary forms, with or without
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// modification, are permitted provided that the following conditions
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// are met:
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// are met:
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//
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//
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// Redistributions of source code must retain the above copyright
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// notice, this list of conditions and the following disclaimer.
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//
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//
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// Redistributions in binary form must reproduce the above copyright
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// documentation and/or other materials provided with the
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// distribution.
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// distribution.
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//
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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// from this software without specific prior written permission.
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//
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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//
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//*****************************************************************************
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//*****************************************************************************
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#ifndef __DRIVERLIB_AES_H__
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#ifndef __DRIVERLIB_AES_H__
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#define __DRIVERLIB_AES_H__
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#define __DRIVERLIB_AES_H__
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//*****************************************************************************
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//*****************************************************************************
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//
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//
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// If building with a C++ compiler, make all of the definitions in this header
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// If building with a C++ compiler, make all of the definitions in this header
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// have a C binding.
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// have a C binding.
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//
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//
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//*****************************************************************************
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//*****************************************************************************
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C"
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extern "C"
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{
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{
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#endif
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#endif
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//*****************************************************************************
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//*****************************************************************************
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//
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//
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// The following defines are used to specify the operation direction in the
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// The following defines are used to specify the operation direction in the
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// ui32Config argument in the AESConfig function. Only one is permitted.
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// ui32Config argument in the AESConfig function. Only one is permitted.
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//
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//
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//*****************************************************************************
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//*****************************************************************************
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#define AES_CFG_DIR_ENCRYPT 0x00000004
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#define AES_CFG_DIR_ENCRYPT 0x00000004
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#define AES_CFG_DIR_DECRYPT 0x00000000
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#define AES_CFG_DIR_DECRYPT 0x00000000
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//*****************************************************************************
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//*****************************************************************************
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//
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//
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// The following defines are used to specify the key size in the ui32Config
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// The following defines are used to specify the key size in the ui32Config
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// argument in the AESConfig function. Only one is permitted.
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// argument in the AESConfig function. Only one is permitted.
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//
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//
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//*****************************************************************************
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//*****************************************************************************
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#define AES_CFG_KEY_SIZE_128BIT 0x00000008
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#define AES_CFG_KEY_SIZE_128BIT 0x00000008
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#define AES_CFG_KEY_SIZE_192BIT 0x00000010
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#define AES_CFG_KEY_SIZE_192BIT 0x00000010
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#define AES_CFG_KEY_SIZE_256BIT 0x00000018
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#define AES_CFG_KEY_SIZE_256BIT 0x00000018
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//*****************************************************************************
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//*****************************************************************************
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//
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//
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// The following defines are used to specify the mode of operation in the
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// The following defines are used to specify the mode of operation in the
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// ui32Config argument in the AESConfig function. Only one is permitted.
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// ui32Config argument in the AESConfig function. Only one is permitted.
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//
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//
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//*****************************************************************************
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//*****************************************************************************
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#define AES_CFG_MODE_M 0x2007fe60
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#define AES_CFG_MODE_M 0x2007fe60
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#define AES_CFG_MODE_ECB 0x00000000
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#define AES_CFG_MODE_ECB 0x00000000
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#define AES_CFG_MODE_CBC 0x00000020
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#define AES_CFG_MODE_CBC 0x00000020
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#define AES_CFG_MODE_CTR 0x00000040
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#define AES_CFG_MODE_CTR 0x00000040
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#define AES_CFG_MODE_ICM 0x00000200
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#define AES_CFG_MODE_ICM 0x00000200
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#define AES_CFG_MODE_CFB 0x00000400
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#define AES_CFG_MODE_CFB 0x00000400
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#define AES_CFG_MODE_XTS_TWEAKJL \
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#define AES_CFG_MODE_XTS_TWEAKJL \
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0x00000800
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0x00000800
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#define AES_CFG_MODE_XTS_K2IJL \
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#define AES_CFG_MODE_XTS_K2IJL \
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0x00001000
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0x00001000
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#define AES_CFG_MODE_XTS_K2ILJ0 \
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#define AES_CFG_MODE_XTS_K2ILJ0 \
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0x00001800
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0x00001800
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#define AES_CFG_MODE_F8 0x00002000
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#define AES_CFG_MODE_F8 0x00002000
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#define AES_CFG_MODE_F9 0x20004000
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#define AES_CFG_MODE_F9 0x20004000
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#define AES_CFG_MODE_CBCMAC 0x20008000
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#define AES_CFG_MODE_CBCMAC 0x20008000
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#define AES_CFG_MODE_GCM_HLY0ZERO \
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#define AES_CFG_MODE_GCM_HLY0ZERO \
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0x20010040
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0x20010040
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#define AES_CFG_MODE_GCM_HLY0CALC \
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#define AES_CFG_MODE_GCM_HLY0CALC \
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0x20020040
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0x20020040
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#define AES_CFG_MODE_GCM_HY0CALC \
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#define AES_CFG_MODE_GCM_HY0CALC \
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0x20030040
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0x20030040
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#define AES_CFG_MODE_CCM 0x20040040
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#define AES_CFG_MODE_CCM 0x20040040
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//*****************************************************************************
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//*****************************************************************************
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//
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//
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// The following defines are used to specify the counter width in the
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// The following defines are used to specify the counter width in the
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// ui32Config argument in the AESConfig function. It is only required to
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// ui32Config argument in the AESConfig function. It is only required to
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// be defined when using CTR, CCM, or GCM modes. Only one length is permitted.
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// be defined when using CTR, CCM, or GCM modes. Only one length is permitted.
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//
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//
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//*****************************************************************************
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//*****************************************************************************
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#define AES_CFG_CTR_WIDTH_32 0x00000000
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#define AES_CFG_CTR_WIDTH_32 0x00000000
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#define AES_CFG_CTR_WIDTH_64 0x00000080
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#define AES_CFG_CTR_WIDTH_64 0x00000080
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#define AES_CFG_CTR_WIDTH_96 0x00000100
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#define AES_CFG_CTR_WIDTH_96 0x00000100
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#define AES_CFG_CTR_WIDTH_128 0x00000180
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#define AES_CFG_CTR_WIDTH_128 0x00000180
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//*****************************************************************************
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//*****************************************************************************
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//
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//
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// The following defines are used to define the width of the length field for
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// The following defines are used to define the width of the length field for
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// CCM operation through the ui32Config argument in the AESConfig function.
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// CCM operation through the ui32Config argument in the AESConfig function.
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// This value is also known as L. Only one is permitted.
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// This value is also known as L. Only one is permitted.
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//
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//
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//*****************************************************************************
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//*****************************************************************************
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#define AES_CFG_CCM_L_2 0x00080000
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#define AES_CFG_CCM_L_2 0x00080000
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#define AES_CFG_CCM_L_4 0x00180000
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#define AES_CFG_CCM_L_4 0x00180000
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#define AES_CFG_CCM_L_8 0x00380000
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#define AES_CFG_CCM_L_8 0x00380000
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//*****************************************************************************
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//*****************************************************************************
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//
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//
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// The following defines are used to define the length of the authentication
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// The following defines are used to define the length of the authentication
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// field for CCM operations through the ui32Config argument in the AESConfig
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// field for CCM operations through the ui32Config argument in the AESConfig
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// function. This value is also known as M. Only one is permitted.
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// function. This value is also known as M. Only one is permitted.
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//
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//
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//*****************************************************************************
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//*****************************************************************************
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#define AES_CFG_CCM_M_4 0x00400000
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#define AES_CFG_CCM_M_4 0x00400000
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#define AES_CFG_CCM_M_6 0x00800000
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#define AES_CFG_CCM_M_6 0x00800000
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#define AES_CFG_CCM_M_8 0x00c00000
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#define AES_CFG_CCM_M_8 0x00c00000
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#define AES_CFG_CCM_M_10 0x01000000
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#define AES_CFG_CCM_M_10 0x01000000
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#define AES_CFG_CCM_M_12 0x01400000
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#define AES_CFG_CCM_M_12 0x01400000
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#define AES_CFG_CCM_M_14 0x01800000
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#define AES_CFG_CCM_M_14 0x01800000
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#define AES_CFG_CCM_M_16 0x01c00000
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#define AES_CFG_CCM_M_16 0x01c00000
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//*****************************************************************************
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//*****************************************************************************
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//
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//
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// Interrupt flags for use with the AESIntEnable, AESIntDisable, and
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// Interrupt flags for use with the AESIntEnable, AESIntDisable, and
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// AESIntStatus functions.
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// AESIntStatus functions.
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//
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//
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//*****************************************************************************
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//*****************************************************************************
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#define AES_INT_CONTEXT_IN 0x00000001
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#define AES_INT_CONTEXT_IN 0x00000001
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#define AES_INT_CONTEXT_OUT 0x00000008
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#define AES_INT_CONTEXT_OUT 0x00000008
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#define AES_INT_DATA_IN 0x00000002
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#define AES_INT_DATA_IN 0x00000002
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#define AES_INT_DATA_OUT 0x00000004
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#define AES_INT_DATA_OUT 0x00000004
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#define AES_INT_DMA_CONTEXT_IN 0x00010000
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#define AES_INT_DMA_CONTEXT_IN 0x00010000
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#define AES_INT_DMA_CONTEXT_OUT 0x00020000
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#define AES_INT_DMA_CONTEXT_OUT 0x00020000
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#define AES_INT_DMA_DATA_IN 0x00040000
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#define AES_INT_DMA_DATA_IN 0x00040000
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#define AES_INT_DMA_DATA_OUT 0x00080000
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#define AES_INT_DMA_DATA_OUT 0x00080000
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//*****************************************************************************
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//*****************************************************************************
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//
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//
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// Defines used when enabling and disabling DMA requests in the
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// Defines used when enabling and disabling DMA requests in the
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// AESEnableDMA and AESDisableDMA functions.
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// AESEnableDMA and AESDisableDMA functions.
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//
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//
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//*****************************************************************************
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//*****************************************************************************
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#define AES_DMA_DATA_IN 0x00000040
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#define AES_DMA_DATA_IN 0x00000040
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#define AES_DMA_DATA_OUT 0x00000020
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#define AES_DMA_DATA_OUT 0x00000020
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#define AES_DMA_CONTEXT_IN 0x00000080
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#define AES_DMA_CONTEXT_IN 0x00000080
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#define AES_DMA_CONTEXT_OUT 0x00000100
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#define AES_DMA_CONTEXT_OUT 0x00000100
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//*****************************************************************************
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//*****************************************************************************
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//
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//
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// Function prototypes.
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// Function prototypes.
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//
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//
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//*****************************************************************************
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//*****************************************************************************
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extern void AESConfigSet(uint32_t ui32Base, uint32_t ui32Config);
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extern void AESConfigSet(uint32_t ui32Base, uint32_t ui32Config);
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extern void AESKey1Set(uint32_t ui32Base, uint8_t *pui8Key,
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extern void AESKey1Set(uint32_t ui32Base, uint8_t *pui8Key,
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uint32_t ui32Keysize);
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uint32_t ui32Keysize);
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extern void AESKey2Set(uint32_t ui32Base, uint8_t *pui8Key,
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extern void AESKey2Set(uint32_t ui32Base, uint8_t *pui8Key,
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uint32_t ui32Keysize);
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uint32_t ui32Keysize);
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extern void AESKey3Set(uint32_t ui32Base, uint8_t *pui8Key);
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extern void AESKey3Set(uint32_t ui32Base, uint8_t *pui8Key);
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extern void AESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata);
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extern void AESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata);
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extern void AESTagRead(uint32_t ui32Base, uint8_t *pui8TagData);
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extern void AESIVGet(uint32_t ui32Base, uint8_t *pui8IVdata);
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extern void AESDataLengthSet(uint32_t ui32Base, uint64_t ui64Length);
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extern void AESTagRead(uint32_t ui32Base, uint8_t *pui8TagData);
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extern void AESAuthDataLengthSet(uint32_t ui32Base, uint32_t ui32Length);
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extern void AESDataLengthSet(uint32_t ui32Base, uint64_t ui64Length);
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extern bool AESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest,
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extern void AESAuthDataLengthSet(uint32_t ui32Base, uint32_t ui32Length);
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uint8_t ui8Length);
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extern bool AESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest,
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extern void AESDataRead(uint32_t ui32Base, uint8_t *pui8Dest,
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uint8_t ui8Length);
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uint8_t ui8Length);
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extern void AESDataRead(uint32_t ui32Base, uint8_t *pui8Dest,
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extern bool AESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src,
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uint8_t ui8Length);
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uint8_t ui8Length);
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extern bool AESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src,
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extern void AESDataWrite(uint32_t ui32Base, uint8_t *pui8Src,
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uint8_t ui8Length);
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uint8_t ui8Length);
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extern void AESDataWrite(uint32_t ui32Base, uint8_t *pui8Src,
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extern bool AESDataProcess(uint32_t ui32Base, uint8_t *pui8Src,
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uint8_t ui8Length);
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uint8_t *pui8Dest,
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extern bool AESDataProcess(uint32_t ui32Base, uint8_t *pui8Src,
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uint32_t ui32Length);
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uint8_t *pui8Dest,
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extern bool AESDataMAC(uint32_t ui32Base, uint8_t *pui8Src,
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uint32_t ui32Length);
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uint32_t ui32Length,
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extern bool AESDataMAC(uint32_t ui32Base, uint8_t *pui8Src,
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uint8_t *pui8Tag);
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uint32_t ui32Length,
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extern bool AESDataProcessAE(uint32_t ui32Base, uint8_t *pui8Src,
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uint8_t *pui8Tag);
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uint8_t *pui8Dest, uint32_t ui32Length,
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extern bool AESDataProcessAE(uint32_t ui32Base, uint8_t *pui8Src,
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uint8_t *pui8AuthSrc, uint32_t ui32AuthLength,
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uint8_t *pui8Dest, uint32_t ui32Length,
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uint8_t *pui8Tag);
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uint8_t *pui8AuthSrc, uint32_t ui32AuthLength,
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extern uint32_t AESIntStatus(uint32_t ui32Base, bool bMasked);
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uint8_t *pui8Tag);
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extern void AESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
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extern uint32_t AESIntStatus(uint32_t ui32Base, bool bMasked);
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extern void AESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
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extern void AESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
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extern void AESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags);
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extern void AESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
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extern void AESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void));
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extern void AESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags);
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extern void AESIntUnregister(uint32_t ui32Base);
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extern void AESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void));
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extern void AESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags);
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extern void AESIntUnregister(uint32_t ui32Base);
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extern void AESDMADisable(uint32_t ui32Base, uint32_t ui32Flags);
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extern void AESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags);
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extern void AESDMADisable(uint32_t ui32Base, uint32_t ui32Flags);
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//*****************************************************************************
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//
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//*****************************************************************************
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// Mark the end of the C bindings section for C++ compilers.
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//
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//
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// Mark the end of the C bindings section for C++ compilers.
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//*****************************************************************************
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//
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#ifdef __cplusplus
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//*****************************************************************************
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}
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#ifdef __cplusplus
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#endif
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}
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#endif
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||||||
#endif // __DRIVERLIB_AES_H__
|
|
||||||
|
#endif // __DRIVERLIB_AES_H__
|
||||||
|
|||||||
1774
cc3200/hal/des.c
1774
cc3200/hal/des.c
File diff suppressed because it is too large
Load Diff
1934
cc3200/hal/i2s.c
1934
cc3200/hal/i2s.c
File diff suppressed because it is too large
Load Diff
420
cc3200/hal/i2s.h
420
cc3200/hal/i2s.h
@ -1,202 +1,218 @@
|
|||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
//
|
//
|
||||||
// i2s.h
|
// i2s.h
|
||||||
//
|
//
|
||||||
// Defines and Macros for the I2S.
|
// Defines and Macros for the I2S.
|
||||||
//
|
//
|
||||||
// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
|
// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
|
||||||
//
|
//
|
||||||
//
|
//
|
||||||
// Redistribution and use in source and binary forms, with or without
|
// Redistribution and use in source and binary forms, with or without
|
||||||
// modification, are permitted provided that the following conditions
|
// modification, are permitted provided that the following conditions
|
||||||
// are met:
|
// are met:
|
||||||
//
|
//
|
||||||
// Redistributions of source code must retain the above copyright
|
// Redistributions of source code must retain the above copyright
|
||||||
// notice, this list of conditions and the following disclaimer.
|
// notice, this list of conditions and the following disclaimer.
|
||||||
//
|
//
|
||||||
// Redistributions in binary form must reproduce the above copyright
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
// notice, this list of conditions and the following disclaimer in the
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
// documentation and/or other materials provided with the
|
// documentation and/or other materials provided with the
|
||||||
// distribution.
|
// distribution.
|
||||||
//
|
//
|
||||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
// its contributors may be used to endorse or promote products derived
|
// its contributors may be used to endorse or promote products derived
|
||||||
// from this software without specific prior written permission.
|
// from this software without specific prior written permission.
|
||||||
//
|
//
|
||||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
//
|
//
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
|
|
||||||
#ifndef __I2S_H__
|
#ifndef __I2S_H__
|
||||||
#define __I2S_H__
|
#define __I2S_H__
|
||||||
|
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
//
|
//
|
||||||
// If building with a C++ compiler, make all of the definitions in this header
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
// have a C binding.
|
// have a C binding.
|
||||||
//
|
//
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C"
|
extern "C"
|
||||||
{
|
{
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
//
|
//
|
||||||
// I2S DMA ports.
|
// I2S DMA ports.
|
||||||
//
|
//
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
#define I2S_TX_DMA_PORT 0x4401E200
|
#define I2S_TX_DMA_PORT 0x4401E200
|
||||||
#define I2S_RX_DMA_PORT 0x4401E280
|
#define I2S_RX_DMA_PORT 0x4401E280
|
||||||
|
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
//
|
//
|
||||||
// Values that can be passed to I2SConfigSetExpClk() as the ulConfig parameter.
|
// Values that can be passed to I2SConfigSetExpClk() as the ulConfig parameter.
|
||||||
//
|
//
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
#define I2S_SLOT_SIZE_24 0x00B200B4
|
#define I2S_SLOT_SIZE_8 0x00300032
|
||||||
#define I2S_SLOT_SIZE_16 0x00700074
|
#define I2S_SLOT_SIZE_16 0x00700074
|
||||||
|
#define I2S_SLOT_SIZE_24 0x00B000B6
|
||||||
#define I2S_PORT_CPU 0x00000008
|
|
||||||
#define I2S_PORT_DMA 0x00000000
|
|
||||||
|
#define I2S_PORT_CPU 0x00080008
|
||||||
//*****************************************************************************
|
#define I2S_PORT_DMA 0x00000000
|
||||||
//
|
|
||||||
// Values that can be passed as ulDataLine parameter.
|
#define I2S_MODE_MASTER 0x00000000
|
||||||
//
|
#define I2S_MODE_SLAVE 0x00008000
|
||||||
//*****************************************************************************
|
|
||||||
#define I2S_DATA_LINE_0 0x00000001
|
//*****************************************************************************
|
||||||
#define I2S_DATA_LINE_1 0x00000002
|
//
|
||||||
|
// Values that can be passed as ulDataLine parameter.
|
||||||
//*****************************************************************************
|
//
|
||||||
//
|
//*****************************************************************************
|
||||||
// Values that can be passed to I2SSerializerConfig() as the ulSerMode
|
#define I2S_DATA_LINE_0 0x00000001
|
||||||
// parameter.
|
#define I2S_DATA_LINE_1 0x00000002
|
||||||
//
|
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
#define I2S_SER_MODE_TX 0x00000001
|
//
|
||||||
#define I2S_SER_MODE_RX 0x00000002
|
// Values that can be passed to I2SSerializerConfig() as the ulSerMode
|
||||||
#define I2S_SER_MODE_DISABLE 0x00000000
|
// parameter.
|
||||||
|
//
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
//
|
#define I2S_SER_MODE_TX 0x00000001
|
||||||
// Values that can be passed to I2SSerializerConfig() as the ulInActState
|
#define I2S_SER_MODE_RX 0x00000002
|
||||||
// parameter.
|
#define I2S_SER_MODE_DISABLE 0x00000000
|
||||||
//
|
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
#define I2S_INACT_TRI_STATE 0x00000000
|
//
|
||||||
#define I2S_INACT_LOW_LEVEL 0x00000008
|
// Values that can be passed to I2SSerializerConfig() as the ulInActState
|
||||||
#define I2S_INACT_HIGH_LEVEL 0x0000000C
|
// parameter.
|
||||||
|
//
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
//
|
#define I2S_INACT_TRI_STATE 0x00000000
|
||||||
// Values that can be passed to I2SIntEnable() and I2SIntDisable() as the
|
#define I2S_INACT_LOW_LEVEL 0x00000008
|
||||||
// ulIntFlags parameter.
|
#define I2S_INACT_HIGH_LEVEL 0x0000000C
|
||||||
//
|
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
#define I2S_INT_XUNDRN 0x00000001
|
//
|
||||||
#define I2S_INT_XSYNCERR 0x00000002
|
// Values that can be passed to I2SIntEnable() and I2SIntDisable() as the
|
||||||
#define I2S_INT_XLAST 0x00000010
|
// ulIntFlags parameter.
|
||||||
#define I2S_INT_XDATA 0x00000020
|
//
|
||||||
#define I2S_INT_XSTAFRM 0x00000080
|
//*****************************************************************************
|
||||||
#define I2S_INT_XDMA 0x80000000
|
#define I2S_INT_XUNDRN 0x00000001
|
||||||
#define I2S_INT_ROVRN 0x00010000
|
#define I2S_INT_XSYNCERR 0x00000002
|
||||||
#define I2S_INT_RSYNCERR 0x00020000
|
#define I2S_INT_XLAST 0x00000010
|
||||||
#define I2S_INT_RLAST 0x00100000
|
#define I2S_INT_XDATA 0x00000020
|
||||||
#define I2S_INT_RDATA 0x00200000
|
#define I2S_INT_XSTAFRM 0x00000080
|
||||||
#define I2S_INT_RSTAFRM 0x00800000
|
#define I2S_INT_XDMA 0x80000000
|
||||||
#define I2S_INT_RDMA 0x40000000
|
#define I2S_INT_ROVRN 0x00010000
|
||||||
|
#define I2S_INT_RSYNCERR 0x00020000
|
||||||
//*****************************************************************************
|
#define I2S_INT_RLAST 0x00100000
|
||||||
//
|
#define I2S_INT_RDATA 0x00200000
|
||||||
// Values that can be passed to I2SIntClear() as the
|
#define I2S_INT_RSTAFRM 0x00800000
|
||||||
// ulIntFlags parameter and returned from I2SIntStatus().
|
#define I2S_INT_RDMA 0x40000000
|
||||||
//
|
|
||||||
//*****************************************************************************
|
|
||||||
#define I2S_STS_XERR 0x00000100
|
//*****************************************************************************
|
||||||
#define I2S_STS_XDMAERR 0x00000080
|
//
|
||||||
#define I2S_STS_XSTAFRM 0x00000040
|
// Values that can be passed to I2SRxActiveSlotSet() and I2STxActiveSlotSet
|
||||||
#define I2S_STS_XDATA 0x00000020
|
//
|
||||||
#define I2S_STS_XLAST 0x00000010
|
//*****************************************************************************
|
||||||
#define I2S_STS_XSYNCERR 0x00000002
|
#define I2S_ACT_SLOT_EVEN 0x00000001
|
||||||
#define I2S_STS_XUNDRN 0x00000001
|
#define I2S_ACT_SLOT_ODD 0x00000002
|
||||||
#define I2S_STS_XDMA 0x80000000
|
|
||||||
#define I2S_STS_RERR 0x01000000
|
//*****************************************************************************
|
||||||
#define I2S_STS_RDMAERR 0x00800000
|
//
|
||||||
#define I2S_STS_RSTAFRM 0x00400000
|
// Values that can be passed to I2SIntClear() as the
|
||||||
#define I2S_STS_RDATA 0x00200000
|
// ulIntFlags parameter and returned from I2SIntStatus().
|
||||||
#define I2S_STS_RLAST 0x00100000
|
//
|
||||||
#define I2S_STS_RSYNCERR 0x00020000
|
//*****************************************************************************
|
||||||
#define I2S_STS_ROVERN 0x00010000
|
#define I2S_STS_XERR 0x00000100
|
||||||
#define I2S_STS_RDMA 0x40000000
|
#define I2S_STS_XDMAERR 0x00000080
|
||||||
|
#define I2S_STS_XSTAFRM 0x00000040
|
||||||
//*****************************************************************************
|
#define I2S_STS_XDATA 0x00000020
|
||||||
//
|
#define I2S_STS_XLAST 0x00000010
|
||||||
// Values that can be passed to I2SEnable() as the ulMode parameter.
|
#define I2S_STS_XSYNCERR 0x00000002
|
||||||
//
|
#define I2S_STS_XUNDRN 0x00000001
|
||||||
//*****************************************************************************
|
#define I2S_STS_XDMA 0x80000000
|
||||||
#define I2S_MODE_TX_ONLY 0x00000001
|
#define I2S_STS_RERR 0x01000000
|
||||||
#define I2S_MODE_TX_RX_SYNC 0x00000003
|
#define I2S_STS_RDMAERR 0x00800000
|
||||||
|
#define I2S_STS_RSTAFRM 0x00400000
|
||||||
|
#define I2S_STS_RDATA 0x00200000
|
||||||
//*****************************************************************************
|
#define I2S_STS_RLAST 0x00100000
|
||||||
//
|
#define I2S_STS_RSYNCERR 0x00020000
|
||||||
// API Function prototypes
|
#define I2S_STS_ROVERN 0x00010000
|
||||||
//
|
#define I2S_STS_RDMA 0x40000000
|
||||||
//*****************************************************************************
|
|
||||||
extern void I2SEnable(unsigned long ulBase, unsigned long ulMode);
|
//*****************************************************************************
|
||||||
extern void I2SDisable(unsigned long ulBase);
|
//
|
||||||
|
// Values that can be passed to I2SEnable() as the ulMode parameter.
|
||||||
extern void I2SDataPut(unsigned long ulBase, unsigned long ulDataLine,
|
//
|
||||||
unsigned long ulData);
|
//*****************************************************************************
|
||||||
extern long I2SDataPutNonBlocking(unsigned long ulBase,
|
#define I2S_MODE_TX_ONLY 0x00000001
|
||||||
unsigned long ulDataLine, unsigned long ulData);
|
#define I2S_MODE_TX_RX_SYNC 0x00000003
|
||||||
|
|
||||||
extern void I2SDataGet(unsigned long ulBase, unsigned long ulDataLine,
|
|
||||||
unsigned long *pulData);
|
//*****************************************************************************
|
||||||
extern long I2SDataGetNonBlocking(unsigned long ulBase,
|
//
|
||||||
unsigned long ulDataLine, unsigned long *pulData);
|
// API Function prototypes
|
||||||
|
//
|
||||||
extern void I2SConfigSetExpClk(unsigned long ulBase, unsigned long ulI2SClk,
|
//*****************************************************************************
|
||||||
unsigned long ulBitClk, unsigned long ulConfig);
|
extern void I2SEnable(unsigned long ulBase, unsigned long ulMode);
|
||||||
|
extern void I2SDisable(unsigned long ulBase);
|
||||||
extern void I2STxFIFOEnable(unsigned long ulBase, unsigned long ulTxLevel,
|
|
||||||
unsigned long ulWordsPerTransfer);
|
extern void I2SDataPut(unsigned long ulBase, unsigned long ulDataLine,
|
||||||
extern void I2STxFIFODisable(unsigned long ulBase);
|
unsigned long ulData);
|
||||||
extern void I2SRxFIFOEnable(unsigned long ulBase, unsigned long ulRxLevel,
|
extern long I2SDataPutNonBlocking(unsigned long ulBase,
|
||||||
unsigned long ulWordsPerTransfer);
|
unsigned long ulDataLine, unsigned long ulData);
|
||||||
extern void I2SRxFIFODisable(unsigned long ulBase);
|
|
||||||
extern unsigned long I2STxFIFOStatusGet(unsigned long ulBase);
|
extern void I2SDataGet(unsigned long ulBase, unsigned long ulDataLine,
|
||||||
extern unsigned long I2SRxFIFOStatusGet(unsigned long ulBase);
|
unsigned long *pulData);
|
||||||
|
extern long I2SDataGetNonBlocking(unsigned long ulBase,
|
||||||
extern void I2SSerializerConfig(unsigned long ulBase, unsigned long ulDataLine,
|
unsigned long ulDataLine, unsigned long *pulData);
|
||||||
unsigned long ulSerMode, unsigned long ulInActState);
|
|
||||||
|
extern void I2SConfigSetExpClk(unsigned long ulBase, unsigned long ulI2SClk,
|
||||||
extern void I2SIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
|
unsigned long ulBitClk, unsigned long ulConfig);
|
||||||
extern void I2SIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
|
|
||||||
extern unsigned long I2SIntStatus(unsigned long ulBase);
|
extern void I2STxFIFOEnable(unsigned long ulBase, unsigned long ulTxLevel,
|
||||||
extern void I2SIntClear(unsigned long ulBase, unsigned long ulIntFlags);
|
unsigned long ulWordsPerTransfer);
|
||||||
extern void I2SIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
|
extern void I2STxFIFODisable(unsigned long ulBase);
|
||||||
extern void I2SIntUnregister(unsigned long ulBase);
|
extern void I2SRxFIFOEnable(unsigned long ulBase, unsigned long ulRxLevel,
|
||||||
|
unsigned long ulWordsPerTransfer);
|
||||||
//*****************************************************************************
|
extern void I2SRxFIFODisable(unsigned long ulBase);
|
||||||
//
|
extern unsigned long I2STxFIFOStatusGet(unsigned long ulBase);
|
||||||
// Mark the end of the C bindings section for C++ compilers.
|
extern unsigned long I2SRxFIFOStatusGet(unsigned long ulBase);
|
||||||
//
|
|
||||||
//*****************************************************************************
|
extern void I2SSerializerConfig(unsigned long ulBase, unsigned long ulDataLine,
|
||||||
#ifdef __cplusplus
|
unsigned long ulSerMode, unsigned long ulInActState);
|
||||||
}
|
|
||||||
#endif
|
extern void I2SIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||||
|
extern void I2SIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||||
#endif //__I2S_H__
|
extern unsigned long I2SIntStatus(unsigned long ulBase);
|
||||||
|
extern void I2SIntClear(unsigned long ulBase, unsigned long ulIntFlags);
|
||||||
|
extern void I2SIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
|
||||||
|
extern void I2SIntUnregister(unsigned long ulBase);
|
||||||
|
extern void I2STxActiveSlotSet(unsigned long ulBase, unsigned long ulActSlot);
|
||||||
|
extern void I2SRxActiveSlotSet(unsigned long ulBase, unsigned long ulActSlot);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif //__I2S_H__
|
||||||
|
|
||||||
|
|||||||
@ -334,7 +334,7 @@ void PinConfigSet(unsigned long ulPin,unsigned long ulPinStrength,
|
|||||||
//
|
//
|
||||||
// Isolate the output
|
// Isolate the output
|
||||||
//
|
//
|
||||||
HWREG(ulPad) |= 0xC00;
|
HWREG(ulPad) = 0xC00;
|
||||||
|
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
|
|||||||
@ -104,9 +104,24 @@
|
|||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
// Register Access and Updates
|
// Register Access and Updates
|
||||||
//
|
//
|
||||||
// Tick of SCC has a resolution of 32768Hz. Therefore, scaling SCC value by 32
|
// Tick of SCC has a resolution of 32768Hz, meaning 1 sec is equal to 32768
|
||||||
// yields ~1 msec resolution. All operations of SCC in RTC context use ms unit.
|
// clock ticks. Ideal way of getting time in millisecond will involve floating
|
||||||
//*****************************************************************************
|
// point arithmetic (division by 32.768). To avoid this, we simply divide it by
|
||||||
|
// 32, which will give a range from 0 -1023(instead of 0-999). To use this
|
||||||
|
// output correctly we have to take care of this inaccuracy externally.
|
||||||
|
// following wrapper can be used to convert the value from cycles to
|
||||||
|
// millisecond:
|
||||||
|
//
|
||||||
|
// CYCLES_U16MS(cycles) ((cycles *1000)/ 1024),
|
||||||
|
//
|
||||||
|
// Similarly, before setting the value, it must be first converted (from ms to
|
||||||
|
// cycles).
|
||||||
|
//
|
||||||
|
// U16MS_CYCLES(msec) ((msec *1024)/1000)
|
||||||
|
//
|
||||||
|
// Note: There is a precision loss of 1 ms with the above scheme.
|
||||||
|
//
|
||||||
|
//
|
||||||
#define SCC_U64MSEC_GET() (MAP_PRCMSlowClkCtrGet() >> 5)
|
#define SCC_U64MSEC_GET() (MAP_PRCMSlowClkCtrGet() >> 5)
|
||||||
#define SCC_U64MSEC_MATCH_SET(u64Msec) (MAP_PRCMSlowClkCtrMatchSet(u64Msec << 5))
|
#define SCC_U64MSEC_MATCH_SET(u64Msec) (MAP_PRCMSlowClkCtrMatchSet(u64Msec << 5))
|
||||||
#define SCC_U64MSEC_MATCH_GET() (MAP_PRCMSlowClkCtrMatchGet() >> 5)
|
#define SCC_U64MSEC_MATCH_GET() (MAP_PRCMSlowClkCtrMatchGet() >> 5)
|
||||||
@ -683,14 +698,24 @@ void PRCMLPDSRestoreInfoSet(unsigned long ulStackPtr, unsigned long ulProgCntr)
|
|||||||
//! \sa PRCMLPDSRestoreInfoSet().
|
//! \sa PRCMLPDSRestoreInfoSet().
|
||||||
//!
|
//!
|
||||||
//! \return None.
|
//! \return None.
|
||||||
|
//!
|
||||||
|
//! \note The Test Power Domain is shutdown whenever the system
|
||||||
|
//! enters LPDS (by default). In order to avoid this and allow for
|
||||||
|
//! connecting back the debugger after waking up from LPDS,
|
||||||
|
//! the macro KEEP_TESTPD_ALIVE has to be defined while building the library.
|
||||||
|
//! This is recommended for development purposes only as it adds to
|
||||||
|
//! the current consumption of the system.
|
||||||
|
//!
|
||||||
//
|
//
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
void PRCMLPDSEnter(void)
|
void PRCMLPDSEnter(void)
|
||||||
{
|
{
|
||||||
|
#ifndef DEBUG
|
||||||
//
|
//
|
||||||
// Disable TestPD
|
// Disable TestPD
|
||||||
//
|
//
|
||||||
HWREG(0x4402E168) |= (1<<9);
|
HWREG(0x4402E168) |= (1<<9);
|
||||||
|
#endif
|
||||||
|
|
||||||
//
|
//
|
||||||
// Set bandgap duty cycle to 1
|
// Set bandgap duty cycle to 1
|
||||||
@ -700,8 +725,7 @@ void PRCMLPDSEnter(void)
|
|||||||
//
|
//
|
||||||
// Request LPDS
|
// Request LPDS
|
||||||
//
|
//
|
||||||
HWREG(ARCM_BASE + APPS_RCM_O_APPS_LPDS_REQ)
|
HWREG(ARCM_BASE + APPS_RCM_O_APPS_LPDS_REQ) = APPS_RCM_APPS_LPDS_REQ_APPS_LPDS_REQ;
|
||||||
= APPS_RCM_APPS_LPDS_REQ_APPS_LPDS_REQ;
|
|
||||||
|
|
||||||
__asm(" nop\n"
|
__asm(" nop\n"
|
||||||
" nop\n"
|
" nop\n"
|
||||||
@ -1846,6 +1870,63 @@ void PRCMHIBRegWrite(unsigned long ulRegAddr, unsigned long ulValue)
|
|||||||
UtilsDelay((80*200)/3);
|
UtilsDelay((80*200)/3);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \param ulDivider is clock frequency divider value
|
||||||
|
//! \param ulWidth is the width of the high pulse
|
||||||
|
//!
|
||||||
|
//! This function sets the input frequency for camera module.
|
||||||
|
//!
|
||||||
|
//! The frequency is calculated as follows:
|
||||||
|
//!
|
||||||
|
//! f_out = 240MHz/ulDivider;
|
||||||
|
//!
|
||||||
|
//! The parameter \e ulWidth sets the width of the high pulse.
|
||||||
|
//!
|
||||||
|
//! For e.g.:
|
||||||
|
//!
|
||||||
|
//! ulDivider = 4;
|
||||||
|
//! ulWidth = 2;
|
||||||
|
//!
|
||||||
|
//! f_out = 30 MHz and 50% duty cycle
|
||||||
|
//!
|
||||||
|
//! And,
|
||||||
|
//!
|
||||||
|
//! ulDivider = 4;
|
||||||
|
//! ulWidth = 1;
|
||||||
|
//!
|
||||||
|
//! f_out = 30 MHz and 25% duty cycle
|
||||||
|
//!
|
||||||
|
//! \return 0 on success, 1 on error
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
unsigned long PRCMCameraFreqSet(unsigned char ulDivider, unsigned char ulWidth)
|
||||||
|
{
|
||||||
|
if(ulDivider > ulWidth && ulWidth != 0 )
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Set the hifh pulse width
|
||||||
|
//
|
||||||
|
HWREG(ARCM_BASE +
|
||||||
|
APPS_RCM_O_CAMERA_CLK_GEN) = (((ulWidth & 0x07) -1) << 8);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the low pulse width
|
||||||
|
//
|
||||||
|
HWREG(ARCM_BASE +
|
||||||
|
APPS_RCM_O_CAMERA_CLK_GEN) = ((ulDivider - ulWidth - 1) & 0x07);
|
||||||
|
//
|
||||||
|
// Return success
|
||||||
|
//
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Success;
|
||||||
|
//
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
//
|
//
|
||||||
// Close the Doxygen group.
|
// Close the Doxygen group.
|
||||||
|
|||||||
@ -265,6 +265,7 @@ extern void PRCMRTCMatchGet(unsigned long *ulSecs, unsigned short *usMsec);
|
|||||||
extern void PRCMCC3200MCUInit(void);
|
extern void PRCMCC3200MCUInit(void);
|
||||||
extern unsigned long PRCMHIBRegRead(unsigned long ulRegAddr);
|
extern unsigned long PRCMHIBRegRead(unsigned long ulRegAddr);
|
||||||
extern void PRCMHIBRegWrite(unsigned long ulRegAddr, unsigned long ulValue);
|
extern void PRCMHIBRegWrite(unsigned long ulRegAddr, unsigned long ulValue);
|
||||||
|
extern unsigned long PRCMCameraFreqSet(unsigned char ulDivider, unsigned char ulWidth);
|
||||||
|
|
||||||
|
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
|
|||||||
@ -84,4 +84,15 @@
|
|||||||
#undef ROM_GPIODirModeGet
|
#undef ROM_GPIODirModeGet
|
||||||
#undef ROM_GPIOIntTypeGet
|
#undef ROM_GPIOIntTypeGet
|
||||||
#undef ROM_I2CMasterInitExpClk
|
#undef ROM_I2CMasterInitExpClk
|
||||||
|
#undef ROM_AESDataProcess
|
||||||
|
#undef ROM_DESDataProcess
|
||||||
|
#undef ROM_I2SEnable
|
||||||
|
#undef ROM_I2SConfigSetExpClk
|
||||||
|
#undef ROM_PinConfigSet
|
||||||
|
#undef ROM_PRCMLPDSEnter
|
||||||
|
#undef ROM_PRCMCC3200MCUInit
|
||||||
|
#undef ROM_SDHostIntStatus
|
||||||
|
#undef ROM_SDHostBlockCountSet
|
||||||
|
#undef ROM_UARTModemControlSet
|
||||||
|
#undef ROM_UARTModemControlClear
|
||||||
|
|
||||||
|
|||||||
@ -512,7 +512,7 @@ SDHostIntStatus(unsigned long ulBase)
|
|||||||
//
|
//
|
||||||
// Get DMA done interrupt status
|
// Get DMA done interrupt status
|
||||||
//
|
//
|
||||||
ulIntStatus = HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_MASK_SET);
|
ulIntStatus = HWREG(APPS_CONFIG_BASE + APPS_CONFIG_O_DMA_DONE_INT_STS_RAW);
|
||||||
ulIntStatus = (ulIntStatus << 30);
|
ulIntStatus = (ulIntStatus << 30);
|
||||||
|
|
||||||
//
|
//
|
||||||
@ -562,7 +562,7 @@ SDHostIntClear(unsigned long ulBase,unsigned long ulIntFlags)
|
|||||||
//! \param ulErrMask is the bit mask of card status errors to be enabled
|
//! \param ulErrMask is the bit mask of card status errors to be enabled
|
||||||
//!
|
//!
|
||||||
//! This function sets the card status error mask for response type R1, R1b,
|
//! This function sets the card status error mask for response type R1, R1b,
|
||||||
//! R5, R5b and R6 response. The parameter \ulErrMask is the bit mask of card
|
//! R5, R5b and R6 response. The parameter \e ulErrMask is the bit mask of card
|
||||||
//! status errors to be enabled, if the corresponding bits in the 'card status'
|
//! status errors to be enabled, if the corresponding bits in the 'card status'
|
||||||
//! field of a respose are set then the host controller indicates a card error
|
//! field of a respose are set then the host controller indicates a card error
|
||||||
//! interrupt status. Only bits referenced as type E (error) in status field in
|
//! interrupt status. Only bits referenced as type E (error) in status field in
|
||||||
@ -732,7 +732,7 @@ SDHostBlockCountSet(unsigned long ulBase, unsigned short ulBlkCount)
|
|||||||
//
|
//
|
||||||
// Set the number of blocks
|
// Set the number of blocks
|
||||||
//
|
//
|
||||||
HWREG(ulBase + MMCHS_O_BLK) |= ((ulRegVal & 0x0000FFFF)|
|
HWREG(ulBase + MMCHS_O_BLK) = ((ulRegVal & 0x0000FFFF)|
|
||||||
(ulBlkCount << 16));
|
(ulBlkCount << 16));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -75,7 +75,7 @@ extern "C"
|
|||||||
#define SDHOST_INT_CEB 0x00040000
|
#define SDHOST_INT_CEB 0x00040000
|
||||||
#define SDHOST_INT_DTO 0x00100000
|
#define SDHOST_INT_DTO 0x00100000
|
||||||
#define SDHOST_INT_DCRC 0x00200000
|
#define SDHOST_INT_DCRC 0x00200000
|
||||||
#define SDHOST_INT_DEB 0x00300000
|
#define SDHOST_INT_DEB 0x00400000
|
||||||
#define SDHOST_INT_CERR 0x10000000
|
#define SDHOST_INT_CERR 0x10000000
|
||||||
#define SDHOST_INT_BADA 0x20000000
|
#define SDHOST_INT_BADA 0x20000000
|
||||||
#define SDHOST_INT_DMARD 0x40000000
|
#define SDHOST_INT_DMARD 0x40000000
|
||||||
|
|||||||
@ -617,6 +617,45 @@ TimerValueGet(unsigned long ulBase, unsigned long ulTimer)
|
|||||||
HWREG(ulBase + TIMER_O_TBR));
|
HWREG(ulBase + TIMER_O_TBR));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Sets the current timer value.
|
||||||
|
//!
|
||||||
|
//! \param ulBase is the base address of the timer module.
|
||||||
|
//! \param ulTimer specifies the timer; must be one of \b TIMER_A or
|
||||||
|
//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured
|
||||||
|
//! for 32-bit operation.
|
||||||
|
//! \param ulValue is the new value of the timer to be set.
|
||||||
|
//!
|
||||||
|
//! This function sets the current value of the specified timer.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
TimerValueSet(unsigned long ulBase, unsigned long ulTimer,
|
||||||
|
unsigned long ulValue)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(TimerBaseValid(ulBase));
|
||||||
|
ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the appropriate timer value.
|
||||||
|
//
|
||||||
|
if( (ulTimer == TIMER_A) )
|
||||||
|
{
|
||||||
|
HWREG(ulBase + TIMER_O_TAV) = ulValue;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
HWREG(ulBase + TIMER_O_TBV) = ulValue;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
//*****************************************************************************
|
//*****************************************************************************
|
||||||
//
|
//
|
||||||
//! Sets the timer match value.
|
//! Sets the timer match value.
|
||||||
@ -979,8 +1018,8 @@ TimerIntClear(unsigned long ulBase, unsigned long ulIntFlags)
|
|||||||
//
|
//
|
||||||
//! Enables the events that can trigger a DMA request.
|
//! Enables the events that can trigger a DMA request.
|
||||||
//!
|
//!
|
||||||
//! \param ui32Base is the base address of the timer module.
|
//! \param ulBase is the base address of the timer module.
|
||||||
//! \param ui32DMAEvent is a bit mask of the events that can trigger DMA.
|
//! \param ulDMAEvent is a bit mask of the events that can trigger DMA.
|
||||||
//!
|
//!
|
||||||
//! This function enables the timer events that can trigger the start of a DMA
|
//! This function enables the timer events that can trigger the start of a DMA
|
||||||
//! sequence. The DMA trigger events are specified in the \e ui32DMAEvent
|
//! sequence. The DMA trigger events are specified in the \e ui32DMAEvent
|
||||||
@ -1022,7 +1061,7 @@ TimerDMAEventSet(unsigned long ulBase, unsigned long ulDMAEvent)
|
|||||||
//
|
//
|
||||||
//! Returns the events that can trigger a DMA request.
|
//! Returns the events that can trigger a DMA request.
|
||||||
//!
|
//!
|
||||||
//! \param ui32Base is the base address of the timer module.
|
//! \param ulBase is the base address of the timer module.
|
||||||
//!
|
//!
|
||||||
//! This function returns the timer events that can trigger the start of a DMA
|
//! This function returns the timer events that can trigger the start of a DMA
|
||||||
//! sequence. The DMA trigger events are the logical OR of the following
|
//! sequence. The DMA trigger events are the logical OR of the following
|
||||||
|
|||||||
@ -180,6 +180,8 @@ extern unsigned long TimerLoadGet(unsigned long ulBase, unsigned long ulTimer);
|
|||||||
|
|
||||||
extern unsigned long TimerValueGet(unsigned long ulBase,
|
extern unsigned long TimerValueGet(unsigned long ulBase,
|
||||||
unsigned long ulTimer);
|
unsigned long ulTimer);
|
||||||
|
extern void TimerValueSet(unsigned long ulBase, unsigned long ulTimer,
|
||||||
|
unsigned long ulValue);
|
||||||
|
|
||||||
extern void TimerMatchSet(unsigned long ulBase, unsigned long ulTimer,
|
extern void TimerMatchSet(unsigned long ulBase, unsigned long ulTimer,
|
||||||
unsigned long ulValue);
|
unsigned long ulValue);
|
||||||
|
|||||||
@ -1167,13 +1167,8 @@ UARTIntRegister(unsigned long ulBase, void (*pfnHandler)(void))
|
|||||||
//
|
//
|
||||||
// Determine the interrupt number based on the UART port.
|
// Determine the interrupt number based on the UART port.
|
||||||
//
|
//
|
||||||
#if 1
|
|
||||||
ulInt = UARTIntNumberGet(ulBase);
|
|
||||||
#else
|
|
||||||
|
|
||||||
ulInt = ((ulBase == UART0_BASE) ? INT_UART0 :
|
ulInt = UARTIntNumberGet(ulBase);
|
||||||
((ulBase == UART1_BASE) ? INT_UART1 : INT_UART2));
|
|
||||||
#endif
|
|
||||||
|
|
||||||
//
|
//
|
||||||
// Register the interrupt handler.
|
// Register the interrupt handler.
|
||||||
@ -1216,12 +1211,7 @@ UARTIntUnregister(unsigned long ulBase)
|
|||||||
//
|
//
|
||||||
// Determine the interrupt number based on the UART port.
|
// Determine the interrupt number based on the UART port.
|
||||||
//
|
//
|
||||||
#if 1
|
|
||||||
ulInt = UARTIntNumberGet(ulBase);
|
ulInt = UARTIntNumberGet(ulBase);
|
||||||
#else
|
|
||||||
ulInt = ((ulBase == UART0_BASE) ? INT_UART0 :
|
|
||||||
((ulBase == UART1_BASE) ? INT_UART1 : INT_UART2));
|
|
||||||
#endif
|
|
||||||
|
|
||||||
//
|
//
|
||||||
// Disable the interrupt.
|
// Disable the interrupt.
|
||||||
|
|||||||
@ -428,6 +428,9 @@ modwlan_Status_t wlan_sl_enable (SlWlanMode_t mode, const char *ssid, uint8_t ss
|
|||||||
// Unregister mDNS services
|
// Unregister mDNS services
|
||||||
ASSERT_ON_ERROR(sl_NetAppMDNSUnRegisterService(0, 0));
|
ASSERT_ON_ERROR(sl_NetAppMDNSUnRegisterService(0, 0));
|
||||||
|
|
||||||
|
// Stop the internal HTTP server
|
||||||
|
sl_NetAppStop(SL_NET_APP_HTTP_SERVER_ID);
|
||||||
|
|
||||||
// Remove all 64 filters (8 * 8)
|
// Remove all 64 filters (8 * 8)
|
||||||
_WlanRxFilterOperationCommandBuff_t RxFilterIdMask;
|
_WlanRxFilterOperationCommandBuff_t RxFilterIdMask;
|
||||||
memset ((void *)&RxFilterIdMask, 0 ,sizeof(RxFilterIdMask));
|
memset ((void *)&RxFilterIdMask, 0 ,sizeof(RxFilterIdMask));
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user