Merge remote-tracking branch 'adafruit/main' into fix_cp_irremote

This commit is contained in:
Scott Shawcroft 2021-08-11 13:43:59 -07:00
commit 0c1d6cef75
No known key found for this signature in database
GPG Key ID: 0DFD512649C052DA
57 changed files with 1628 additions and 452 deletions

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@ -232,6 +232,7 @@ jobs:
- "bdmicro_vina_d51_pcb7"
- "bless_dev_board_multi_sensor"
- "blm_badge"
- "bluemicro840"
- "capablerobot_usbhub"
- "catwan_usbstick"
- "circuitbrains_basic_m0"
@ -369,6 +370,7 @@ jobs:
- "sparkfun_samd21_mini"
- "sparkfun_samd51_micromod"
- "sparkfun_samd51_thing_plus"
- "sparkfun_stm32f405_micromod"
- "sparkfun_thing_plus_rp2040"
- "spresense"
- "stackrduino_m0_pro"

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@ -4148,7 +4148,7 @@ msgstr ""
msgid "stop not reachable from start"
msgstr ""
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr ""

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@ -493,6 +493,10 @@ msgstr ""
msgid "Attempted heap allocation when VM not running."
msgstr ""
#: ports/raspberrypi/audio_dma.c
msgid "Audio conversion not implemented"
msgstr ""
#: shared-bindings/wifi/Radio.c
msgid "AuthMode.OPEN is not used with password"
msgstr ""
@ -1217,6 +1221,10 @@ msgstr ""
msgid "Insufficient encryption"
msgstr ""
#: ports/raspberrypi/audio_dma.c
msgid "Internal audio buffer too small"
msgstr ""
#: ports/stm/common-hal/busio/UART.c
msgid "Internal define error"
msgstr ""
@ -4105,7 +4113,7 @@ msgstr ""
msgid "stop not reachable from start"
msgstr ""
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr ""

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@ -4108,7 +4108,7 @@ msgstr ""
msgid "stop not reachable from start"
msgstr ""
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr ""

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@ -4179,7 +4179,7 @@ msgstr "stop muss 1 oder 2 sein"
msgid "stop not reachable from start"
msgstr "stop ist von start aus nicht erreichbar"
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr "stream operation ist nicht unterstützt"

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@ -4105,7 +4105,7 @@ msgstr ""
msgid "stop not reachable from start"
msgstr ""
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr ""

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@ -4142,7 +4142,7 @@ msgstr "stop must be 1 or 2"
msgid "stop not reachable from start"
msgstr "stop not reachable from start"
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr "stream operation not supported"

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@ -4196,7 +4196,7 @@ msgstr "stop debe ser 1 ó 2"
msgid "stop not reachable from start"
msgstr "stop no se puede alcanzar del principio"
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr "operación stream no soportada"

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@ -4155,7 +4155,7 @@ msgstr "stop dapat 1 o 2"
msgid "stop not reachable from start"
msgstr "stop hindi maabot sa simula"
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr "stream operation hindi sinusuportahan"

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@ -4207,7 +4207,7 @@ msgstr "stop doit être 1 ou 2"
msgid "stop not reachable from start"
msgstr "stop n'est pas accessible au démarrage"
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr "opération de flux non supportée"

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@ -4105,7 +4105,7 @@ msgstr ""
msgid "stop not reachable from start"
msgstr ""
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr ""

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@ -4173,7 +4173,7 @@ msgstr ""
msgid "stop not reachable from start"
msgstr "stop non raggiungibile dall'inizio"
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr "operazione di stream non supportata"

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@ -4128,7 +4128,7 @@ msgstr "stopは1または2のいずれか"
msgid "stop not reachable from start"
msgstr ""
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr "ストリーム操作は非対応"

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@ -4109,7 +4109,7 @@ msgstr ""
msgid "stop not reachable from start"
msgstr ""
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr ""

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@ -4153,7 +4153,7 @@ msgstr "stop moet 1 of 2 zijn"
msgid "stop not reachable from start"
msgstr "stop is niet bereikbaar vanaf start"
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr "stream operatie niet ondersteund"

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@ -4125,7 +4125,7 @@ msgstr "stop musi być 1 lub 2"
msgid "stop not reachable from start"
msgstr "stop nie jest osiągalne ze start"
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr "operacja na strumieniu nieobsługiwana"

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@ -6,7 +6,7 @@ msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2021-01-04 12:55-0600\n"
"PO-Revision-Date: 2021-08-08 05:33+0000\n"
"PO-Revision-Date: 2021-08-10 02:41+0000\n"
"Last-Translator: Wellington Terumi Uemura <wellingtonuemura@gmail.com>\n"
"Language-Team: \n"
"Language: pt_BR\n"
@ -333,7 +333,7 @@ msgstr "função externa 'yield'"
#: shared-module/vectorio/VectorShape.c
msgid "(x,y) integers required"
msgstr ""
msgstr "(x,y) é obrigatório o uso de números inteiros"
#: py/compile.c
msgid "*x must be assignment target"
@ -4207,7 +4207,7 @@ msgstr "o stop deve ser 1 ou 2"
msgid "stop not reachable from start"
msgstr "stop não está acessível a partir do início"
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr "a operação do fluxo não é compatível"

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@ -6,7 +6,7 @@ msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2021-01-04 12:55-0600\n"
"PO-Revision-Date: 2021-08-07 04:00+0000\n"
"PO-Revision-Date: 2021-08-10 02:41+0000\n"
"Last-Translator: Jonny Bergdahl <jonny@bergdahl.it>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"
"Language: sv\n"
@ -328,7 +328,7 @@ msgstr "'yield' utanför funktion"
#: shared-module/vectorio/VectorShape.c
msgid "(x,y) integers required"
msgstr ""
msgstr "(x,y) heltal krävs"
#: py/compile.c
msgid "*x must be assignment target"
@ -4166,7 +4166,7 @@ msgstr "stop måste vara 1 eller 2"
msgid "stop not reachable from start"
msgstr "stop kan inte nås från start"
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr "stream-åtgärd stöds inte"

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@ -4166,7 +4166,7 @@ msgstr "tíngzhǐ bìxū wèi 1 huò 2"
msgid "stop not reachable from start"
msgstr "tíngzhǐ wúfǎ cóng kāishǐ zhōng zhǎodào"
#: py/stream.c
#: py/stream.c shared-bindings/getpass/__init__.c
msgid "stream operation not supported"
msgstr "bù zhīchí liú cāozuò"

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@ -157,7 +157,13 @@ void audio_dma_load_next_block(audio_dma_t *dma) {
if (dma->loop) {
audiosample_reset_buffer(dma->sample, dma->single_channel_output, dma->audio_channel);
} else {
descriptor->DESCADDR.reg = 0;
if ((output_buffer_length == 0) && dma_transfer_status(SHARED_RX_CHANNEL) & 0x3) {
// Nothing further to read and previous buffer is finished.
audio_dma_stop(dma);
} else {
// Break descriptor chain.
descriptor->DESCADDR.reg = 0;
}
}
}
descriptor->BTCTRL.bit.VALID = true;
@ -214,21 +220,23 @@ audio_dma_result audio_dma_setup_playback(audio_dma_t *dma,
if (output_signed != samples_signed) {
output_spacing = 1;
max_buffer_length /= dma->spacing;
dma->first_buffer = (uint8_t *)m_realloc(dma->first_buffer, max_buffer_length);
if (dma->first_buffer == NULL) {
}
dma->first_buffer = (uint8_t *)m_realloc(dma->first_buffer, max_buffer_length);
if (dma->first_buffer == NULL) {
return AUDIO_DMA_MEMORY_ERROR;
}
dma->first_buffer_free = true;
if (!single_buffer) {
dma->second_buffer = (uint8_t *)m_realloc(dma->second_buffer, max_buffer_length);
if (dma->second_buffer == NULL) {
return AUDIO_DMA_MEMORY_ERROR;
}
dma->first_buffer_free = true;
if (!single_buffer) {
dma->second_buffer = (uint8_t *)m_realloc(dma->second_buffer, max_buffer_length);
if (dma->second_buffer == NULL) {
return AUDIO_DMA_MEMORY_ERROR;
}
}
dma->signed_to_unsigned = !output_signed && samples_signed;
dma->unsigned_to_signed = output_signed && !samples_signed;
}
dma->signed_to_unsigned = !output_signed && samples_signed;
dma->unsigned_to_signed = output_signed && !samples_signed;
dma->event_channel = 0xff;
if (!single_buffer) {
dma->second_descriptor = (DmacDescriptor *)m_malloc(sizeof(DmacDescriptor), false);

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@ -20,6 +20,8 @@ CIRCUITPY_PWMIO = 0
CIRCUITPY_ROTARYIO = 0
CIRCUITPY_RTC = 0
CIRCUITPY_USB_MIDI = 0
CIRCUITPY_GETPASS = 0
CIRCUITPY_TRACEBACK = 0
CIRCUITPY_PIXELBUF = 1

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@ -9,3 +9,5 @@ CHIP_FAMILY = samd21
INTERNAL_FLASH_FILESYSTEM = 1
LONGINT_IMPL = NONE
CIRCUITPY_FULL_BUILD = 0
CIRCUITPY_GETPASS = 0

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@ -1,8 +1,11 @@
#define MICROPY_HW_BOARD_NAME "SparkFun MicroMod SAMD51"
#define MICROPY_HW_BOARD_NAME "SparkFun MicroMod SAMD51 Processor"
#define MICROPY_HW_MCU_NAME "samd51j20"
#define CIRCUITPY_MCU_FAMILY samd51
// Status LED
#define MICROPY_HW_LED_STATUS (&pin_PA23)
// On-board flash
#define SPI_FLASH_MOSI_PIN &pin_PA09
#define SPI_FLASH_MISO_PIN &pin_PA10

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@ -1,7 +1,7 @@
LD_FILE = boards/samd51x20-bootloader-external-flash.ld
USB_VID = 0x1b4f
USB_PID = 0x0020 # Used by uf2 bootloader
USB_PRODUCT = "SparkFun MicroMod SAMD51"
USB_PRODUCT = "SparkFun MicroMod SAMD51 Processor"
USB_MANUFACTURER = "SparkFun Electronics"
CHIP_VARIANT = SAMD51J20A

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@ -1,97 +1,224 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
* Copyright (c) 2021 Chris Wilson
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "shared-bindings/board/__init__.h"
STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
// D (digital only) pins (D0,D1)
{ MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB04) },
{ MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB05) },
// The SparkFun MicroMod spec uses a zero-based peripheral numbering scheme.
// The 0th peripheral is the default and the "0" is omitted from the
// peripheral name (e.g. "I2C" instead of "I2C0").
//
// For more details, see https://www.sparkfun.com/micromod#tech-specs
// A (ADC) pins (A0-A4)
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) },
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB00) },
{ MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB01) },
{ MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB02) },
{ MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB03) },
// MicroMod built-in status LED pin
// Requirement from the "Designing with MicroMod" SparkFun article:
// "... every Processor Board shall include one status LED connected to a
// pin that is not connected to the board edge."
{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA23) }, // MicroMod LED (PA23)
// DAC
{ MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&pin_PA02) },
// MicroMod USB bus input voltage (+5V) pin
// { MP_ROM_QSTR(MP_QSTR_USB_VIN), MP_ROM_PTR() }, // MicroMod USB_VIN (not connected)
// G (General/BUS) pins (G0-G9)
{ MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA06) },
{ MP_ROM_QSTR(MP_QSTR_G0), MP_ROM_PTR(&pin_PA06) },
{ MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA15) },
{ MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_PA06) },
{ MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB08) },
{ MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_PB08) },
{ MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB09) },
{ MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_PB09) },
{ MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PB10) },
{ MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_PB10) },
{ MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB11) },
{ MP_ROM_QSTR(MP_QSTR_G5), MP_ROM_PTR(&pin_PB11) },
{ MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PB12) },
{ MP_ROM_QSTR(MP_QSTR_G6), MP_ROM_PTR(&pin_PB12) },
{ MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB13) },
{ MP_ROM_QSTR(MP_QSTR_G7), MP_ROM_PTR(&pin_PB13) },
{ MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA14) },
{ MP_ROM_QSTR(MP_QSTR_G8), MP_ROM_PTR(&pin_PA14) },
{ MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA15) },
{ MP_ROM_QSTR(MP_QSTR_G9), MP_ROM_PTR(&pin_PA15) },
{ MP_ROM_QSTR(MP_QSTR_D32), MP_ROM_PTR(&pin_PB31) },
{ MP_ROM_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_PB30) },
{ MP_ROM_QSTR(MP_QSTR_D38), MP_ROM_PTR(&pin_PB14) },
{ MP_ROM_QSTR(MP_QSTR_G10), MP_ROM_PTR(&pin_PB14) },
{ MP_ROM_QSTR(MP_QSTR_D39), MP_ROM_PTR(&pin_PB15) },
{ MP_ROM_QSTR(MP_QSTR_G11), MP_ROM_PTR(&pin_PB15) },
// MicroMod +3.3V enable pin
{ MP_ROM_QSTR(MP_QSTR_P3V3_EN), MP_ROM_PTR(&pin_PA19) }, // MicroMod 3.3V_EN (PA19)
// PWM pins (PWM0, PWM1)
{ MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_PB01) },
{ MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_PB02) },
// MicroMod battery voltage sense pin
{ MP_ROM_QSTR(MP_QSTR_BATT_VIN3), MP_ROM_PTR(&pin_PB03) }, // MicroMod BATT_VIN/3 (PB03)
// AUD (audio)
{ MP_ROM_QSTR(MP_QSTR_AUD_MCLK), MP_ROM_PTR(&pin_PB17) },
{ MP_ROM_QSTR(MP_QSTR_AUD_OUT), MP_ROM_PTR(&pin_PA21) },
{ MP_ROM_QSTR(MP_QSTR_AUD_IN), MP_ROM_PTR(&pin_PA22) },
{ MP_ROM_QSTR(MP_QSTR_AUD_LRCLK), MP_ROM_PTR(&pin_PA20) },
{ MP_ROM_QSTR(MP_QSTR_AUD_BCLK), MP_ROM_PTR(&pin_PB16) },
// MicroMod reset pin
// { MP_ROM_QSTR(MP_QSTR_RESET), MP_ROM_PTR() }, // MicroMod RESET# (SAMD51 has a dedicated HW RESETN pin)
// I2C
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA17) },
{ MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_PA17) },
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA16) },
{ MP_ROM_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_PA16) },
// MicroMod boot pin
// { MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR() }, // MicroMod BOOT (not connected)
{ MP_ROM_QSTR(MP_QSTR_I2C_INT), MP_ROM_PTR(&pin_PA18) },
// MicroMod USB device pins
// USB device is always used internally by CircuitPython, so skip creating
// the pin objects for it. See explicit ignores in mpconfigboard.h.
// { MP_ROM_QSTR(MP_QSTR_USB_DM), MP_ROM_PTR(&pin_PA24) }, // MicroMod USB_D- (PA24)
// { MP_ROM_QSTR(MP_QSTR_USB_DP), MP_ROM_PTR(&pin_PA25) }, // MicroMod USB_D+ (PA25)
// I2C2
{ MP_ROM_QSTR(MP_QSTR_SDA2), MP_ROM_PTR(&pin_PA13) },
{ MP_ROM_QSTR(MP_QSTR_SCL2), MP_ROM_PTR(&pin_PA12) },
// MicroMod USB host pins
// { MP_ROM_QSTR(MP_QSTR_USBHOST_DM), MP_ROM_PTR() }, // MicroMod USBHOST_D- (not connected)
// { MP_ROM_QSTR(MP_QSTR_USBHOST_DP), MP_ROM_PTR() }, // MicroMod USBHOST_D+ (not connected)
// SPI
{ MP_ROM_QSTR(MP_QSTR_CIPO), MP_ROM_PTR(&pin_PA06) },
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) },
{ MP_ROM_QSTR(MP_QSTR_COPI), MP_ROM_PTR(&pin_PA04) },
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA04) },
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) },
{ MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_PA07) },
// MicroMod CAN pins
{ MP_ROM_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_PB15) }, // MicroMod CAN_RX (PB15)
{ MP_ROM_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_PB14) }, // MicroMod CAN_TX (PB14)
// Status LED
{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA23) },
// Note: MicroMod UART (UART0) is not present in the edge connector pinout
// because the primary debug serial port is exposed as a virtual serial port
// over USB.
// UART
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB30) },
{ MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_PB30) },
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB31) },
{ MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_PB31) },
// MicroMod UART1 pins
{ MP_ROM_QSTR(MP_QSTR_UART_TX1), MP_ROM_PTR(&pin_PB31) }, // MicroMod UART_TX1 | CircuitPython TX (PB31)
{ MP_ROM_QSTR(MP_QSTR_UART_RX1), MP_ROM_PTR(&pin_PB30) }, // MicroMod UART_RX1 | CircuitPython RX (PB30)
// { MP_ROM_QSTR(MP_QSTR_UART_RTS1), MP_ROM_PTR() }, // MicroMod RTS1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_UART_CTS1), MP_ROM_PTR() }, // MicroMod CTS1 (not connected)
// UART2
{ MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_PA13) },
{ MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_PA12) },
// CircuitPython default UART pins
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB31) }, // CircuitPython TX | MicroMod UART_TX1 (PB31)
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB30) }, // CircuitPython RX | MicroMod UART_RX1 (PB30)
// MicroMod UART2 pins
{ MP_ROM_QSTR(MP_QSTR_UART_TX2), MP_ROM_PTR(&pin_PA12) }, // MicroMod UART_TX2 (PA12)
{ MP_ROM_QSTR(MP_QSTR_UART_RX2), MP_ROM_PTR(&pin_PA13) }, // MicroMod UART_RX2 (PA13)
// Board objects
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
// MicroMod I2C pins
{ MP_ROM_QSTR(MP_QSTR_I2C_SDA), MP_ROM_PTR(&pin_PA17) }, // MicroMod I2C_SDA | CircuitPython SDA (PA17)
{ MP_ROM_QSTR(MP_QSTR_I2C_SCL), MP_ROM_PTR(&pin_PA16) }, // MicroMod I2C_SCL | CircuitPython SCL (PA16)
// CircuitPython default I2C pins
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA17) }, // CircuitPython SDA | MicroMod I2C_SDA (PA17)
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA16) }, // CircuitPython SCL | MicroMod I2C_SCL (PA16)
// MicroMod I2C interrupt pin
{ MP_ROM_QSTR(MP_QSTR_I2C_INT), MP_ROM_PTR(&pin_PA18) }, // MicroMod I2C_INT (PA18)
// MicroMod I2C1 pins
{ MP_ROM_QSTR(MP_QSTR_I2C_SDA1), MP_ROM_PTR(&pin_PA13) }, // MicroMod I2C_SDA1 (PA13)
{ MP_ROM_QSTR(MP_QSTR_I2C_SCL1), MP_ROM_PTR(&pin_PA12) }, // MicroMod I2C_SCL1 (PA12)
// MicroMod SPI pins
{ MP_ROM_QSTR(MP_QSTR_SPI_CIPO), MP_ROM_PTR(&pin_PA06) }, // MicroMod SPI_CIPO | CircuitPython CIPO (PA06)
{ MP_ROM_QSTR(MP_QSTR_SPI_MISO), MP_ROM_PTR(&pin_PA06) }, // MicroMod SPI_MISO | CircuitPython MISO (PA06)
{ MP_ROM_QSTR(MP_QSTR_SPI_COPI), MP_ROM_PTR(&pin_PA04) }, // MicroMod SPI_COPI | CircuitPython COPI | LED_DAT (PA04)
{ MP_ROM_QSTR(MP_QSTR_SPI_MOSI), MP_ROM_PTR(&pin_PA04) }, // MicroMod SPI_MOSI | CircuitPython MOSI (PA04)
{ MP_ROM_QSTR(MP_QSTR_SPI_SCK), MP_ROM_PTR(&pin_PA05) }, // MicroMod SPI_SCK | CircuitPython SCK | LED_CLK (PA05)
{ MP_ROM_QSTR(MP_QSTR_SPI_CS), MP_ROM_PTR(&pin_PA07) }, // MicroMod SPI_CS | CircuitPython CS (PA07)
// CircuitPython default SPI pins
{ MP_ROM_QSTR(MP_QSTR_CIPO), MP_ROM_PTR(&pin_PA06) }, // CircuitPython CIPO | MicroMod SPI_CIPO (PA06)
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, // CircuitPython MISO | MicroMod SPI_MISO (PA06)
{ MP_ROM_QSTR(MP_QSTR_COPI), MP_ROM_PTR(&pin_PA04) }, // CircuitPython COPI | MicroMod SPI_COPI | LED_DAT (PA04)
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA04) }, // CircuitPython MOSI | MicroMod SPI_MOSI (PA04)
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, // CircuitPython SCK | MicroMod SPI_SCK | LED_CLK (PA05)
{ MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_PA07) }, // CircuitPython CS | MicroMod SPI_CS (PA07)
// MicroMod 2-wire serial LED pins
{ MP_ROM_QSTR(MP_QSTR_LED_DAT), MP_ROM_PTR(&pin_PA04) }, // MicroMod LED_DAT | SPI_COPI (PA04)
{ MP_ROM_QSTR(MP_QSTR_LED_CLK), MP_ROM_PTR(&pin_PA05) }, // MicroMod LED_CLK | SPI_SCK (PA05)
// MicroMod SDIO pins
// { MP_ROM_QSTR(MP_QSTR_SDIO_CLK), MP_ROM_PTR() }, // MicroMod SDIO_SCK | SPI_SCK1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SDIO_CMD), MP_ROM_PTR() }, // MicroMod SDIO_CMD | SPI_COPI1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SDIO_DATA0), MP_ROM_PTR() }, // MicroMod SDIO_DATA0 | SPI_CIPO1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SDIO_DATA1), MP_ROM_PTR() }, // MicroMod SDIO_DATA1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SDIO_DATA2), MP_ROM_PTR() }, // MicroMod SDIO_DATA2 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SDIO_DATA3), MP_ROM_PTR() }, // MicroMod SDIO_DATA3 | SPI_CS1 (not connected)
// MicroMod SPI1 pins
// { MP_ROM_QSTR(MP_QSTR_SPI_CIPO1), MP_ROM_PTR() }, // MicroMod SPI_CIPO1 | SDIO_DATA0 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SPI_MISO1), MP_ROM_PTR() }, // MicroMod SPI_MISO1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SPI_COPI1), MP_ROM_PTR() }, // MicroMod SPI_COPI1 | SDIO_CMD (not connected)
// { MP_ROM_QSTR(MP_QSTR_SPI_MOSI1), MP_ROM_PTR() }, // MicroMod SPI_MOSI1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SPI_SCK1), MP_ROM_PTR() }, // MicroMod SPI_SCK1 | SDIO_SCK (not connected)
// { MP_ROM_QSTR(MP_QSTR_SPI_CS1), MP_ROM_PTR() }, // MicroMod SPI_CS1 | SDIO_DATA3 (not connected)
// MicroMod audio pins
{ MP_ROM_QSTR(MP_QSTR_AUD_MCLK), MP_ROM_PTR(&pin_PB17) }, // MicroMod AUD_MCLK (PB17)
{ MP_ROM_QSTR(MP_QSTR_AUD_OUT), MP_ROM_PTR(&pin_PA21) }, // MicroMod AUD_OUT | I2S_OUT | PCM_OUT | CAM_MCLK (PA21)
{ MP_ROM_QSTR(MP_QSTR_AUD_IN), MP_ROM_PTR(&pin_PA22) }, // MicroMod AUD_IN | I2S_IN | PCM_IN | CAM_PCLK (PA22)
{ MP_ROM_QSTR(MP_QSTR_AUD_LRCLK), MP_ROM_PTR(&pin_PA20) }, // MicroMod AUD_LRCLK | I2S_WS | PCM_SYNC | PDM_DATA (PA20)
{ MP_ROM_QSTR(MP_QSTR_AUD_BCLK), MP_ROM_PTR(&pin_PB16) }, // MicroMod AUD_BCLK | I2S_SCK | PCM_CLK | PDM_CLK (PB16)
// MicroMod I2S pins
{ MP_ROM_QSTR(MP_QSTR_I2S_OUT), MP_ROM_PTR(&pin_PA21) }, // MicroMod I2S_OUT | AUD_OUT | PCM_OUT | CAM_MCLK (PA21)
{ MP_ROM_QSTR(MP_QSTR_I2S_IN), MP_ROM_PTR(&pin_PA22) }, // MicroMod I2S_IN | AUD_IN | PCM_IN | CAM_PCLK (PA22)
{ MP_ROM_QSTR(MP_QSTR_I2S_WS), MP_ROM_PTR(&pin_PA20) }, // MicroMod I2S_WS | AUD_LRCLK | PCM_SYNC | PDM_DATA (PA20)
{ MP_ROM_QSTR(MP_QSTR_I2S_SCK), MP_ROM_PTR(&pin_PB16) }, // MicroMod I2S_SCK | AUD_BCLK | PCM_CLK | PDM_CLK (PB16)
// MicroMod PCM pins
{ MP_ROM_QSTR(MP_QSTR_PCM_OUT), MP_ROM_PTR(&pin_PA21) }, // MicroMod PCM_OUT | AUD_OUT | I2S_OUT | CAM_MCLK (PA21)
{ MP_ROM_QSTR(MP_QSTR_PCM_IN), MP_ROM_PTR(&pin_PA22) }, // MicroMod PCM_IN | AUD_IN | I2S_IN | CAM_PCLK (PA22)
{ MP_ROM_QSTR(MP_QSTR_PCM_SYNC), MP_ROM_PTR(&pin_PA20) }, // MicroMod PCM_SYNC | AUD_LRCLK | I2S_WS | PDM_DATA (PA20)
{ MP_ROM_QSTR(MP_QSTR_PCM_CLK), MP_ROM_PTR(&pin_PB16) }, // MicroMod PCM_CLK | AUD_BCLK | I2S_SCK | PDM_CLK (PB16)
// MicroMod PDM pins
{ MP_ROM_QSTR(MP_QSTR_PDM_DATA), MP_ROM_PTR(&pin_PA20) }, // MicroMod PDM_DATA | AUD_LRCLK | I2S_WS | PCM_SYNC (PA20)
{ MP_ROM_QSTR(MP_QSTR_PDM_CLK), MP_ROM_PTR(&pin_PB16) }, // MicroMod PDM_CLK | AUD_BCLK | I2S_SCK | PCM_CLK (PB16)
// MicroMod SWD pins
{ MP_ROM_QSTR(MP_QSTR_SWDIO), MP_ROM_PTR(&pin_PA31) }, // MicroMod SWDIO (PA31)
{ MP_ROM_QSTR(MP_QSTR_SWCLK), MP_ROM_PTR(&pin_PA30) }, // MicroMod SWDCK (PA30)
// { MP_ROM_QSTR(MP_QSTR_SWO), MP_ROM_PTR() }, // MicroMod SWO | G11 (not connected)
// MicroMod ADC pins
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, // MicroMod A0 (PA02)
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB00) }, // MicroMod A1 (PB00)
// MicroMod PWM pins
{ MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_PB01) }, // MicroMod PWM0 (PB01)
{ MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_PB02) }, // MicroMod PWM1 (PB02)
// MicroMod digital pins
{ MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB04) }, // MicroMod D0 (PB04)
{ MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB05) }, // MicroMod D1 | CAM_TRIG (PB05)
// MicroMod general purpose pins
{ MP_ROM_QSTR(MP_QSTR_G0), MP_ROM_PTR(&pin_PB06) }, // MicroMod G0 | BUS0 (PB06)
{ MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_PB07) }, // MicroMod G1 | BUS1 (PB07)
{ MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_PB08) }, // MicroMod G2 | BUS2 (PB08)
{ MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_PB09) }, // MicroMod G3 | BUS3 (PB09)
{ MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_PB10) }, // MicroMod G4 | BUS4 (PB10)
{ MP_ROM_QSTR(MP_QSTR_G5), MP_ROM_PTR(&pin_PB11) }, // MicroMod G5 | BUS5 (PB11)
{ MP_ROM_QSTR(MP_QSTR_G6), MP_ROM_PTR(&pin_PB12) }, // MicroMod G6 | BUS6 (PB12)
{ MP_ROM_QSTR(MP_QSTR_G7), MP_ROM_PTR(&pin_PB13) }, // MicroMod G7 | BUS7 (PB13)
{ MP_ROM_QSTR(MP_QSTR_G8), MP_ROM_PTR(&pin_PA14) }, // MicroMod G8 (PA14)
{ MP_ROM_QSTR(MP_QSTR_G9), MP_ROM_PTR(&pin_PA15) }, // MicroMod G9 | ADC_D- | CAM_HSYNC (PA15)
// { MP_ROM_QSTR(MP_QSTR_G10), MP_ROM_PTR() }, // MicroMod G10 | ADC_D+ | CAM_VSYNC (not connected)
{ MP_ROM_QSTR(MP_QSTR_G11), MP_ROM_PTR(&pin_PA27) }, // MicroMod G11 | SWO (PA27)
// MicroMod 8-bit bus pins
{ MP_ROM_QSTR(MP_QSTR_BUS0), MP_ROM_PTR(&pin_PB06) }, // MicroMod BUS0 | G0 (PB06)
{ MP_ROM_QSTR(MP_QSTR_BUS1), MP_ROM_PTR(&pin_PB07) }, // MicroMod BUS1 | G1 (PB07)
{ MP_ROM_QSTR(MP_QSTR_BUS2), MP_ROM_PTR(&pin_PB08) }, // MicroMod BUS2 | G2 (PB08)
{ MP_ROM_QSTR(MP_QSTR_BUS3), MP_ROM_PTR(&pin_PB09) }, // MicroMod BUS3 | G3 (PB09)
{ MP_ROM_QSTR(MP_QSTR_BUS4), MP_ROM_PTR(&pin_PB10) }, // MicroMod BUS4 | G4 (PB10)
{ MP_ROM_QSTR(MP_QSTR_BUS5), MP_ROM_PTR(&pin_PB11) }, // MicroMod BUS5 | G5 (PB11)
{ MP_ROM_QSTR(MP_QSTR_BUS6), MP_ROM_PTR(&pin_PB12) }, // MicroMod BUS6 | G6 (PB12)
{ MP_ROM_QSTR(MP_QSTR_BUS7), MP_ROM_PTR(&pin_PB13) }, // MicroMod BUS7 | G7 (PB13)
// MicroMod differential ADC input pins
// { MP_ROM_QSTR(MP_QSTR_ADC_DM), MP_ROM_PTR(&pin_PA15) }, // MicroMod ADC_D- | G9 | CAM_HSYNC (PA15)
// { MP_ROM_QSTR(MP_QSTR_ADC_DP), MP_ROM_PTR() }, // MicroMod ADC_D+ | G10 | CAM_VSYNC (not connected)
// MicroMod camera pins
// { MP_ROM_QSTR(MP_QSTR_CAM_MCLK), MP_ROM_PTR(&pin_PA21) }, // MicroMod CAM_MCLK | AUD_OUT | I2S_OUT | PCM_OUT (PA21)
// { MP_ROM_QSTR(MP_QSTR_CAM_PCLK), MP_ROM_PTR(&pin_PA22) }, // MicroMod CAM_PCLK | AUD_IN | I2S_IN | PCM_IN (PA22)
// { MP_ROM_QSTR(MP_QSTR_CAM_TRIG), MP_ROM_PTR(&pin_PB05) }, // MicroMod CAM_TRIG | D1 (PB05)
// { MP_ROM_QSTR(MP_QSTR_CAM_HSYNC), MP_ROM_PTR(&pin_PA15 }, // MicroMod CAM_HSYNC | ADC_D- | G9 (PA15)
// { MP_ROM_QSTR(MP_QSTR_CAM_VSYNC), MP_ROM_PTR() }, // MicroMod CAM_VSYNC | ADC_D+ | G10 (not connected)
// Module-specific aliases (not part of the MicroMod spec)
{ MP_ROM_QSTR(MP_QSTR_HOST_ENABLE), MP_ROM_PTR(&pin_PA27) }, // HOST_ENABLE | G11 | SWO (PA27)
// CircuitPython board objects
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, // CircuitPython I2C
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, // CircuitPython SPI
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, // CircuitPython UART
};
MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);

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@ -71,7 +71,7 @@
void i2sout_reset(void) {
// Make sure the I2S peripheral is running so we can see if the resources we need are free.
#ifdef SAM_D5X_E5X
// Connect the clock units to the 2mhz clock. It can't disable without it.
// Connect the clock units to the 2MHz clock. It can't disable without it.
connect_gclk_to_peripheral(5, I2S_GCLK_ID_0);
connect_gclk_to_peripheral(5, I2S_GCLK_ID_1);
#endif
@ -83,7 +83,7 @@ void i2sout_reset(void) {
// Make sure the I2S peripheral is running so we can see if the resources we need are free.
#ifdef SAM_D5X_E5X
// Connect the clock units to the 2mhz clock by default. They can't reset without it.
// Connect the clock units to the 2MHz clock by default. They can't reset without it.
disconnect_gclk_from_peripheral(5, I2S_GCLK_ID_0);
disconnect_gclk_from_peripheral(5, I2S_GCLK_ID_1);
@ -222,7 +222,6 @@ void common_hal_audiobusio_i2sout_deinit(audiobusio_i2sout_obj_t *self) {
reset_pin_number(self->word_select->number);
self->word_select = NULL;
reset_pin_number(self->data->number);
self->data = NULL;
}
void common_hal_audiobusio_i2sout_play(audiobusio_i2sout_obj_t *self,
@ -288,7 +287,7 @@ void common_hal_audiobusio_i2sout_play(audiobusio_i2sout_obj_t *self,
I2S->TXCTRL.reg = serctrl;
#endif
// The DFLL is always a 48mhz clock
// The DFLL is always a 48MHz clock
enable_clock_generator(self->gclk, CLOCK_48MHZ, divisor);
connect_gclk_to_peripheral(self->gclk, I2S_GCLK_ID_0 + self->clock_unit);

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@ -0,0 +1,38 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "supervisor/board.h"
void board_init(void) {
}
bool board_requests_safe_mode(void) {
return false;
}
void reset_board(void) {
}

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@ -0,0 +1,46 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2016 Glenn Ruben Bakke
* Copyright (c) 2021 Pierre Constantineau
*
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "nrfx/hal/nrf_gpio.h"
#define MICROPY_HW_BOARD_NAME "BlueMicro840"
#define MICROPY_HW_MCU_NAME "nRF52840"
#define BOARD_HAS_CRYSTAL 1
#define MICROPY_HW_LED_STATUS (&pin_P1_04) // RED
#define DEFAULT_I2C_BUS_SCL (&pin_P0_17) // 0.17 - same position as Pro Micro
#define DEFAULT_I2C_BUS_SDA (&pin_P0_15) // 0.15 - same position as Pro Micro
#define DEFAULT_SPI_BUS_SCK (&pin_P0_24) // 0.24 - same position as Pro Micro
#define DEFAULT_SPI_BUS_MOSI (&pin_P0_10) // 0.10 - same position as Pro Micro
#define DEFAULT_SPI_BUS_MISO (&pin_P0_09) // 0.09 - same position as Pro Micro
#define DEFAULT_UART_BUS_RX (&pin_P0_08) // 0.08 - same position as Pro Micro
#define DEFAULT_UART_BUS_TX (&pin_P0_06) // 0.06 - same position as Pro Micro

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@ -0,0 +1,8 @@
USB_VID = 0x1D50
USB_PID = 0x6161
USB_PRODUCT = "BlueMicro840"
USB_MANUFACTURER = "nrf52.jpconstantineau.com"
MCU_CHIP = nrf52840
INTERNAL_FLASH_FILESYSTEM = 1

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@ -0,0 +1,76 @@
#include "shared-bindings/board/__init__.h"
STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
{ MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) },
{ MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) },
{ MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) },
{ MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) },
{ MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) },
{ MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) },
{ MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) },
{ MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) },
{ MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) },
{ MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) },
{ MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) },
{ MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) },
{ MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) },
{ MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) },
{ MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) },
{ MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) },
{ MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) },
{ MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) },
{ MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) },
{ MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) },
{ MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) },
{ MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) },
{ MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) },
{ MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) },
{ MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_27) },
{ MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) },
{ MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) },
{ MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) },
{ MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) },
{ MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) },
{ MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) },
{ MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) },
{ MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) },
{ MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) },
{ MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) },
{ MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) },
{ MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) },
{ MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) },
{ MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) },
{ MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) },
{ MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) },
{ MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) },
{ MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) },
{ MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) },
{ MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) },
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_02) },
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_03) },
{ MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_04) },
{ MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_05) },
{ MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_28) },
{ MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_29) },
{ MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_P0_30) },
{ MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_P0_31) },
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_15) },
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_17) },
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_08) },
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_06) },
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_09) },
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_10) },
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_24) },
{ MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P1_04) },
{ MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_P1_10) },
{ MP_ROM_QSTR(MP_QSTR_RED_LED), MP_ROM_PTR(&pin_P1_04) },
{ MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_P1_10) },
{ MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_P0_31) },
{ MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_P0_31) },
{ MP_ROM_QSTR(MP_QSTR_VCC_ON), MP_ROM_PTR(&pin_P0_12) },
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
};
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

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@ -10,56 +10,64 @@ We've also routed two I<sup>2</sup>C buses, 2 SPI buses, eleven GPIO, dedicated
CircuitPython pin definitions, while simialr to other boards represent a slight departure from just the typical `A` and `D` pin definitions. The majority of general pins are labled as `G` (or alternatively, `BUS`,) as the MicroMod system they build on uses those names to specify pins that may not be specficially analog or digital.
This can be somewhat confusing, especially around the analog pins. Here's a quick pin-map. This pin map will use the label either on the [SparkFun MicroMod ATP Carrier Board](https://www.sparkfun.com/products/16885), or the pin name on the [graphical datasheet](https://cdn.sparkfun.com/assets/learn_tutorials/1/4/0/1/MicroMod_nRF52840_v1.0_Graphical_Datasheet.pdf). Some of the aditional aliases are just names to make naming consistent (e.g.: RTS/CTS), but they also can refer to additional functionality a pin may have (e.g.: NFC pins)
This can be somewhat confusing, especially around the analog pins. Here's a quick pin-map:
MicroMod Pin # | ATP Pin Label | Pin Definition | Additional Definitons | Pin/Port Reference | Notes
:--------------|:--------------|:--------------|:-----------------------|:-------------------|:------
8 | G11 | | | (Not Connected) |
10 | D0 | D0 | | P0_27 |
11 | BOOT | BOOT | BUTTON1 | P0_07 |
12 | SDA | SDA | | P0_08 |
13 | RTS1 | RTS | RTS1 | P1_02 |
14 | SCL | SCL | | P0_11 |
15 | CTS1 | CTS | CTS1 | P1_09 |
16 | /I2C INT | I2C_INT | P0_15 |
17 | TX | TX | TX1 | P1_03 |
18 | D1 | D1 | CAM_TRIG | P1_08 |
19 | RX | RX | RX1 | P1_10 |
20 | RX2 | RX2 | | P1_05 |
22 | TX2 | TX2 | | P1_07 |
32 | PWM0 | PWM0 | P0_06 |
34 | A0 | A0 | ADC0 | P0_04 | Attached to AIN2
38 | A1 | A1 | ADC1 | P0_05 | Attached to AIN3
11 | BOOT | BOOT | | P0_07 |
12 | SDA | I2C_SDA | SDA | P0_08 |
13 | RTS1 | UART_RTS1 | | P1_02 |
14 | SCL | I2C_SCL | SCL | P0_11 |
15 | CTS1 | UART_CTS1 | | P1_09 |
16 | /I2C INT | I2C_INT | |P0_15|
17 | TX | UART_TX1 | TX | P1_03 |
18 | D1 | D1 | | P1_08 |
19 | RX | UART_RX1 | RX | P1_10 |
20 | RX2 | UART_RX2 | | P1_05 |
22 | TX2 | UART_TX2 | | P1_07 |
32 | PWM0 | PWM0 | |P0_06|
34 | A0 | A0 | | P0_04 | Attached to AIN2
38 | A1 | A1 | | P0_05 | Attached to AIN3
40 | G0 | G0 | BUS0 | P0_29 | Attached to AIN5
42 | G1 | G1 | BUS1 | P0_03 | Attached to AIN1
44 | G2 | G2 | BUS2 | P1_13 |
46 | G3 | G3 | BUS3 | P1_12 |
47 | PWM1 | PWM1 | P0_16 |
47 | PWM1 | PWM1 | |P0_16|
48 | G4 | G4 | BUS4 | P1_11 |
49 | BATT_VIN | BATT_VIN3 | | P0_30 | Attached to AIN6, will be battery voltage / 3. |
49 | BATT_VIN | BATT_VIN3 | | P0_30 | Attached to AIN6, will be battery voltage / 3.
50 | PDM_CLK | PDM_CLK | | P0_25 |
51 | SDA1 | SDA1 | | P1_01 |
51 | SDA1 | I2C_SDA1 | | P1_01 |
52 | PDM_DATA | PDM_DATA | | P0_26 |
53 | SCL1 | SCL1 | | P0_24 |
55 | /CS | CS | | P0_20 |
57 | SCK | SCK | | P0_28 | Attached to AIN4
59 | COPI | COPI | MOSI | P0_31 | Attached to AIN7
61 | CIPO | CIPO | MISO | P0_02 |
63 | G10 | G10 | NFC2, ADC_DP, CAM_VSYNC | P0_10 | Attached to NFC2
65 | G9 | G9 | NFC1, ADC_DM, CAM_HSYNC | P0_09 | Attached to NFC1
53 | SCL1 | I2C_SCL1 | | P0_24 |
55 | /CS | SPI_CS | | P0_20 |
57 | SCK | SPI_SCK | LED_CLK | P0_28 | Attached to AIN4
59 | COPI | SPI_COPI | SPI_MOSI, LED_DAT | P0_31 | Attached to AIN7
60 | SCK1 | SDIO_SCK | SPI_SCK1 | |
61 | CIPO | SPI_CIPO | SPI_MISO | P0_02 |
62 | COPI1 | SDIO_CMD | SPI_COPI1 | |
63 | G10 | G10 | | P0_10 | Attached to NFC2
64 | CIPO1 | SDIO_DATA0 | SPI_CIPO1 | |
65 | G9 | G9 | | P0_09 | Attached to NFC1
66 | DAT1 | SDIO_DATA1 | | |
67 | G8 | G8 | | P1_14 |
68 | DAT2 | SDIO_DATA2 | | |
69 | G7 | G7 | BUS7 | P1_04 |
70 | CS1 | SDIO_DATA3 | SPI_CS1 | |
71 | G6 | G6 | BUS6 | P1_06 |
73 | G5 | G5 | BUS5 | P0_15 |
## Peripheral Naming
CircuitPython attempts to stay in line with the naming of the serial peripheral naming in the MicroMod system. The bare UART pins are also named <pin>1. The UART 2 pins are named <pin>2. However, the I2C names on MicroMod are <I2C pin> and <I2C pin>1. Perhaps this will change in the future, but as of [Interface v1](https://cdn.sparkfun.com/assets/learn_tutorials/1/2/0/6/SparkFun_MicroMod_Interface_v1.0_-_Pin_Descriptions.pdf), it may lead to some confusion.
The SparkFun MicroMod spec uses a zero-based peripheral numbering scheme. The 0th peripheral is the default and the "0" is omitted from the peripheral name. For example, the first I2C peripheral is named `I2C` (instead of `I2C0`) and the second I2C peripheral is named `I2C1`. Note: MicroMod `UART` is not present in the edge connector pinout because the primary debug serial port (i.e.`UART0`) is exposed as a virtual serial port over USB. As a result, the first UART peripheral in the edge connector pinout is `UART1` and the second UART peripheral is `UART2`.
For more details, see https://www.sparkfun.com/micromod#tech-specs.
## Bootloader Notes
The MicroMod nRF52840 Processor needs to have the [Adafruit nRF52 UF2 bootloader](https://github.com/adafruit/Adafruit_nRF52_Bootloader/pull/194) flashed on it. [[TODO: LINK TO BUILD]]
The MicroMod nRF52840 Processor needs to have the [Adafruit nRF52 UF2 bootloader](https://github.com/adafruit/Adafruit_nRF52_Bootloader/releases/latest) flashed on it.
## Hardware Reference

View File

@ -27,9 +27,12 @@
#include "nrfx/hal/nrf_gpio.h"
#define MICROPY_HW_BOARD_NAME "SparkFun MicroMod nRF52840"
#define MICROPY_HW_BOARD_NAME "SparkFun MicroMod nRF52840 Processor"
#define MICROPY_HW_MCU_NAME "nRF52840"
// Status LED
#define MICROPY_HW_LED_STATUS (&pin_P0_13)
#define DEFAULT_I2C_BUS_SCL (&pin_P0_11)
#define DEFAULT_I2C_BUS_SDA (&pin_P0_08)

View File

@ -1,6 +1,6 @@
USB_VID = 0x1B4F
USB_PID = 0x0021
USB_PRODUCT = "SFE_nRF52840_MicroMod"
USB_PRODUCT = "SparkFun MicroMod nRF52840 Processor"
USB_MANUFACTURER = "SparkFun Electronics"
MCU_CHIP = nrf52840

View File

@ -1,113 +1,221 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
* Copyright (c) 2021 Chris Wilson
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "shared-bindings/board/__init__.h"
STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
// D pins (D0-D1)
{ MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_27) }, // 0.27 - D0
{ MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P1_08) }, // 1.08 - D1 | CAM_TRIG
{ MP_ROM_QSTR(MP_QSTR_CAM_TRIG), MP_ROM_PTR(&pin_P1_08) }, // CAM_TRIG alias
// The SparkFun MicroMod spec uses a zero-based peripheral numbering scheme.
// The 0th peripheral is the default and the "0" is omitted from the
// peripheral name (e.g. "I2C" instead of "I2C0").
//
// For more details, see https://www.sparkfun.com/micromod#tech-specs
// A pins (A0-A1)
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04) }, // 0.04 - A0 | ADC0 (AIN2)
{ MP_ROM_QSTR(MP_QSTR_ADC0), MP_ROM_PTR(&pin_P0_04) }, // ADC0 alias
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_05) }, // 0.05 - A1 | ADC1 (AIN3)
{ MP_ROM_QSTR(MP_QSTR_ADC1), MP_ROM_PTR(&pin_P0_05) }, // ADC1 alias
// MicroMod built-in status LED pin
// Requirement from the "Designing with MicroMod" SparkFun article:
// "... every Processor Board shall include one status LED connected to a
// pin that is not connected to the board edge."
{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_P0_13) }, // MicroMod LED (P0.13)
// G pins (G0-G11, G11 NC)
{ MP_ROM_QSTR(MP_QSTR_G0), MP_ROM_PTR(&pin_P0_29) }, // 0.29 - G0 | GPIO0 | BUS0 (AIN5)
{ MP_ROM_QSTR(MP_QSTR_BUS0), MP_ROM_PTR(&pin_P0_29) }, // BUS0 alias
{ MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_P0_03) }, // 0.03 - G1 | GPIO1 | BUS1 (AIN1)
{ MP_ROM_QSTR(MP_QSTR_BUS1), MP_ROM_PTR(&pin_P0_03) }, // BUS1 alias
{ MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_P1_13) }, // 1.13 - G2 | GPIO2 | BUS2
{ MP_ROM_QSTR(MP_QSTR_BUS2), MP_ROM_PTR(&pin_P1_13) }, // BUS2 alias
{ MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_P1_12) }, // 1.12 - G3 | GPIO3 | BUS3
{ MP_ROM_QSTR(MP_QSTR_BUS3), MP_ROM_PTR(&pin_P1_12) }, // BUS3 alias
{ MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_P1_11) }, // 1.11 - G4 | GPIO4 | BUS4
{ MP_ROM_QSTR(MP_QSTR_BUS4), MP_ROM_PTR(&pin_P1_11) }, // BUS4 alias
{ MP_ROM_QSTR(MP_QSTR_G5), MP_ROM_PTR(&pin_P0_17) }, // 0.17 - G5 | GPIO5 | BUS5
{ MP_ROM_QSTR(MP_QSTR_BUS5), MP_ROM_PTR(&pin_P0_17) }, // BUS5 alias
{ MP_ROM_QSTR(MP_QSTR_G6), MP_ROM_PTR(&pin_P1_06) }, // 1.06 - G6 | GPIO6 | BUS6
{ MP_ROM_QSTR(MP_QSTR_BUS6), MP_ROM_PTR(&pin_P1_06) }, // BUS6 alias
{ MP_ROM_QSTR(MP_QSTR_G7), MP_ROM_PTR(&pin_P1_04) }, // 1.04 - G7 | GPIO7 | BUS7
{ MP_ROM_QSTR(MP_QSTR_BUS7), MP_ROM_PTR(&pin_P1_04) }, // BUS7 alias
{ MP_ROM_QSTR(MP_QSTR_G8), MP_ROM_PTR(&pin_P1_14) }, // 1.14 - G8 | GPIO8
{ MP_ROM_QSTR(MP_QSTR_G9), MP_ROM_PTR(&pin_P0_09) }, // 0.09 - G9 | GPIO9/NFC1 | ADC_D- | CAM_HSYNC (NFC1)
{ MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, // NFC1 alias
{ MP_ROM_QSTR(MP_QSTR_ADC_DM), MP_ROM_PTR(&pin_P0_09) }, // ADC_DM alias
{ MP_ROM_QSTR(MP_QSTR_CAM_HSYNC), MP_ROM_PTR(&pin_P0_09) }, // CAM_HSYNC alias
{ MP_ROM_QSTR(MP_QSTR_G10), MP_ROM_PTR(&pin_P0_10) }, // 0.10 - G10 | GPIO10/NFC2 | ADC_D+ | CAM_VSYNC (NFC2)
{ MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, // NFC2 alias
{ MP_ROM_QSTR(MP_QSTR_ADC_DP), MP_ROM_PTR(&pin_P0_10) }, // ADC_DP alias
{ MP_ROM_QSTR(MP_QSTR_CAM_VSYNC), MP_ROM_PTR(&pin_P0_10) }, // CAM_VSYNC alias
// NC - G11
// MicroMod USB bus input voltage (+5V) pin
// { MP_ROM_QSTR(MP_QSTR_USB_VIN), MP_ROM_PTR() }, // MicroMod USB_VIN (MDBT50Q-P1M has a dedicated HW VBUS pin)
// PWM pins (PWM0-PWM1)
{ MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_P0_06) }, // 0.06 - PWM0
{ MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_P0_16) }, // 0.16 - PWM1
// MicroMod +3.3V enable pin
{ MP_ROM_QSTR(MP_QSTR_P3V3_EN), MP_ROM_PTR(&pin_P1_15) }, // MicroMod 3.3V_EN (P1.15)
// PDM
{ MP_ROM_QSTR(MP_QSTR_PDM_CLK), MP_ROM_PTR(&pin_P0_25) }, // 0.25 - PDM_CLK | AUD_BCLK
{ MP_ROM_QSTR(MP_QSTR_PDM_DATA), MP_ROM_PTR(&pin_P0_26) }, // 0.26 - PDM_DATA | AUD_LRCLK
// MicroMod battery voltage sense pin
{ MP_ROM_QSTR(MP_QSTR_BATT_VIN3), MP_ROM_PTR(&pin_P0_30) }, // MicroMod BATT_VIN/3 (P0.30)
// Battery Voltage Monitor
{ MP_ROM_QSTR(MP_QSTR_BATT_VIN3), MP_ROM_PTR(&pin_P0_30) }, // 0.30 - BATT_VIN/3 (AIN6)
// MicroMod reset pin
{ MP_ROM_QSTR(MP_QSTR_RESET), MP_ROM_PTR(&pin_P0_18) }, // MicroMod RESET# (P0.18)
// I2C
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_08) }, // 0.08 - SDA
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11) }, // 0.11 - SCL (TRACEDATA2)
// MicroMod boot pin
{ MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR(&pin_P0_07) }, // MicroMod BOOT (P0.07)
{ MP_ROM_QSTR(MP_QSTR_I2C_INT), MP_ROM_PTR(&pin_P0_15) }, // 0.15 - I2C_INT
// MicroMod USB device pins
// USB device is always used internally by CircuitPython, so skip creating
// the pin objects for it.
// { MP_ROM_QSTR(MP_QSTR_USB_DM), MP_ROM_PTR() }, // MicroMod USB_D- (MDBT50Q-P1M has a dedicated HW D- pin)
// { MP_ROM_QSTR(MP_QSTR_USB_DP), MP_ROM_PTR() }, // MicroMod USB_D+ (MDBT50Q-P1M has a dedicated HW D+ pin)
{ MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_P1_01) }, // 1.01 - SDA1
{ MP_ROM_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_P0_24) }, // 0.24 - SCL1
// MicroMod USB host pins
// { MP_ROM_QSTR(MP_QSTR_USBHOST_DM), MP_ROM_PTR() }, // MicroMod USBHOST_D- (not supported)
// { MP_ROM_QSTR(MP_QSTR_USBHOST_DP), MP_ROM_PTR() }, // MicroMod USBHOST_D+ (not supported)
// SPI
{ MP_ROM_QSTR(MP_QSTR_CIPO), MP_ROM_PTR(&pin_P0_02) }, // 0.02 - CIPO | SPI_CIPO
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_02) }, // MISO alias
{ MP_ROM_QSTR(MP_QSTR_COPI), MP_ROM_PTR(&pin_P0_31) }, // 0.31 - COPI | SPI_COPI (AIN7)
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_31) }, // MOSI alias
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_28) }, // 0.28 - SCK | SPI_SCK (AIN4)
{ MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_P0_20) }, // 0.20 - /CS | SPI_/CS
// MicroMod CAN pins
// { MP_ROM_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR() }, // MicroMod CAN_RX (not supported)
// { MP_ROM_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR() }, // MicroMod CAN_TX (not supported)
// QSPI, used by flash on this board, but is broken out
// on the MicroMod connector, to to the SDIO pins.
{ MP_ROM_QSTR(MP_QSTR_SDIO_CLK), MP_ROM_PTR(&pin_P0_19) }, // 0.00 - SDIO SCK | Used as: QSPI flash SCK
{ MP_ROM_QSTR(MP_QSTR_SPI_SCK1), MP_ROM_PTR(&pin_P0_19) }, // SPI_SCK1 alias
{ MP_ROM_QSTR(MP_QSTR_SDIO_CMD), MP_ROM_PTR(&pin_P0_14) }, // 0.00 - SDIO CMD | Used as: QSPI flash D0 (or SDI)
{ MP_ROM_QSTR(MP_QSTR_SPI_COPI1), MP_ROM_PTR(&pin_P0_14) }, // SPI_COPI1 alias
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA0), MP_ROM_PTR(&pin_P0_21) },// 0.00 - SDIO DATA0 | Used as: QSPI flash D1 (or SDO)
{ MP_ROM_QSTR(MP_QSTR_SPI_CIPO1), MP_ROM_PTR(&pin_P0_21) }, // SPI_CIPO1 alias
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA1), MP_ROM_PTR(&pin_P0_22) },// 0.00 - SDIO DATA1 | Unused for flash.
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA2), MP_ROM_PTR(&pin_P0_23) },// 0.00 - SDIO DATA2 | Used as: QSPI flash D2
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA3), MP_ROM_PTR(&pin_P1_00) },// 0.00 - SDIO DATA3 | Use das: QSPI flash D3 (or /HOLD)
{ MP_ROM_QSTR(MP_QSTR_SPI_CS1), MP_ROM_PTR(&pin_P1_00) }, // SPI_CS1 alias
// Note: MicroMod UART (UART0) is not present in the edge connector pinout
// because the primary debug serial port is exposed as a virtual serial port
// over USB.
// Reset Pin
{ MP_ROM_QSTR(MP_QSTR_RESET), MP_ROM_PTR(&pin_P1_14) }, // 0.18 - /RESET (NRESET)
// MicroMod UART1 pins
{ MP_ROM_QSTR(MP_QSTR_UART_TX1), MP_ROM_PTR(&pin_P1_03) }, // MicroMod UART_TX1 | CircuitPython TX (P1.03)
{ MP_ROM_QSTR(MP_QSTR_UART_RX1), MP_ROM_PTR(&pin_P1_10) }, // MicroMod UART_RX1 | CircuitPython RX (P1.10)
{ MP_ROM_QSTR(MP_QSTR_UART_RTS1), MP_ROM_PTR(&pin_P1_02) }, // MicroMod RTS1 (P1.02)
{ MP_ROM_QSTR(MP_QSTR_UART_CTS1), MP_ROM_PTR(&pin_P1_09) }, // MicroMod CTS1 (P1.09)
// LED
{ MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_13) }, // 0.13 - LED_BUILTIN | STAT | Blue LED
// CircuitPython default UART pins
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P1_03) }, // CircuitPython TX | MicroMod UART_TX1 (P1.03)
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P1_10) }, // CircuitPython RX | MicroMod UART_RX1 (P1.10)
// Button
{ MP_ROM_QSTR(MP_QSTR_BUTTON1), MP_ROM_PTR(&pin_P0_07) }, // 0.07 - /BOOT [Active Low] (TRACECLK) - Is button on carriers.
{ MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR(&pin_P0_07) }, // BOOT alias
// MicroMod UART2 pins
{ MP_ROM_QSTR(MP_QSTR_UART_TX2), MP_ROM_PTR(&pin_P1_07) }, // MicroMod UART_TX2 (P1.07)
{ MP_ROM_QSTR(MP_QSTR_UART_RX2), MP_ROM_PTR(&pin_P1_05) }, // MicroMod UART_RX2 (P1.05)
// UART
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P1_10) }, // 1.10 - UART RX | RX1
{ MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_P1_10) }, // RX1 alias
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P1_03) }, // 1.03 - UART TX | TX1
{ MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_P1_03) }, // TX1 alias
{ MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_PTR(&pin_P1_09) }, // 1.09 - UART CTS | CTS1 (TRACEDATA3)
{ MP_ROM_QSTR(MP_QSTR_CTS1), MP_ROM_PTR(&pin_P1_09) }, // CTS1 alias
{ MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_PTR(&pin_P1_02) }, // 1.02 - UART RTS | RTS1
{ MP_ROM_QSTR(MP_QSTR_RTS1), MP_ROM_PTR(&pin_P1_02) }, // RTS1 alias
// MicroMod I2C pins
{ MP_ROM_QSTR(MP_QSTR_I2C_SDA), MP_ROM_PTR(&pin_P0_08) }, // MicroMod I2C_SDA (P0.08)
{ MP_ROM_QSTR(MP_QSTR_I2C_SCL), MP_ROM_PTR(&pin_P0_11) }, // MicroMod I2C_SCL (P0.11)
{ MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_P1_05) }, // 1.05 - UART RX | RX2
{ MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_P1_07) }, // 1.07 - UART TX | TX2
// CircuitPython default I2C pins
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_08) }, // CircuitPython SDA | MicroMod I2C_SDA (P0.08)
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11) }, // CircuitPython SCL | MicroMod I2C_SCL (P0.11)
// Board Objects
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
// MicroMod I2C interrupt pin
{ MP_ROM_QSTR(MP_QSTR_I2C_INT), MP_ROM_PTR(&pin_P0_15) }, // MicroMod I2C_INT (P0.15)
// MicroMod I2C1 pins
{ MP_ROM_QSTR(MP_QSTR_I2C_SDA1), MP_ROM_PTR(&pin_P1_01) }, // MicroMod I2C_SDA1 (P1.01)
{ MP_ROM_QSTR(MP_QSTR_I2C_SCL1), MP_ROM_PTR(&pin_P0_24) }, // MicroMod I2C_SCL1 (P0.24)
// MicroMod SPI pins
{ MP_ROM_QSTR(MP_QSTR_SPI_CIPO), MP_ROM_PTR(&pin_P0_02) }, // MicroMod SPI_CIPO | CircuitPython CIPO (P0.02)
{ MP_ROM_QSTR(MP_QSTR_SPI_MISO), MP_ROM_PTR(&pin_P0_02) }, // MicroMod SPI_MISO | CircuitPython MISO (P0.02)
{ MP_ROM_QSTR(MP_QSTR_SPI_COPI), MP_ROM_PTR(&pin_P0_31) }, // MicroMod SPI_COPI | CircuitPython COPI | LED_DAT (P0.31)
{ MP_ROM_QSTR(MP_QSTR_SPI_MOSI), MP_ROM_PTR(&pin_P0_31) }, // MicroMod SPI_MOSI | CircuitPython MOSI (P0.31)
{ MP_ROM_QSTR(MP_QSTR_SPI_SCK), MP_ROM_PTR(&pin_P0_28) }, // MicroMod SPI_SCK | CircuitPython SCK | LED_CLK (P0.28)
{ MP_ROM_QSTR(MP_QSTR_SPI_CS), MP_ROM_PTR(&pin_P0_20) }, // MicroMod SPI_CS | CircuitPython CS (P0.20)
// CircuitPython default SPI pins
{ MP_ROM_QSTR(MP_QSTR_CIPO), MP_ROM_PTR(&pin_P0_02) }, // CircuitPython CIPO | MicroMod SPI_CIPO (P0.02)
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_02) }, // CircuitPython MISO | MicroMod SPI_MISO (P0.02)
{ MP_ROM_QSTR(MP_QSTR_COPI), MP_ROM_PTR(&pin_P0_31) }, // CircuitPython COPI | MicroMod SPI_COPI | LED_DAT (P0.31)
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_31) }, // CircuitPython MOSI | MicroMod SPI_MOSI (P0.31)
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_28) }, // CircuitPython SCK | MicroMod SPI_SCK | LED_CLK (P0.28)
{ MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_P0_20) }, // CircuitPython CS | MicroMod SPI_CS (P0.20)
// MicroMod 2-wire serial LED pins
{ MP_ROM_QSTR(MP_QSTR_LED_DAT), MP_ROM_PTR(&pin_P0_31) }, // MicroMod LED_DAT | SPI_COPI (P0.31)
{ MP_ROM_QSTR(MP_QSTR_LED_CLK), MP_ROM_PTR(&pin_P0_28) }, // MicroMod LED_CLK | SPI_SCK (P0.28)
// MicroMod SDIO pins
{ MP_ROM_QSTR(MP_QSTR_SDIO_CLK), MP_ROM_PTR(&pin_P0_19) }, // MicroMod SDIO_SCK | SPI_SCK1 (P0.19)
{ MP_ROM_QSTR(MP_QSTR_SDIO_CMD), MP_ROM_PTR(&pin_P0_14) }, // MicroMod SDIO_CMD | SPI_COPI1 (P0.14)
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA0), MP_ROM_PTR(&pin_P0_21) }, // MicroMod SDIO_DATA0 | SPI_CIPO1 (P0.21)
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA1), MP_ROM_PTR(&pin_P0_22) }, // MicroMod SDIO_DATA1 (P0.22)
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA2), MP_ROM_PTR(&pin_P0_23) }, // MicroMod SDIO_DATA2 (P0.23)
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA3), MP_ROM_PTR(&pin_P1_00) }, // MicroMod SDIO_DATA3 | SPI_CS1 (P1.00)
// MicroMod SPI1 pins
{ MP_ROM_QSTR(MP_QSTR_SPI_CIPO1), MP_ROM_PTR(&pin_P0_21) }, // MicroMod SPI_CIPO1 | SDIO_DATA0 (P0.21)
{ MP_ROM_QSTR(MP_QSTR_SPI_MISO1), MP_ROM_PTR(&pin_P0_21) }, // MicroMod SPI_MISO1 (P0.21)
{ MP_ROM_QSTR(MP_QSTR_SPI_COPI1), MP_ROM_PTR(&pin_P0_14) }, // MicroMod SPI_COPI1 | SDIO_CMD (P0.14)
{ MP_ROM_QSTR(MP_QSTR_SPI_MOSI1), MP_ROM_PTR(&pin_P0_14) }, // MicroMod SPI_MOSI1 (P0.14)
{ MP_ROM_QSTR(MP_QSTR_SPI_SCK1), MP_ROM_PTR(&pin_P0_19) }, // MicroMod SPI_SCK1 | SDIO_SCK (P0.19)
{ MP_ROM_QSTR(MP_QSTR_SPI_CS1), MP_ROM_PTR(&pin_P1_00) }, // MicroMod SPI_CS1 | SDIO_DATA3 (P1.00)
// MicroMod audio pins (not supported by MDBT50Q-P1M)
// { MP_ROM_QSTR(MP_QSTR_AUD_MCLK), MP_ROM_PTR() }, // MicroMod AUD_MCLK (not connected)
// { MP_ROM_QSTR(MP_QSTR_AUD_OUT), MP_ROM_PTR() }, // MicroMod AUD_OUT | I2S_OUT | PCM_OUT | CAM_MCLK (not connected)
// { MP_ROM_QSTR(MP_QSTR_AUD_IN), MP_ROM_PTR() }, // MicroMod AUD_IN | I2S_IN | PCM_IN | CAM_PCLK (not connected)
// { MP_ROM_QSTR(MP_QSTR_AUD_LRCLK), MP_ROM_PTR(&pin_P0_26) },// MicroMod AUD_LRCLK | I2S_WS | PCM_SYNC | PDM_DATA (P0.26)
// { MP_ROM_QSTR(MP_QSTR_AUD_BCLK), MP_ROM_PTR(&pin_P0_25) }, // MicroMod AUD_BCLK | I2S_SCK | PCM_CLK | PDM_CLK (P0.25)
// MicroMod I2S pins (not supported by MDBT50Q-P1M)
// { MP_ROM_QSTR(MP_QSTR_I2S_OUT), MP_ROM_PTR() }, // MicroMod I2S_OUT | AUD_OUT | PCM_OUT | CAM_MCLK (not connected)
// { MP_ROM_QSTR(MP_QSTR_I2S_IN), MP_ROM_PTR() }, // MicroMod I2S_IN | AUD_IN | PCM_IN | CAM_PCLK (not connected)
// { MP_ROM_QSTR(MP_QSTR_I2S_WS), MP_ROM_PTR(&pin_P0_26) }, // MicroMod I2S_WS | AUD_LRCLK | PCM_SYNC | PDM_DATA (P0.26)
// { MP_ROM_QSTR(MP_QSTR_I2S_SCK), MP_ROM_PTR(&pin_P0_25) }, // MicroMod I2S_SCK | AUD_BCLK | PCM_CLK | PDM_CLK (P0.25)
// MicroMod PCM pins (not supported by MDBT50Q-P1M)
// { MP_ROM_QSTR(MP_QSTR_PCM_OUT), MP_ROM_PTR() }, // MicroMod PCM_OUT | AUD_OUT | I2S_OUT | CAM_MCLK (not connected)
// { MP_ROM_QSTR(MP_QSTR_PCM_IN), MP_ROM_PTR() }, // MicroMod PCM_IN | AUD_IN | I2S_IN | CAM_PCLK (not connected)
// { MP_ROM_QSTR(MP_QSTR_PCM_SYNC), MP_ROM_PTR(&pin_P0_26) }, // MicroMod PCM_SYNC | AUD_LRCLK | I2S_WS | PDM_DATA (P0.26)
// { MP_ROM_QSTR(MP_QSTR_PCM_CLK), MP_ROM_PTR(&pin_P0_25) }, // MicroMod PCM_CLK | AUD_BCLK | I2S_SCK | PDM_CLK (P0.25)
// MicroMod PDM pins
{ MP_ROM_QSTR(MP_QSTR_PDM_DATA), MP_ROM_PTR(&pin_P0_26) }, // MicroMod PDM_DATA | AUD_LRCLK | I2S_WS | PCM_SYNC (P0.26)
{ MP_ROM_QSTR(MP_QSTR_PDM_CLK), MP_ROM_PTR(&pin_P0_25) }, // MicroMod PDM_CLK | AUD_BCLK | I2S_SCK | PCM_CLK (P0.25)
// MicroMod SWD pins
// { MP_ROM_QSTR(MP_QSTR_SWDIO), MP_ROM_PTR() }, // MicroMod SWDIO (MDBT50Q-P1M has a dedicated HW SWDIO pin)
// { MP_ROM_QSTR(MP_QSTR_SWCLK), MP_ROM_PTR() }, // MicroMod SWDCK (MDBT50Q-P1M has a dedicated HW SWDCLK pin)
// { MP_ROM_QSTR(MP_QSTR_SWO), MP_ROM_PTR() }, // MicroMod SWO | G11 (not supported)
// MicroMod ADC pins
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_05) }, // MicroMod A0 (P0.05)
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_04) }, // MicroMod A1 (P0.04)
// MicroMod PWM pins
{ MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_P0_06) }, // MicroMod PWM0 (P0.06)
{ MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_P0_16) }, // MicroMod PWM1 (P0.16)
// MicroMod digital pins
{ MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_27) }, // MicroMod D0 (P0.27)
{ MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P1_08) }, // MicroMod D1 | CAM_TRIG (P1.08)
// MicroMod general purpose pins
{ MP_ROM_QSTR(MP_QSTR_G0), MP_ROM_PTR(&pin_P0_29) }, // MicroMod G0 | BUS0 (P0.29)
{ MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_P0_03) }, // MicroMod G1 | BUS1 (P0.03)
{ MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_P1_13) }, // MicroMod G2 | BUS2 (P1.13)
{ MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_P1_12) }, // MicroMod G3 | BUS3 (P1.12)
{ MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_P1_11) }, // MicroMod G4 | BUS4 (P1.11)
{ MP_ROM_QSTR(MP_QSTR_G5), MP_ROM_PTR(&pin_P0_17) }, // MicroMod G5 | BUS5 (P0.17)
{ MP_ROM_QSTR(MP_QSTR_G6), MP_ROM_PTR(&pin_P1_06) }, // MicroMod G6 | BUS6 (P1.06)
{ MP_ROM_QSTR(MP_QSTR_G7), MP_ROM_PTR(&pin_P1_04) }, // MicroMod G7 | BUS7 (P1.04)
{ MP_ROM_QSTR(MP_QSTR_G8), MP_ROM_PTR(&pin_P1_14) }, // MicroMod G8 (P1.14)
{ MP_ROM_QSTR(MP_QSTR_G9), MP_ROM_PTR(&pin_P0_09) }, // MicroMod G9 | ADC_D- | CAM_HSYNC (P0.09)
{ MP_ROM_QSTR(MP_QSTR_G10), MP_ROM_PTR(&pin_P0_10) }, // MicroMod G10 | ADC_D+ | CAM_VSYNC (P0.10)
// { MP_ROM_QSTR(MP_QSTR_G11), MP_ROM_PTR() }, // MicroMod G11 | SWO (not connected)
// MicroMod 8-bit bus pins
{ MP_ROM_QSTR(MP_QSTR_BUS0), MP_ROM_PTR(&pin_P0_29) }, // MicroMod BUS0 | G0 (P0.29)
{ MP_ROM_QSTR(MP_QSTR_BUS1), MP_ROM_PTR(&pin_P0_03) }, // MicroMod BUS1 | G1 (P0.03)
{ MP_ROM_QSTR(MP_QSTR_BUS2), MP_ROM_PTR(&pin_P1_13) }, // MicroMod BUS2 | G2 (P1.13)
{ MP_ROM_QSTR(MP_QSTR_BUS3), MP_ROM_PTR(&pin_P1_12) }, // MicroMod BUS3 | G3 (P1.12)
{ MP_ROM_QSTR(MP_QSTR_BUS4), MP_ROM_PTR(&pin_P1_11) }, // MicroMod BUS4 | G4 (P1.11)
{ MP_ROM_QSTR(MP_QSTR_BUS5), MP_ROM_PTR(&pin_P0_17) }, // MicroMod BUS5 | G5 (P0.17)
{ MP_ROM_QSTR(MP_QSTR_BUS6), MP_ROM_PTR(&pin_P1_06) }, // MicroMod BUS6 | G6 (P1.06)
{ MP_ROM_QSTR(MP_QSTR_BUS7), MP_ROM_PTR(&pin_P1_04) }, // MicroMod BUS7 | G7 (P1.04)
// MicroMod differential ADC input pins (not supported by MDBT50Q-P1M)
// { MP_ROM_QSTR(MP_QSTR_ADC_DM), MP_ROM_PTR(&pin_P0_09) }, // MicroMod ADC_D- | G9 | CAM_HSYNC (P0.09)
// { MP_ROM_QSTR(MP_QSTR_ADC_DP), MP_ROM_PTR(&pin_P0_10) }, // MicroMod ADC_D+ | G10 | CAM_VSYNC (P0.10)
// MicroMod camera pins (not supported by MDBT50Q-P1M)
// { MP_ROM_QSTR(MP_QSTR_CAM_MCLK), MP_ROM_PTR() }, // MicroMod CAM_MCLK | AUD_OUT | I2S_OUT | PCM_OUT (not connected)
// { MP_ROM_QSTR(MP_QSTR_CAM_PCLK), MP_ROM_PTR() }, // MicroMod CAM_PCLK | AUD_IN | I2S_IN | PCM_IN (not connected)
// { MP_ROM_QSTR(MP_QSTR_CAM_TRIG), MP_ROM_PTR(&pin_P1_08) }, // MicroMod CAM_TRIG | D1 (P1.08)
// { MP_ROM_QSTR(MP_QSTR_CAM_HSYNC), MP_ROM_PTR(&pin_P0_09) },// MicroMod CAM_HSYNC | ADC_D- | G9 (P0.09)
// { MP_ROM_QSTR(MP_QSTR_CAM_VSYNC), MP_ROM_PTR(&pin_P0_10) },// MicroMod CAM_VSYNC | ADC_D+ | G10 (P0.10)
// CircuitPython board objects
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, // CircuitPython I2C
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, // CircuitPython SPI
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, // CircuitPython UART
};
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

View File

@ -28,6 +28,7 @@
#include "shared-bindings/audiocore/RawSample.h"
#include "shared-bindings/audiocore/WaveFile.h"
#include "shared-bindings/microcontroller/__init__.h"
#include "supervisor/background_callback.h"
#include "py/mpstate.h"
@ -37,10 +38,8 @@
#if CIRCUITPY_AUDIOPWMIO || CIRCUITPY_AUDIOBUSIO
#define AUDIO_DMA_CHANNEL_COUNT NUM_DMA_CHANNELS
void audio_dma_reset(void) {
for (size_t channel = 0; channel < AUDIO_DMA_CHANNEL_COUNT; channel++) {
for (size_t channel = 0; channel < NUM_DMA_CHANNELS; channel++) {
if (MP_STATE_PORT(playing_audio)[channel] == NULL) {
continue;
}
@ -49,116 +48,152 @@ void audio_dma_reset(void) {
}
}
void audio_dma_convert_signed(audio_dma_t *dma, uint8_t *buffer, uint32_t buffer_length,
uint8_t **output_buffer, uint32_t *output_buffer_length) {
if (dma->first_buffer_free) {
*output_buffer = dma->first_buffer;
} else {
*output_buffer = dma->second_buffer;
}
STATIC void audio_dma_convert_samples(
audio_dma_t *dma,
uint8_t *input, uint32_t input_length,
uint8_t *available_output_buffer, uint32_t available_output_buffer_length,
uint8_t **output, uint32_t *output_length) {
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wcast-align"
// Check whether a conversion is necessary
if (dma->signed_to_unsigned ||
dma->unsigned_to_signed ||
dma->sample_spacing > 1 ||
(dma->sample_resolution != dma->output_resolution)) {
*output_buffer_length = buffer_length / dma->sample_spacing;
// Must convert.
// Write the conversion into the passed-in output buffer
*output = available_output_buffer;
*output_length = input_length / dma->sample_spacing;
if (*output_length > available_output_buffer_length) {
mp_raise_RuntimeError(translate("Internal audio buffer too small"));
}
uint32_t out_i = 0;
if (dma->sample_resolution <= 8 && dma->output_resolution > 8) {
// reading bytes, writing 16-bit words, so output buffer will be bigger.
*output_length = *output_length * 2;
if (*output_length > available_output_buffer_length) {
mp_raise_RuntimeError(translate("Internal audio buffer too small"));
}
size_t shift = dma->output_resolution - dma->sample_resolution;
for (uint32_t i = 0; i < buffer_length; i += dma->sample_spacing) {
for (uint32_t i = 0; i < input_length; i += dma->sample_spacing) {
if (dma->signed_to_unsigned) {
((uint16_t *)*output_buffer)[out_i] = ((uint16_t)((int8_t *)buffer)[i] + 0x80) << shift;
((uint16_t *)*output)[out_i] = ((uint16_t)((int8_t *)input)[i] + 0x80) << shift;
} else if (dma->unsigned_to_signed) {
((int16_t *)*output_buffer)[out_i] = ((int16_t)((uint8_t *)buffer)[i] - 0x80) << shift;
((int16_t *)*output)[out_i] = ((int16_t)((uint8_t *)input)[i] - 0x80) << shift;
} else {
((uint16_t *)*output_buffer)[out_i] = ((uint16_t)((uint8_t *)buffer)[i]) << shift;
((uint16_t *)*output)[out_i] = ((uint16_t)((uint8_t *)input)[i]) << shift;
}
out_i += 1;
}
} else if (dma->sample_resolution <= 8 && dma->output_resolution <= 8) {
for (uint32_t i = 0; i < buffer_length; i += dma->sample_spacing) {
for (uint32_t i = 0; i < input_length; i += dma->sample_spacing) {
if (dma->signed_to_unsigned) {
((uint8_t *)*output_buffer)[out_i] = ((int8_t *)buffer)[i] + 0x80;
((uint8_t *)*output)[out_i] = ((int8_t *)input)[i] + 0x80;
} else if (dma->unsigned_to_signed) {
((int8_t *)*output_buffer)[out_i] = ((uint8_t *)buffer)[i] - 0x80;
((int8_t *)*output)[out_i] = ((uint8_t *)input)[i] - 0x80;
} else {
((uint8_t *)*output_buffer)[out_i] = ((uint8_t *)buffer)[i];
((uint8_t *)*output)[out_i] = ((uint8_t *)input)[i];
}
out_i += 1;
}
} else if (dma->sample_resolution > 8 && dma->output_resolution > 8) {
size_t shift = 16 - dma->output_resolution;
for (uint32_t i = 0; i < buffer_length / 2; i += dma->sample_spacing) {
for (uint32_t i = 0; i < input_length / 2; i += dma->sample_spacing) {
if (dma->signed_to_unsigned) {
((uint16_t *)*output_buffer)[out_i] = ((int16_t *)buffer)[i] + 0x8000;
((uint16_t *)*output)[out_i] = ((int16_t *)input)[i] + 0x8000;
} else if (dma->unsigned_to_signed) {
((int16_t *)*output_buffer)[out_i] = ((uint16_t *)buffer)[i] - 0x8000;
((int16_t *)*output)[out_i] = ((uint16_t *)input)[i] - 0x8000;
} else {
((uint16_t *)*output_buffer)[out_i] = ((uint16_t *)buffer)[i];
((uint16_t *)*output)[out_i] = ((uint16_t *)input)[i];
}
if (dma->output_resolution < 16) {
if (dma->output_signed) {
((int16_t *)*output_buffer)[out_i] = ((int16_t *)*output_buffer)[out_i] >> shift;
((int16_t *)*output)[out_i] = ((int16_t *)*output)[out_i] >> shift;
} else {
((uint16_t *)*output_buffer)[out_i] = ((uint16_t *)*output_buffer)[out_i] >> shift;
((uint16_t *)*output)[out_i] = ((uint16_t *)*output)[out_i] >> shift;
}
}
out_i += 1;
}
} else {
// (dma->sample_resolution > 8 && dma->output_resolution <= 8)
// Not currently used, but might be in the future.
mp_raise_RuntimeError(translate("Audio conversion not implemented"));
}
} else {
*output_buffer = buffer;
*output_buffer_length = buffer_length;
// No conversion necessary. Designate the input buffer as the output buffer.
*output = input;
*output_length = input_length;
}
#pragma GCC diagnostic pop
dma->first_buffer_free = !dma->first_buffer_free;
}
void audio_dma_load_next_block(audio_dma_t *dma) {
uint8_t dma_channel = dma->channel[1];
if (dma->first_channel_free) {
dma_channel = dma->channel[0];
}
dma->first_channel_free = !dma->first_channel_free;
// channel_idx is 0 or 1.
STATIC void audio_dma_load_next_block(audio_dma_t *dma, size_t buffer_idx) {
size_t dma_channel = dma->channel[buffer_idx];
uint8_t *output_buffer;
uint32_t output_buffer_length;
audioio_get_buffer_result_t get_buffer_result;
uint8_t *buffer;
uint32_t buffer_length;
uint8_t *sample_buffer;
uint32_t sample_buffer_length;
get_buffer_result = audiosample_get_buffer(dma->sample,
dma->single_channel_output, dma->audio_channel, &buffer, &buffer_length);
dma->single_channel_output, dma->audio_channel, &sample_buffer, &sample_buffer_length);
if (get_buffer_result == GET_BUFFER_ERROR) {
audio_dma_stop(dma);
return;
}
audio_dma_convert_signed(dma, buffer, buffer_length, &output_buffer, &output_buffer_length);
// Convert the sample format resolution and signedness, as necessary.
// The input sample buffer is what was read from a file, Mixer, or a raw sample buffer.
// The output buffer is one of the DMA buffers (passed in), or if no conversion was done,
// the original sample buffer (to save copying).
// If we don't have an output buffer, save the pointer to first_buffer for use in the single
// buffer special case.
if (dma->first_buffer == NULL) {
dma->first_buffer = output_buffer;
}
// audio_dma_convert_samples() will write the converted samples into the given output
// buffer if necessary. If no conversion was needed, it will return the sample buffer
// as the output buffer.
uint8_t *output_buffer;
uint32_t output_buffer_length;
audio_dma_convert_samples(dma, sample_buffer, sample_buffer_length,
dma->buffer[buffer_idx], dma->buffer_length[buffer_idx],
&output_buffer, &output_buffer_length);
dma_channel_set_trans_count(dma_channel, output_buffer_length / dma->output_size, false /* trigger */);
dma_channel_set_read_addr(dma_channel, output_buffer, false /* trigger */);
dma_channel_set_trans_count(dma_channel, output_buffer_length / dma->output_size, false /* trigger */);
if (get_buffer_result == GET_BUFFER_DONE) {
if (dma->loop) {
audiosample_reset_buffer(dma->sample, dma->single_channel_output, dma->audio_channel);
} else {
// Set channel trigger to ourselves so we don't keep going.
dma_channel_hw_t *c = &dma_hw->ch[dma_channel];
c->al1_ctrl = (c->al1_ctrl & ~DMA_CH0_CTRL_TRIG_CHAIN_TO_BITS) | (dma_channel << DMA_CH0_CTRL_TRIG_CHAIN_TO_LSB);
c->al1_ctrl =
(c->al1_ctrl & ~DMA_CH0_CTRL_TRIG_CHAIN_TO_BITS) |
(dma_channel << DMA_CH0_CTRL_TRIG_CHAIN_TO_LSB);
if (output_buffer_length == 0 &&
!dma_channel_is_busy(dma->channel[0]) &&
!dma_channel_is_busy(dma->channel[1])) {
// No data has been read, and both DMA channels have now finished, so it's safe to stop.
audio_dma_stop(dma);
dma->playing_in_progress = false;
}
}
}
}
// Playback should be shutdown before calling this.
audio_dma_result audio_dma_setup_playback(audio_dma_t *dma,
audio_dma_result audio_dma_setup_playback(
audio_dma_t *dma,
mp_obj_t sample,
bool loop,
bool single_channel_output,
@ -167,6 +202,7 @@ audio_dma_result audio_dma_setup_playback(audio_dma_t *dma,
uint8_t output_resolution,
uint32_t output_register_address,
uint8_t dma_trigger_source) {
// Use two DMA channels to play because the DMA can't wrap to itself without the
// buffer being power of two aligned.
int dma_channel_0_maybe = dma_claim_unused_channel(false);
@ -191,12 +227,15 @@ audio_dma_result audio_dma_setup_playback(audio_dma_t *dma,
dma->unsigned_to_signed = false;
dma->output_signed = output_signed;
dma->sample_spacing = 1;
dma->first_channel_free = true;
dma->output_resolution = output_resolution;
dma->sample_resolution = audiosample_bits_per_sample(sample);
dma->output_register_address = output_register_address;
audiosample_reset_buffer(sample, single_channel_output, audio_channel);
bool single_buffer;
bool single_buffer; // True if data fits in one single buffer.
bool samples_signed;
uint32_t max_buffer_length;
audiosample_get_buffer_structure(sample, single_channel_output, &single_buffer, &samples_signed,
@ -210,22 +249,25 @@ audio_dma_result audio_dma_setup_playback(audio_dma_t *dma,
dma->sample_spacing > 1 ||
(dma->sample_resolution != dma->output_resolution)) {
max_buffer_length /= dma->sample_spacing;
dma->first_buffer = (uint8_t *)m_realloc(dma->first_buffer, max_buffer_length);
if (dma->first_buffer == NULL) {
}
dma->buffer[0] = (uint8_t *)m_realloc(dma->buffer[0], max_buffer_length);
dma->buffer_length[0] = max_buffer_length;
if (dma->buffer[0] == NULL) {
return AUDIO_DMA_MEMORY_ERROR;
}
if (!single_buffer) {
dma->buffer[1] = (uint8_t *)m_realloc(dma->buffer[1], max_buffer_length);
dma->buffer_length[1] = max_buffer_length;
if (dma->buffer[1] == NULL) {
return AUDIO_DMA_MEMORY_ERROR;
}
dma->first_buffer_free = true;
if (!single_buffer) {
dma->second_buffer = (uint8_t *)m_realloc(dma->second_buffer, max_buffer_length);
if (dma->second_buffer == NULL) {
return AUDIO_DMA_MEMORY_ERROR;
}
}
dma->signed_to_unsigned = !output_signed && samples_signed;
dma->unsigned_to_signed = output_signed && !samples_signed;
}
dma->signed_to_unsigned = !output_signed && samples_signed;
dma->unsigned_to_signed = output_signed && !samples_signed;
if (output_resolution > 8) {
dma->output_size = 2;
} else {
@ -248,9 +290,11 @@ audio_dma_result audio_dma_setup_playback(audio_dma_t *dma,
channel_config_set_dreq(&c, dma_trigger_source);
channel_config_set_read_increment(&c, true);
channel_config_set_write_increment(&c, false);
// Chain to the other channel by default.
channel_config_set_chain_to(&c, dma->channel[(i + 1) % 2]);
dma_channel_set_config(dma->channel[i], &c, false /* trigger */);
dma_channel_set_write_addr(dma->channel[i], (void *)output_register_address, false /* trigger */);
}
@ -260,9 +304,9 @@ audio_dma_result audio_dma_setup_playback(audio_dma_t *dma,
MP_STATE_PORT(playing_audio)[dma->channel[1]] = dma;
// Load the first two blocks up front.
audio_dma_load_next_block(dma);
audio_dma_load_next_block(dma, 0);
if (!single_buffer) {
audio_dma_load_next_block(dma);
audio_dma_load_next_block(dma, 1);
}
// Special case the DMA for a single buffer. It's commonly used for a single wave length of sound
@ -279,16 +323,17 @@ audio_dma_result audio_dma_setup_playback(audio_dma_t *dma,
channel_config_set_chain_to(&c, dma->channel[1]); // Chain to ourselves so we stop.
dma_channel_configure(dma->channel[1], &c,
&dma_hw->ch[dma->channel[0]].al3_read_addr_trig, // write address
&dma->first_buffer, // read address
&dma->buffer[0], // read address
1, // transaction count
false); // trigger
} else {
// Enable our DMA channels on DMA0 to the CPU. This will wake us up when
// Enable our DMA channels on DMA_IRQ_0 to the CPU. This will wake us up when
// we're WFI.
dma_hw->inte0 |= (1 << dma->channel[0]) | (1 << dma->channel[1]);
irq_set_mask_enabled(1 << DMA_IRQ_0, true);
}
dma->playing_in_progress = true;
dma_channel_start(dma->channel[0]);
return AUDIO_DMA_OK;
@ -296,7 +341,14 @@ audio_dma_result audio_dma_setup_playback(audio_dma_t *dma,
void audio_dma_stop(audio_dma_t *dma) {
// Disable our interrupts.
dma_hw->inte0 &= ~((1 << dma->channel[0]) | (1 << dma->channel[1]));
uint32_t channel_mask = 0;
if (dma->channel[0] < NUM_DMA_CHANNELS) {
channel_mask |= 1 << dma->channel[0];
}
if (dma->channel[1] < NUM_DMA_CHANNELS) {
channel_mask |= 1 << dma->channel[1];
}
dma_hw->inte0 &= ~channel_mask;
irq_set_mask_enabled(1 << DMA_IRQ_0, false);
// Run any remaining audio tasks because we remove ourselves from
@ -305,6 +357,10 @@ void audio_dma_stop(audio_dma_t *dma) {
for (size_t i = 0; i < 2; i++) {
size_t channel = dma->channel[i];
if (channel == NUM_DMA_CHANNELS) {
// Channel not in use.
continue;
}
dma_channel_config c = dma_channel_get_default_config(dma->channel[i]);
channel_config_set_enable(&c, false);
@ -313,6 +369,7 @@ void audio_dma_stop(audio_dma_t *dma) {
if (dma_channel_is_busy(channel)) {
dma_channel_abort(channel);
}
dma_channel_set_read_addr(channel, NULL, false /* trigger */);
dma_channel_set_write_addr(channel, NULL, false /* trigger */);
dma_channel_set_trans_count(channel, 0, false /* trigger */);
@ -320,6 +377,7 @@ void audio_dma_stop(audio_dma_t *dma) {
MP_STATE_PORT(playing_audio)[channel] = NULL;
dma->channel[i] = NUM_DMA_CHANNELS;
}
dma->playing_in_progress = false;
// Hold onto our buffers.
}
@ -344,7 +402,7 @@ void audio_dma_resume(audio_dma_t *dma) {
}
bool audio_dma_get_paused(audio_dma_t *dma) {
if (dma->channel[0] >= AUDIO_DMA_CHANNEL_COUNT) {
if (dma->channel[0] >= NUM_DMA_CHANNELS) {
return false;
}
uint32_t control = dma_hw->ch[dma->channel[0]].ctrl_trig;
@ -353,30 +411,26 @@ bool audio_dma_get_paused(audio_dma_t *dma) {
}
void audio_dma_init(audio_dma_t *dma) {
dma->first_buffer = NULL;
dma->second_buffer = NULL;
dma->buffer[0] = NULL;
dma->buffer[1] = NULL;
dma->channel[0] = NUM_DMA_CHANNELS;
dma->channel[1] = NUM_DMA_CHANNELS;
}
void audio_dma_deinit(audio_dma_t *dma) {
m_free(dma->first_buffer);
dma->first_buffer = NULL;
m_free(dma->buffer[0]);
dma->buffer[0] = NULL;
m_free(dma->second_buffer);
dma->second_buffer = NULL;
m_free(dma->buffer[1]);
dma->buffer[1] = NULL;
}
bool audio_dma_get_playing(audio_dma_t *dma) {
if (dma->channel[0] == NUM_DMA_CHANNELS) {
return false;
}
if (!dma_channel_is_busy(dma->channel[0]) &&
!dma_channel_is_busy(dma->channel[1])) {
return false;
}
return true;
return dma->playing_in_progress;
}
// WARN(tannewt): DO NOT print from here, or anything it calls. Printing calls
@ -389,7 +443,25 @@ STATIC void dma_callback_fun(void *arg) {
return;
}
audio_dma_load_next_block(dma);
common_hal_mcu_disable_interrupts();
uint32_t channels_to_load_mask = dma->channels_to_load_mask;
dma->channels_to_load_mask = 0;
common_hal_mcu_enable_interrupts();
// Load the blocks for the requested channels.
uint32_t channel = 0;
while (channels_to_load_mask) {
if (channels_to_load_mask & 1) {
if (dma->channel[0] == channel) {
audio_dma_load_next_block(dma, 0);
}
if (dma->channel[1] == channel) {
audio_dma_load_next_block(dma, 1);
}
}
channels_to_load_mask >>= 1;
channel++;
}
}
void isr_dma_0(void) {
@ -397,6 +469,8 @@ void isr_dma_0(void) {
uint32_t mask = 1 << i;
if ((dma_hw->intr & mask) != 0 && MP_STATE_PORT(playing_audio)[i] != NULL) {
audio_dma_t *dma = MP_STATE_PORT(playing_audio)[i];
// Record all channels whose DMA has completed; they need loading.
dma->channels_to_load_mask |= mask;
background_callback_add(&dma->callback, dma_callback_fun, (void *)dma);
dma_hw->ints0 = mask;
}

View File

@ -43,12 +43,13 @@ typedef struct {
bool signed_to_unsigned;
bool unsigned_to_signed;
bool output_signed;
bool first_channel_free;
bool first_buffer_free;
bool playing_in_progress;
uint8_t output_resolution; // in bits
uint8_t sample_resolution; // in bits
uint8_t *first_buffer;
uint8_t *second_buffer;
uint8_t *buffer[2];
size_t buffer_length[2];
uint32_t channels_to_load_mask;
uint32_t output_register_address;
background_callback_t callback;
} audio_dma_t;

View File

@ -69,7 +69,7 @@ void board_init(void) {
&pin_GPIO24, // Command or data
&pin_GPIO22, // Chip select
&pin_GPIO23, // Reset
1000000, // Baudrate
10000000, // Baudrate
0, // Polarity
0); // Phase

View File

@ -1,12 +1,15 @@
#define MICROPY_HW_BOARD_NAME "SparkFun MicroMod ATP - RP2040"
#define MICROPY_HW_BOARD_NAME "SparkFun MicroMod RP2040 Processor"
#define MICROPY_HW_MCU_NAME "rp2040"
// Status LED
#define MICROPY_HW_LED_STATUS (&pin_GPIO25)
#define DEFAULT_I2C_BUS_SCL (&pin_GPIO5)
#define DEFAULT_I2C_BUS_SDA (&pin_GPIO4)
#define DEFAULT_SPI_BUS_SCK (&pin_GPIO14)
#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO15)
#define DEFAULT_SPI_BUS_MISO (&pin_GPIO12)
#define DEFAULT_SPI_BUS_SCK (&pin_GPIO22)
#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO23)
#define DEFAULT_SPI_BUS_MISO (&pin_GPIO20)
#define DEFAULT_UART_BUS_RX (&pin_GPIO1)
#define DEFAULT_UART_BUS_TX (&pin_GPIO0)

View File

@ -1,7 +1,7 @@
USB_VID = 0x1B4F
USB_PID = 0x0024
USB_PRODUCT = "MicroMod RP2040"
USB_MANUFACTURER = "SparkFun"
USB_PRODUCT = "SparkFun MicroMod RP2040 Processor"
USB_MANUFACTURER = "SparkFun Electronics"
CHIP_VARIANT = RP2040
CHIP_FAMILY = rp2

View File

@ -1,105 +1,223 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
* Copyright (c) 2021 Chris Wilson
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "shared-bindings/board/__init__.h"
STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
// D (Digital only) pins (D0,D1)
{ MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO6) }, // GPIO6 - D0
{ MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO7) }, // GPIO7 - D1
// The SparkFun MicroMod spec uses a zero-based peripheral numbering scheme.
// The 0th peripheral is the default and the "0" is omitted from the
// peripheral name (e.g. "I2C" instead of "I2C0").
//
// For more details, see https://www.sparkfun.com/micromod#tech-specs
// A (ADC) pins (A0,A1)
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO26) }, // GPIO26 - A0 | ADC0
{ MP_ROM_QSTR(MP_QSTR_ADC0), MP_ROM_PTR(&pin_GPIO26) }, // ADC0 alias
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO27) }, // GPIO27 - A1 | ADC1
{ MP_ROM_QSTR(MP_QSTR_ADC1), MP_ROM_PTR(&pin_GPIO27) }, // ADC1 alias
// MicroMod built-in status LED pin
// Requirement from the "Designing with MicroMod" SparkFun article:
// "... every Processor Board shall include one status LED connected to a
// pin that is not connected to the board edge."
// Note: GPIO25 is connected to both the status LED and edge connector pin
// G10, which doesn't comply with the requirement above...
{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO25) }, // MicroMod LED (GPIO25)
// G (General/BUS) pins (G0-G7, G8 NC, G9-G10, G11 NC)
{ MP_ROM_QSTR(MP_QSTR_G0), MP_ROM_PTR(&pin_GPIO16) }, // GPIO16 - G0 | BUS0
{ MP_ROM_QSTR(MP_QSTR_BUS0), MP_ROM_PTR(&pin_GPIO16) }, // BUS0 alias
{ MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_GPIO17) }, // GPIO17 - G1 | BUS1
{ MP_ROM_QSTR(MP_QSTR_BUS1), MP_ROM_PTR(&pin_GPIO17) }, // BUS1 alias
{ MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_GPIO18) }, // GPIO18 - G2 | BUS2
{ MP_ROM_QSTR(MP_QSTR_BUS2), MP_ROM_PTR(&pin_GPIO18) }, // BUS2 alias
{ MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_GPIO19) }, // GPIO19 - G3 | BUS3
{ MP_ROM_QSTR(MP_QSTR_BUS3), MP_ROM_PTR(&pin_GPIO19) }, // BUS3 alias
{ MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_GPIO20) }, // GPIO20 - G4 | BUS4 | SPI_CIPO
{ MP_ROM_QSTR(MP_QSTR_BUS4), MP_ROM_PTR(&pin_GPIO20) }, // BUS4 alias
{ MP_ROM_QSTR(MP_QSTR_G5), MP_ROM_PTR(&pin_GPIO21) }, // GPIO21 - G5 | BUS5 | SPI_CS
{ MP_ROM_QSTR(MP_QSTR_BUS5), MP_ROM_PTR(&pin_GPIO21) }, // BUS5 alias
{ MP_ROM_QSTR(MP_QSTR_G6), MP_ROM_PTR(&pin_GPIO22) }, // GPIO22 - G6 | BUS6 | SPI_SCK
{ MP_ROM_QSTR(MP_QSTR_BUS6), MP_ROM_PTR(&pin_GPIO22) }, // BUS6 alias
{ MP_ROM_QSTR(MP_QSTR_G7), MP_ROM_PTR(&pin_GPIO23) }, // GPIO23 - G7 | BUS7 | SPI_COPI
{ MP_ROM_QSTR(MP_QSTR_BUS7), MP_ROM_PTR(&pin_GPIO23) }, // BUS7 alias
// NC - G8
{ MP_ROM_QSTR(MP_QSTR_G9), MP_ROM_PTR(&pin_GPIO28) }, // GPIO28- G9 | BUS9 | ADC_D- | CAM_HSYNC
{ MP_ROM_QSTR(MP_QSTR_BUS9), MP_ROM_PTR(&pin_GPIO28) }, // BUS9 alias
{ MP_ROM_QSTR(MP_QSTR_ADC_DM), MP_ROM_PTR(&pin_GPIO28) }, // ADC_DM alias
{ MP_ROM_QSTR(MP_QSTR_CAM_HSYNC), MP_ROM_PTR(&pin_GPIO28) }, // CAM_HSYNC alias
{ MP_ROM_QSTR(MP_QSTR_G10), MP_ROM_PTR(&pin_GPIO25) }, // GPIO25 - G10 | BUS10 | ADC_D+ | CAM_VSYNC
{ MP_ROM_QSTR(MP_QSTR_BUS10), MP_ROM_PTR(&pin_GPIO25) }, // BUS10 alias
{ MP_ROM_QSTR(MP_QSTR_ADC_DP), MP_ROM_PTR(&pin_GPIO25) }, // ADC_DP alias
{ MP_ROM_QSTR(MP_QSTR_CAM_VSYNC), MP_ROM_PTR(&pin_GPIO25) }, // CAM_VSYNC alias
// NC - G11
// MicroMod USB bus input voltage (+5V) pin
// { MP_ROM_QSTR(MP_QSTR_USB_VIN), MP_ROM_PTR() }, // MicroMod USB_VIN (not connected)
// PWM pins (PWM0,PWM1)
{ MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_GPIO13) }, // GPIO13 - PWM0
{ MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_GPIO24) }, // GPIO24 - PWM1 | AUD_MCLK
// MicroMod +3.3V enable pin
// { MP_ROM_QSTR(MP_QSTR_P3V3_EN), MP_ROM_PTR() }, // MicroMod 3.3V_EN (not connected)
// AUD (audio)
{ MP_ROM_QSTR(MP_QSTR_AUD_MCLK), MP_ROM_PTR(&pin_GPIO24) }, // GPIO24 - AUD_MCLK | PWM1
{ MP_ROM_QSTR(MP_QSTR_AUD_OUT), MP_ROM_PTR(&pin_GPIO10) }, // GPIO10 - AUD_OUT | SDIO_DAT2
{ MP_ROM_QSTR(MP_QSTR_AUD_IN), MP_ROM_PTR(&pin_GPIO11) }, // GPIO11 - AUD_IN | SDIO_DAT1
{ MP_ROM_QSTR(MP_QSTR_AUD_LRCLK), MP_ROM_PTR(&pin_GPIO2) }, // GPIO2 - AUD_LRCLK | CTS1
{ MP_ROM_QSTR(MP_QSTR_AUD_BCLK), MP_ROM_PTR(&pin_GPIO3) }, // GPIO3 - AUD_BCLK | UART_RTS1
// MicroMod battery voltage sense pin
{ MP_ROM_QSTR(MP_QSTR_BATT_VIN3), MP_ROM_PTR(&pin_GPIO29) }, // MicroMod BATT_VIN/3 (GPIO29)
// Battery Voltage Monitor
{ MP_ROM_QSTR(MP_QSTR_BATT_VIN3), MP_ROM_PTR(&pin_GPIO29) }, // GPIO29 - BATT_VIN/3 (ADC03)
// MicroMod reset pin
// { MP_ROM_QSTR(MP_QSTR_RESET), MP_ROM_PTR() }, // MicroMod RESET# (RP2040 has a dedicated HW RUN pin)
// MicroMod boot pin
// { MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR() }, // MicroMod BOOT (RP2040 does not have a dedicated BOOT pin)
// I2C
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO4) }, // GPIO4 - SDA
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO5) }, // GPIO5 - SCL
// MicroMod USB device pins
// USB device is always used internally by CircuitPython, so skip creating
// the pin objects for it.
// { MP_ROM_QSTR(MP_QSTR_USB_DM), MP_ROM_PTR() }, // MicroMod USB_D- (RP2040 has a dedicated HW USB_DM pin)
// { MP_ROM_QSTR(MP_QSTR_USB_DP), MP_ROM_PTR() }, // MicroMod USB_D+ (RP2040 has a dedicated HW USB_DP pin)
{ MP_ROM_QSTR(MP_QSTR_I2C_INT), MP_ROM_PTR(&pin_GPIO8) }, // GPIO9 - I2C_INT | TX2
// MicroMod USB host pins
// { MP_ROM_QSTR(MP_QSTR_USBHOST_DM), MP_ROM_PTR() }, // MicroMod USBHOST_D- (RP2040 has a dedicated HW USB_DM pin)
// { MP_ROM_QSTR(MP_QSTR_USBHOST_DP), MP_ROM_PTR() }, // MicroMod USBHOST_D+ (RP2040 has a dedicated HW USB_DP pin)
// SPI
{ MP_ROM_QSTR(MP_QSTR_CIPO), MP_ROM_PTR(&pin_GPIO20) }, // GPIO20 - CIPO | SPI_CIPO | G4
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO20) }, // MISO alias
{ MP_ROM_QSTR(MP_QSTR_COPI), MP_ROM_PTR(&pin_GPIO23) }, // GPIO23 - COPI | SPI_COPI | G7
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO23) }, // MOSI alias
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO22) }, // GPIO22 - SCK | SPI_SCK | G6
{ MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_GPIO21) }, // GPIO21 - /CS | SPI_/CS | G5
// MicroMod CAN pins
// { MP_ROM_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR() }, // MicroMod CAN_RX (not supported)
// { MP_ROM_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR() }, // MicroMod CAN_TX (not supported)
// SDI/SPI1
{ MP_ROM_QSTR(MP_QSTR_SDIO_CLK), MP_ROM_PTR(&pin_GPIO14) }, // GPIO14 - SDIO SCK | SDIO_CLK
{ MP_ROM_QSTR(MP_QSTR_SPI_SCK1), MP_ROM_PTR(&pin_GPIO14) }, // SPI_SCK1 alias
{ MP_ROM_QSTR(MP_QSTR_SDIO_CMD), MP_ROM_PTR(&pin_GPIO15) }, // GPIO15 - SDIO CMD | SDIO_CMD
{ MP_ROM_QSTR(MP_QSTR_SPI_COPI1), MP_ROM_PTR(&pin_GPIO15) },// SPI_COPI1 alias
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA0), MP_ROM_PTR(&pin_GPIO12) },// GPIO12 - SDIO DATA0 | SDIO_DATA0
{ MP_ROM_QSTR(MP_QSTR_SPI_CIPO1), MP_ROM_PTR(&pin_GPIO12) }, // SPI_CIPO1 alias
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA1), MP_ROM_PTR(&pin_GPIO11) },// GPIO11 - SDIO DATA1 | SDIO_DATA1 | AUD_IN
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA2), MP_ROM_PTR(&pin_GPIO10) },// GPIO10 - SDIO DATA2 | SDIO_DATA2 | AUD_OUT
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA3), MP_ROM_PTR(&pin_GPIO9) },// GPIO9 - SDIO DATA3 | SDIO_DATA3 | SPI_CS1
{ MP_ROM_QSTR(MP_QSTR_SPI_CS1), MP_ROM_PTR(&pin_GPIO9) }, // SPI_CS1 alias
// Note: MicroMod UART (UART0) is not present in the edge connector pinout
// because the primary debug serial port is exposed as a virtual serial port
// over USB.
// Status LED
{ MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_GPIO25) }, // GPIO25 - LED_BUILTIN | STAT | Blue LED | G10
// MicroMod UART1 pins
{ MP_ROM_QSTR(MP_QSTR_UART_TX1), MP_ROM_PTR(&pin_GPIO0) }, // MicroMod UART_TX1 | CircuitPython TX (GPIO0)
{ MP_ROM_QSTR(MP_QSTR_UART_RX1), MP_ROM_PTR(&pin_GPIO1) }, // MicroMod UART_RX1 | CircuitPython RX (GPIO1)
{ MP_ROM_QSTR(MP_QSTR_UART_RTS1), MP_ROM_PTR(&pin_GPIO3) }, // MicroMod RTS1 (GPIO3)
{ MP_ROM_QSTR(MP_QSTR_UART_CTS1), MP_ROM_PTR(&pin_GPIO2) }, // MicroMod CTS1 (GPIO2)
// UART
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO1) }, // GPIO1 - UART RX | UART_RX1 | RX1
{ MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_GPIO1) }, // RX1 alias
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO0) }, // GPIO0 - UART TX | UART_TX1 | TX1
{ MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_GPIO0) }, // TX1 alias
{ MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_PTR(&pin_GPIO2) }, // GPIO2 - UART CTS | CTS1 (TRACEDATA3)
{ MP_ROM_QSTR(MP_QSTR_CTS1), MP_ROM_PTR(&pin_GPIO2) }, // CTS1 alias
{ MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_PTR(&pin_GPIO3) }, // GPIO3 - UART RTS | RTS1
{ MP_ROM_QSTR(MP_QSTR_RTS1), MP_ROM_PTR(&pin_GPIO3) }, // RTS1 alias
// CircuitPython default UART pins
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO0) }, // CircuitPython TX | MicroMod UART_TX1 (GPIO0)
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO1) }, // CircuitPython RX | MicroMod UART_RX1 (GPIO1)
{ MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_GPIO9) }, // GPIO9 - UART RX | UART_RX2 | RX2 | SDIO_DAT3 | SPI_CS1
{ MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_GPIO8) }, // GPIO8 - UART TX | UART_TX2 | TX2 | I2C_INT
// MicroMod UART2 pins
{ MP_ROM_QSTR(MP_QSTR_UART_TX2), MP_ROM_PTR(&pin_GPIO8) }, // MicroMod UART_TX2 (GPIO8)
{ MP_ROM_QSTR(MP_QSTR_UART_RX2), MP_ROM_PTR(&pin_GPIO9) }, // MicroMod UART_RX2 (GPIO9)
// Board objects
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
// MicroMod I2C pins
{ MP_ROM_QSTR(MP_QSTR_I2C_SDA), MP_ROM_PTR(&pin_GPIO4) }, // MicroMod I2C_SDA | CircuitPython SDA (GPIO4)
{ MP_ROM_QSTR(MP_QSTR_I2C_SCL), MP_ROM_PTR(&pin_GPIO5) }, // MicroMod I2C_SCL | CircuitPython SCL (GPIO5)
// CircuitPython default I2C pins
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO4) }, // CircuitPython SDA | MicroMod I2C_SDA (GPIO4)
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO5) }, // CircuitPython SCL | MicroMod I2C_SCL (GPIO5)
// MicroMod I2C interrupt pin
{ MP_ROM_QSTR(MP_QSTR_I2C_INT), MP_ROM_PTR(&pin_GPIO8) }, // MicroMod I2C_INT (GPIO8)
// MicroMod I2C1 pins
// { MP_ROM_QSTR(MP_QSTR_I2C_SDA1), MP_ROM_PTR() }, // MicroMod I2C_SDA1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_I2C_SCL1), MP_ROM_PTR() }, // MicroMod I2C_SCL1 (not connected)
// MicroMod SPI pins
{ MP_ROM_QSTR(MP_QSTR_SPI_CIPO), MP_ROM_PTR(&pin_GPIO20) }, // MicroMod SPI_CIPO | CircuitPython CIPO (GPIO20)
{ MP_ROM_QSTR(MP_QSTR_SPI_MISO), MP_ROM_PTR(&pin_GPIO20) }, // MicroMod SPI_MISO | CircuitPython MISO (GPIO20)
{ MP_ROM_QSTR(MP_QSTR_SPI_COPI), MP_ROM_PTR(&pin_GPIO23) }, // MicroMod SPI_COPI | CircuitPython COPI | LED_DAT (GPIO23)
{ MP_ROM_QSTR(MP_QSTR_SPI_MOSI), MP_ROM_PTR(&pin_GPIO23) }, // MicroMod SPI_MOSI | CircuitPython MOSI (GPIO23)
{ MP_ROM_QSTR(MP_QSTR_SPI_SCK), MP_ROM_PTR(&pin_GPIO22) }, // MicroMod SPI_SCK | CircuitPython SCK | LED_CLK (GPIO22)
{ MP_ROM_QSTR(MP_QSTR_SPI_CS), MP_ROM_PTR(&pin_GPIO21) }, // MicroMod SPI_CS | CircuitPython CS (GPIO21)
// CircuitPython default SPI pins
{ MP_ROM_QSTR(MP_QSTR_CIPO), MP_ROM_PTR(&pin_GPIO20) }, // CircuitPython CIPO | MicroMod SPI_CIPO (GPIO20)
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO20) }, // CircuitPython MISO | MicroMod SPI_MISO (GPIO20)
{ MP_ROM_QSTR(MP_QSTR_COPI), MP_ROM_PTR(&pin_GPIO23) }, // CircuitPython COPI | MicroMod SPI_COPI | LED_DAT (GPIO23)
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO23) }, // CircuitPython MOSI | MicroMod SPI_MOSI (GPIO23)
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO22) }, // CircuitPython SCK | MicroMod SPI_SCK | LED_CLK (GPIO22)
{ MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_GPIO21) }, // CircuitPython CS | MicroMod SPI_CS (GPIO21)
// MicroMod 2-wire serial LED pins
{ MP_ROM_QSTR(MP_QSTR_LED_DAT), MP_ROM_PTR(&pin_GPIO23) }, // MicroMod LED_DAT | SPI_COPI
{ MP_ROM_QSTR(MP_QSTR_LED_CLK), MP_ROM_PTR(&pin_GPIO22) }, // MicroMod LED_CLK | SPI_SCK
// MicroMod SDIO pins
{ MP_ROM_QSTR(MP_QSTR_SDIO_CLK), MP_ROM_PTR(&pin_GPIO14) }, // MicroMod SDIO_SCK | SPI_SCK1 (GPIO14)
{ MP_ROM_QSTR(MP_QSTR_SDIO_CMD), MP_ROM_PTR(&pin_GPIO15) }, // MicroMod SDIO_CMD | SPI_COPI1 (GPIO15)
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA0), MP_ROM_PTR(&pin_GPIO12) }, // MicroMod SDIO_DATA0 | SPI_CIPO1 (GPIO12)
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA1), MP_ROM_PTR(&pin_GPIO11) }, // MicroMod SDIO_DATA1 (GPIO11)
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA2), MP_ROM_PTR(&pin_GPIO10) }, // MicroMod SDIO_DATA2 (GPIO10)
{ MP_ROM_QSTR(MP_QSTR_SDIO_DATA3), MP_ROM_PTR(&pin_GPIO9) }, // MicroMod SDIO_DATA3 | SPI_CS1 (GPIO9)
// MicroMod SPI1 pins
{ MP_ROM_QSTR(MP_QSTR_SPI_CIPO1), MP_ROM_PTR(&pin_GPIO12) }, // MicroMod SPI_CIPO1 | SDIO_DATA0 (GPIO12)
{ MP_ROM_QSTR(MP_QSTR_SPI_MISO1), MP_ROM_PTR(&pin_GPIO12) }, // MicroMod SPI_MISO1 (GPIO12)
{ MP_ROM_QSTR(MP_QSTR_SPI_COPI1), MP_ROM_PTR(&pin_GPIO15) }, // MicroMod SPI_COPI1 | SDIO_CMD (GPIO15)
{ MP_ROM_QSTR(MP_QSTR_SPI_MOSI1), MP_ROM_PTR(&pin_GPIO15) }, // MicroMod SPI_MOSI1 (GPIO15)
{ MP_ROM_QSTR(MP_QSTR_SPI_SCK1), MP_ROM_PTR(&pin_GPIO14) }, // MicroMod SPI_SCK1 | SDIO_SCK (GPIO14)
{ MP_ROM_QSTR(MP_QSTR_SPI_CS1), MP_ROM_PTR(&pin_GPIO9) }, // MicroMod SPI_CS1 | SDIO_DATA3 (GPIO9)
// MicroMod audio pins
{ MP_ROM_QSTR(MP_QSTR_AUD_MCLK), MP_ROM_PTR(&pin_GPIO24) }, // MicroMod AUD_MCLK (GPIO24)
{ MP_ROM_QSTR(MP_QSTR_AUD_OUT), MP_ROM_PTR(&pin_GPIO10) }, // MicroMod AUD_OUT | I2S_OUT | PCM_OUT | CAM_MCLK (GPIO10)
{ MP_ROM_QSTR(MP_QSTR_AUD_IN), MP_ROM_PTR(&pin_GPIO11) }, // MicroMod AUD_IN | I2S_IN | PCM_IN | CAM_PCLK (GPIO11)
{ MP_ROM_QSTR(MP_QSTR_AUD_LRCLK), MP_ROM_PTR(&pin_GPIO2) }, // MicroMod AUD_LRCLK | I2S_WS | PCM_SYNC | PDM_DATA (GPIO2)
{ MP_ROM_QSTR(MP_QSTR_AUD_BCLK), MP_ROM_PTR(&pin_GPIO3) }, // MicroMod AUD_BCLK | I2S_SCK | PCM_CLK | PDM_CLK (GPIO3)
// MicroMod I2S pins
{ MP_ROM_QSTR(MP_QSTR_I2S_OUT), MP_ROM_PTR(&pin_GPIO10) }, // MicroMod I2S_OUT | AUD_OUT | PCM_OUT | CAM_MCLK (GPIO10)
{ MP_ROM_QSTR(MP_QSTR_I2S_IN), MP_ROM_PTR(&pin_GPIO11) }, // MicroMod I2S_IN | AUD_IN | PCM_IN | CAM_PCLK (GPIO11)
{ MP_ROM_QSTR(MP_QSTR_I2S_WS), MP_ROM_PTR(&pin_GPIO2) }, // MicroMod I2S_WS | AUD_LRCLK | PCM_SYNC | PDM_DATA (GPIO2)
{ MP_ROM_QSTR(MP_QSTR_I2S_SCK), MP_ROM_PTR(&pin_GPIO3) }, // MicroMod I2S_SCK | AUD_BCLK | PCM_CLK | PDM_CLK (GPIO3)
// MicroMod PCM pins
{ MP_ROM_QSTR(MP_QSTR_PCM_OUT), MP_ROM_PTR(&pin_GPIO10) }, // MicroMod PCM_OUT | AUD_OUT | I2S_OUT | CAM_MCLK (GPIO10)
{ MP_ROM_QSTR(MP_QSTR_PCM_IN), MP_ROM_PTR(&pin_GPIO11) }, // MicroMod PCM_IN | AUD_IN | I2S_IN | CAM_PCLK (GPIO11)
{ MP_ROM_QSTR(MP_QSTR_PCM_SYNC), MP_ROM_PTR(&pin_GPIO2) }, // MicroMod PCM_SYNC | AUD_LRCLK | I2S_WS | PDM_DATA (GPIO2)
{ MP_ROM_QSTR(MP_QSTR_PCM_CLK), MP_ROM_PTR(&pin_GPIO3) }, // MicroMod PCM_CLK | AUD_BCLK | I2S_SCK | PDM_CLK (GPIO3)
// MicroMod PDM pins
{ MP_ROM_QSTR(MP_QSTR_PDM_DATA), MP_ROM_PTR(&pin_GPIO2) }, // MicroMod PDM_DATA | AUD_LRCLK | I2S_WS | PCM_SYNC (GPIO2)
{ MP_ROM_QSTR(MP_QSTR_PDM_CLK), MP_ROM_PTR(&pin_GPIO3) }, // MicroMod PDM_CLK | AUD_BCLK | I2S_SCK | PCM_CLK (GPIO3)
// MicroMod SWD pins
// { MP_ROM_QSTR(MP_QSTR_SWDIO), MP_ROM_PTR() }, // MicroMod SWDIO (RP2040 has a dedicated HW SWDIO pin)
// { MP_ROM_QSTR(MP_QSTR_SWCLK), MP_ROM_PTR() }, // MicroMod SWDCK (RP2040 has a dedicated HW SWCLK pin)
// { MP_ROM_QSTR(MP_QSTR_SWO), MP_ROM_PTR() }, // MicroMod SWO | G11 (not supported)
// MicroMod ADC pins
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO26) }, // MicroMod A0 (GPIO26)
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO27) }, // MicroMod A1 (GPIO27)
// MicroMod PWM pins
{ MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_GPIO13) }, // MicroMod PWM0 (GPIO13)
{ MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_GPIO24) }, // MicroMod PWM1 (GPIO24)
// MicroMod digital pins
{ MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO6) }, // MicroMod D0 (GPIO6)
{ MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO7) }, // MicroMod D1 | CAM_TRIG (GPIO7)
// MicroMod general purpose pins
{ MP_ROM_QSTR(MP_QSTR_G0), MP_ROM_PTR(&pin_GPIO16) }, // MicroMod G0 | BUS0 (GPIO16)
{ MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_GPIO17) }, // MicroMod G1 | BUS1 (GPIO17)
{ MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_GPIO18) }, // MicroMod G2 | BUS2 (GPIO18)
{ MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_GPIO19) }, // MicroMod G3 | BUS3 (GPIO19)
{ MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_GPIO20) }, // MicroMod G4 | BUS4 (GPIO20)
{ MP_ROM_QSTR(MP_QSTR_G5), MP_ROM_PTR(&pin_GPIO21) }, // MicroMod G5 | BUS5 (GPIO21)
{ MP_ROM_QSTR(MP_QSTR_G6), MP_ROM_PTR(&pin_GPIO22) }, // MicroMod G6 | BUS6 (GPIO22)
{ MP_ROM_QSTR(MP_QSTR_G7), MP_ROM_PTR(&pin_GPIO23) }, // MicroMod G7 | BUS7 (GPIO23)
// { MP_ROM_QSTR(MP_QSTR_G8), MP_ROM_PTR() }, // MicroMod G8 (not connected)
{ MP_ROM_QSTR(MP_QSTR_G9), MP_ROM_PTR(&pin_GPIO28) }, // MicroMod G9 | ADC_D- | CAM_HSYNC (GPIO28)
{ MP_ROM_QSTR(MP_QSTR_G10), MP_ROM_PTR(&pin_GPIO25) }, // MicroMod G10 | ADC_D+ | CAM_VSYNC (GPIO25)
// { MP_ROM_QSTR(MP_QSTR_G11), MP_ROM_PTR() }, // MicroMod G11 | SWO (not connected)
// MicroMod 8-bit bus pins
{ MP_ROM_QSTR(MP_QSTR_BUS0), MP_ROM_PTR(&pin_GPIO16) }, // MicroMod BUS0 | G0 (GPIO16)
{ MP_ROM_QSTR(MP_QSTR_BUS1), MP_ROM_PTR(&pin_GPIO17) }, // MicroMod BUS1 | G1 (GPIO17)
{ MP_ROM_QSTR(MP_QSTR_BUS2), MP_ROM_PTR(&pin_GPIO18) }, // MicroMod BUS2 | G2 (GPIO18)
{ MP_ROM_QSTR(MP_QSTR_BUS3), MP_ROM_PTR(&pin_GPIO19) }, // MicroMod BUS3 | G3 (GPIO19)
{ MP_ROM_QSTR(MP_QSTR_BUS4), MP_ROM_PTR(&pin_GPIO20) }, // MicroMod BUS4 | G4 (GPIO20)
{ MP_ROM_QSTR(MP_QSTR_BUS5), MP_ROM_PTR(&pin_GPIO21) }, // MicroMod BUS5 | G5 (GPIO21)
{ MP_ROM_QSTR(MP_QSTR_BUS6), MP_ROM_PTR(&pin_GPIO22) }, // MicroMod BUS6 | G6 (GPIO22)
{ MP_ROM_QSTR(MP_QSTR_BUS7), MP_ROM_PTR(&pin_GPIO23) }, // MicroMod BUS7 | G7 (GPIO23)
// MicroMod differential ADC input pins (not supported by RP2040)
// { MP_ROM_QSTR(MP_QSTR_ADC_DM), MP_ROM_PTR(&pin_GPIO28) }, // MicroMod ADC_D- | G9 | CAM_HSYNC (GPIO28)
// { MP_ROM_QSTR(MP_QSTR_ADC_DP), MP_ROM_PTR(&pin_GPIO25) }, // MicroMod ADC_D+ | G10 | CAM_VSYNC (GPIO25)
// MicroMod camera pins
{ MP_ROM_QSTR(MP_QSTR_CAM_MCLK), MP_ROM_PTR(&pin_GPIO10) }, // MicroMod CAM_MCLK | AUD_OUT | I2S_OUT | PCM_OUT (GPIO10)
{ MP_ROM_QSTR(MP_QSTR_CAM_PCLK), MP_ROM_PTR(&pin_GPIO11) }, // MicroMod CAM_PCLK | AUD_IN | I2S_IN | PCM_IN (GPIO11)
{ MP_ROM_QSTR(MP_QSTR_CAM_TRIG), MP_ROM_PTR(&pin_GPIO7) }, // MicroMod CAM_TRIG | D1 (GPIO7)
{ MP_ROM_QSTR(MP_QSTR_CAM_HSYNC), MP_ROM_PTR(&pin_GPIO28) }, // MicroMod CAM_HSYNC | ADC_D- | G9 (GPIO28)
{ MP_ROM_QSTR(MP_QSTR_CAM_VSYNC), MP_ROM_PTR(&pin_GPIO25) }, // MicroMod CAM_VSYNC | ADC_D+ | G10 (GPIO25)
// CircuitPython board objects
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, // CircuitPython I2C
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, // CircuitPython SPI
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, // CircuitPython UART
};
MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);

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@ -117,7 +117,8 @@ void common_hal_audiobusio_i2sout_construct(audiobusio_i2sout_obj_t *self,
}
// Use the state machine to manage pins.
common_hal_rp2pio_statemachine_construct(&self->state_machine,
common_hal_rp2pio_statemachine_construct(
&self->state_machine,
program, program_len,
44100 * 32 * 6, // Clock at 44.1 khz to warm the DAC up.
NULL, 0,

View File

@ -38,7 +38,6 @@
#include "shared-bindings/microcontroller/__init__.h"
#include "shared-bindings/microcontroller/Pin.h"
#include "shared-bindings/microcontroller/Processor.h"
#include "supervisor/shared/tick.h"
#include "supervisor/shared/translate.h"
#include "src/rp2040/hardware_structs/include/hardware/structs/dma.h"
@ -158,27 +157,6 @@ void common_hal_audiopwmio_pwmaudioout_play(audiopwmio_pwmaudioout_obj_t *self,
tx_register += self->left_pwm.channel * sizeof(uint16_t);
}
audio_dma_result result = audio_dma_setup_playback(
&self->dma,
sample,
loop,
false, // single channel
0, // audio channel
false, // output signed
BITS_PER_SAMPLE,
(uint32_t)tx_register, // output register: PWM cc register
0x3b + pacing_timer); // data request line
if (result == AUDIO_DMA_DMA_BUSY) {
common_hal_audiopwmio_pwmaudioout_stop(self);
mp_raise_RuntimeError(translate("No DMA channel found"));
}
if (result == AUDIO_DMA_MEMORY_ERROR) {
common_hal_audiopwmio_pwmaudioout_stop(self);
mp_raise_RuntimeError(translate("Unable to allocate buffers for signed conversion"));
}
// OK! We got all of the resources we need and dma is ready.
self->pacing_timer = pacing_timer;
// Playback with two independent clocks. One is the sample rate which
@ -215,6 +193,27 @@ void common_hal_audiopwmio_pwmaudioout_play(audiopwmio_pwmaudioout_obj_t *self,
}
dma_hw->timer[pacing_timer] = best_numerator << 16 | best_denominator;
audio_dma_result result = audio_dma_setup_playback(
&self->dma,
sample,
loop,
false, // single channel
0, // audio channel
false, // output signed
BITS_PER_SAMPLE,
(uint32_t)tx_register, // output register: PWM cc register
0x3b + pacing_timer); // data request line
if (result == AUDIO_DMA_DMA_BUSY) {
common_hal_audiopwmio_pwmaudioout_stop(self);
mp_raise_RuntimeError(translate("No DMA channel found"));
}
if (result == AUDIO_DMA_MEMORY_ERROR) {
common_hal_audiopwmio_pwmaudioout_stop(self);
mp_raise_RuntimeError(translate("Unable to allocate buffers for signed conversion"));
}
// OK! We got all of the resources we need and dma is ready.
}
void common_hal_audiopwmio_pwmaudioout_stop(audiopwmio_pwmaudioout_obj_t *self) {
@ -226,9 +225,11 @@ void common_hal_audiopwmio_pwmaudioout_stop(audiopwmio_pwmaudioout_obj_t *self)
audio_dma_stop(&self->dma);
// Set to quiescent level.
pwm_hw->slice[self->left_pwm.slice].cc = self->quiescent_value;
common_hal_pwmio_pwmout_set_duty_cycle(&self->left_pwm, self->quiescent_value);
pwmio_pwmout_set_top(&self->left_pwm, PWM_TOP);
if (self->stereo) {
pwm_hw->slice[self->right_pwm.slice].cc = self->quiescent_value;
common_hal_pwmio_pwmout_set_duty_cycle(&self->right_pwm, self->quiescent_value);
pwmio_pwmout_set_top(&self->right_pwm, PWM_TOP);
}
}

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@ -0,0 +1,39 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "supervisor/board.h"
#include "mpconfigboard.h"
void board_init(void) {
}
bool board_requests_safe_mode(void) {
return false;
}
void reset_board(void) {
}

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@ -0,0 +1,65 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2021 Chris Wilson
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
// Micropython setup
#define MICROPY_HW_BOARD_NAME "SparkFun STM32 MicroMod Processor"
#define MICROPY_HW_MCU_NAME "STM32F405RG"
#define FLASH_SIZE (0x100000)
#define FLASH_PAGE_SIZE (0x4000)
#define HSE_VALUE ((uint32_t)12000000)
#define LSE_VALUE ((uint32_t)32768)
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
// Status LED
#define MICROPY_HW_LED_STATUS (&pin_PA15)
// On-board SPI flash
#define SPI_FLASH_MOSI_PIN (&pin_PC12)
#define SPI_FLASH_MISO_PIN (&pin_PC11)
#define SPI_FLASH_SCK_PIN (&pin_PC10)
#define SPI_FLASH_CS_PIN (&pin_PC03)
// Bootloader only
#ifdef UF2_BOOTLOADER_ENABLED
#define BOARD_VTOR_DEFER (1) // Leave VTOR relocation to bootloader
#endif
#define DEFAULT_I2C_BUS_SCL (&pin_PB10)
#define DEFAULT_I2C_BUS_SDA (&pin_PB11)
#define DEFAULT_SPI_BUS_SCK (&pin_PA05)
#define DEFAULT_SPI_BUS_MOSI (&pin_PA07)
#define DEFAULT_SPI_BUS_MISO (&pin_PA06)
#define DEFAULT_UART_BUS_RX (&pin_PA03)
#define DEFAULT_UART_BUS_TX (&pin_PA02)
// USB is always used internally so skip the pin objects for it.
#define IGNORE_PIN_PA11 (1)
#define IGNORE_PIN_PA12 (1)

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@ -0,0 +1,19 @@
USB_VID = 0X1B4F
USB_PID = 0x0027
USB_PRODUCT = "SparkFun STM32 MicroMod Processor"
USB_MANUFACTURER = "SparkFun Electronics"
SPI_FLASH_FILESYSTEM = 1
EXTERNAL_FLASH_DEVICES = W25Q128JVxM
MCU_SERIES = F4
MCU_VARIANT = STM32F405xx
MCU_PACKAGE = LQFP64
LD_COMMON = boards/common_default.ld
LD_DEFAULT = boards/STM32F405_default.ld
# UF2 boot option
LD_BOOT = boards/STM32F405_boot.ld
UF2_OFFSET = 0x8010000
CIRCUITPY_RGBMATRIX ?= 1

View File

@ -0,0 +1,224 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2021 Chris Wilson
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "shared-bindings/board/__init__.h"
STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
// The SparkFun MicroMod spec uses a zero-based peripheral numbering scheme.
// The 0th peripheral is the default and the "0" is omitted from the
// peripheral name (e.g. "I2C" instead of "I2C0").
//
// For more details, see https://www.sparkfun.com/micromod#tech-specs
// MicroMod built-in status LED pin
// Requirement from the "Designing with MicroMod" SparkFun article:
// "... every Processor Board shall include one status LED connected to a
// pin that is not connected to the board edge."
{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA15) }, // MicroMod LED (PA15)
// MicroMod USB bus input voltage (+5V) pin
// { MP_ROM_QSTR(MP_QSTR_USB_VIN), MP_ROM_PTR() }, // MicroMod USB_VIN (not connected)
// MicroMod +3.3V enable pin
// { MP_ROM_QSTR(MP_QSTR_P3V3_EN), MP_ROM_PTR() }, // MicroMod 3.3V_EN (not connected)
// MicroMod battery voltage sense pin
{ MP_ROM_QSTR(MP_QSTR_BATT_VIN3), MP_ROM_PTR(&pin_PA01) }, // MicroMod BATT_VIN/3 (PA1)
// MicroMod reset pin
// { MP_ROM_QSTR(MP_QSTR_RESET), MP_ROM_PTR() }, // MicroMod RESET# (STM32 has a dedicated HW NRST pin)
// MicroMod boot pin
// { MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR() }, // MicroMod BOOT (STM32 has a dedicated HW BOOT0 pin)
// MicroMod USB device pins
// USB device is always used internally by CircuitPython, so skip creating
// the pin objects for it. See explicit ignores in mpconfigboard.h.
// { MP_ROM_QSTR(MP_QSTR_USB_DM), MP_ROM_PTR(&pin_PA11) }, // MicroMod USB_D- (PA11)
// { MP_ROM_QSTR(MP_QSTR_USB_DP), MP_ROM_PTR(&pin_PA12) }, // MicroMod USB_D+ (PA12)
// MicroMod USB host pins
{ MP_ROM_QSTR(MP_QSTR_USBHOST_DM), MP_ROM_PTR(&pin_PB14) }, // MicroMod USBHOST_D- (PB14)
{ MP_ROM_QSTR(MP_QSTR_USBHOST_DP), MP_ROM_PTR(&pin_PB15) }, // MicroMod USBHOST_D+ (PB15)
// MicroMod CAN pins
{ MP_ROM_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_PB08) }, // MicroMod CAN_RX (PB8)
{ MP_ROM_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_PB09) }, // MicroMod CAN_TX (PB9)
// Note: MicroMod UART (UART0) is not present in the edge connector pinout
// because the primary debug serial port is exposed as a virtual serial port
// over USB.
// MicroMod UART1 pins
{ MP_ROM_QSTR(MP_QSTR_UART_TX1), MP_ROM_PTR(&pin_PA02) }, // MicroMod UART_TX1 | CircuitPython TX (PA2)
{ MP_ROM_QSTR(MP_QSTR_UART_RX1), MP_ROM_PTR(&pin_PA03) }, // MicroMod UART_RX1 | CircuitPython RX (PA3)
// { MP_ROM_QSTR(MP_QSTR_UART_RTS1), MP_ROM_PTR() }, // MicroMod RTS1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_UART_CTS1), MP_ROM_PTR() }, // MicroMod CTS1 (not connected)
// CircuitPython default UART pins
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA02) }, // CircuitPython TX | MicroMod UART_TX1 (PA2)
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA03) }, // CircuitPython RX | MicroMod UART_RX1 (PA3)
// MicroMod UART2 pins
// { MP_ROM_QSTR(MP_QSTR_UART_TX2), MP_ROM_PTR() }, // MicroMod UART_TX2 (not connected)
// { MP_ROM_QSTR(MP_QSTR_UART_RX2), MP_ROM_PTR() }, // MicroMod UART_RX2 (not connected)
// MicroMod I2C pins
{ MP_ROM_QSTR(MP_QSTR_I2C_SDA), MP_ROM_PTR(&pin_PB11) }, // MicroMod I2C_SDA | CircuitPython SDA (PB11)
{ MP_ROM_QSTR(MP_QSTR_I2C_SCL), MP_ROM_PTR(&pin_PB10) }, // MicroMod I2C_SCL | CircuitPython SCL (PB10)
// CircuitPython default I2C pins
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB11) }, // CircuitPython SDA | MicroMod I2C_SDA (PB11)
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB10) }, // CircuitPython SCL | MicroMod I2C_SCL (PB10)
// MicroMod I2C interrupt pin
{ MP_ROM_QSTR(MP_QSTR_I2C_INT), MP_ROM_PTR(&pin_PB01) }, // MicroMod I2C_INT (PB1)
// MicroMod I2C1 pins
{ MP_ROM_QSTR(MP_QSTR_I2C_SDA1), MP_ROM_PTR(&pin_PB07) }, // MicroMod I2C_SDA1 (PB7)
{ MP_ROM_QSTR(MP_QSTR_I2C_SCL1), MP_ROM_PTR(&pin_PB06) }, // MicroMod I2C_SCL1 (PB6)
// MicroMod SPI pins
{ MP_ROM_QSTR(MP_QSTR_SPI_CIPO), MP_ROM_PTR(&pin_PA06) }, // MicroMod SPI_CIPO | CircuitPython CIPO (PA6)
{ MP_ROM_QSTR(MP_QSTR_SPI_MISO), MP_ROM_PTR(&pin_PA06) }, // MicroMod SPI_MISO | CircuitPython MISO (PA6)
{ MP_ROM_QSTR(MP_QSTR_SPI_COPI), MP_ROM_PTR(&pin_PA07) }, // MicroMod SPI_COPI | CircuitPython COPI | LED_DAT (PA7)
{ MP_ROM_QSTR(MP_QSTR_SPI_MOSI), MP_ROM_PTR(&pin_PA07) }, // MicroMod SPI_MOSI | CircuitPython MOSI (PA7)
{ MP_ROM_QSTR(MP_QSTR_SPI_SCK), MP_ROM_PTR(&pin_PA05) }, // MicroMod SPI_SCK | CircuitPython SCK | LED_CLK (PA5)
{ MP_ROM_QSTR(MP_QSTR_SPI_CS), MP_ROM_PTR(&pin_PA04) }, // MicroMod SPI_CS | CircuitPython CS (PC4)
// CircuitPython default SPI pins
{ MP_ROM_QSTR(MP_QSTR_CIPO), MP_ROM_PTR(&pin_PA06) }, // CircuitPython CIPO | MicroMod SPI_CIPO (PA6)
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, // CircuitPython MISO | MicroMod SPI_MISO (PA6)
{ MP_ROM_QSTR(MP_QSTR_COPI), MP_ROM_PTR(&pin_PA07) }, // CircuitPython COPI | MicroMod SPI_COPI | LED_DAT (PA7)
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA07) }, // CircuitPython MOSI | MicroMod SPI_MOSI (PA7)
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, // CircuitPython SCK | MicroMod SPI_SCK | LED_CLK (PA5)
{ MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_PA04) }, // CircuitPython CS | MicroMod SPI_CS (PC4)
// MicroMod 2-wire serial LED pins
{ MP_ROM_QSTR(MP_QSTR_LED_DAT), MP_ROM_PTR(&pin_PA07) }, // MicroMod LED_DAT | SPI_COPI (PA7)
{ MP_ROM_QSTR(MP_QSTR_LED_CLK), MP_ROM_PTR(&pin_PA05) }, // MicroMod LED_CLK | SPI_SCK (PA5)
// MicroMod SDIO pins
// { MP_ROM_QSTR(MP_QSTR_SDIO_CLK), MP_ROM_PTR() }, // MicroMod SDIO_SCK | SPI_SCK1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SDIO_CMD), MP_ROM_PTR() }, // MicroMod SDIO_CMD | SPI_COPI1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SDIO_DATA0), MP_ROM_PTR() }, // MicroMod SDIO_DATA0 | SPI_CIPO1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SDIO_DATA1), MP_ROM_PTR() }, // MicroMod SDIO_DATA1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SDIO_DATA2), MP_ROM_PTR() }, // MicroMod SDIO_DATA2 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SDIO_DATA3), MP_ROM_PTR() }, // MicroMod SDIO_DATA3 | SPI_CS1 (not connected)
// MicroMod SPI1 pins
// { MP_ROM_QSTR(MP_QSTR_SPI_CIPO1), MP_ROM_PTR() }, // MicroMod SPI_CIPO1 | SDIO_DATA0 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SPI_MISO1), MP_ROM_PTR() }, // MicroMod SPI_MISO1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SPI_COPI1), MP_ROM_PTR() }, // MicroMod SPI_COPI1 | SDIO_CMD (not connected)
// { MP_ROM_QSTR(MP_QSTR_SPI_MOSI1), MP_ROM_PTR() }, // MicroMod SPI_MOSI1 (not connected)
// { MP_ROM_QSTR(MP_QSTR_SPI_SCK1), MP_ROM_PTR() }, // MicroMod SPI_SCK1 | SDIO_SCK (not connected)
// { MP_ROM_QSTR(MP_QSTR_SPI_CS1), MP_ROM_PTR() }, // MicroMod SPI_CS1 | SDIO_DATA3 (not connected)
// MicroMod audio pins
// { MP_ROM_QSTR(MP_QSTR_AUD_MCLK), MP_ROM_PTR() }, // MicroMod AUD_MCLK (not connected)
// { MP_ROM_QSTR(MP_QSTR_AUD_OUT), MP_ROM_PTR(&pin_PB04) }, // MicroMod AUD_OUT | I2S_OUT | PCM_OUT | CAM_MCLK (PB4)
// { MP_ROM_QSTR(MP_QSTR_AUD_IN), MP_ROM_PTR(&pin_PB05) }, // MicroMod AUD_IN | I2S_IN | PCM_IN | CAM_PCLK (PB5)
// { MP_ROM_QSTR(MP_QSTR_AUD_LRCLK), MP_ROM_PTR(&pin_PA04) }, // MicroMod AUD_LRCLK | I2S_WS | PCM_SYNC | PDM_DATA (PA4)
// { MP_ROM_QSTR(MP_QSTR_AUD_BCLK), MP_ROM_PTR(&pin_PB03) }, // MicroMod AUD_BCLK | I2S_SCK | PCM_CLK | PDM_CLK (PB3)
// MicroMod I2S pins
{ MP_ROM_QSTR(MP_QSTR_I2S_OUT), MP_ROM_PTR(&pin_PB04) }, // MicroMod I2S_OUT | AUD_OUT | PCM_OUT | CAM_MCLK (PB4)
{ MP_ROM_QSTR(MP_QSTR_I2S_IN), MP_ROM_PTR(&pin_PB05) }, // MicroMod I2S_IN | AUD_IN | PCM_IN | CAM_PCLK (PB5)
{ MP_ROM_QSTR(MP_QSTR_I2S_WS), MP_ROM_PTR(&pin_PA04) }, // MicroMod I2S_WS | AUD_LRCLK | PCM_SYNC | PDM_DATA (PA4)
{ MP_ROM_QSTR(MP_QSTR_I2S_SCK), MP_ROM_PTR(&pin_PB03) }, // MicroMod I2S_SCK | AUD_BCLK | PCM_CLK | PDM_CLK (PB3)
// MicroMod PCM pins
{ MP_ROM_QSTR(MP_QSTR_PCM_OUT), MP_ROM_PTR(&pin_PB04) }, // MicroMod PCM_OUT | AUD_OUT | I2S_OUT | CAM_MCLK (PB4)
{ MP_ROM_QSTR(MP_QSTR_PCM_IN), MP_ROM_PTR(&pin_PB05) }, // MicroMod PCM_IN | AUD_IN | I2S_IN | CAM_PCLK (PB5)
{ MP_ROM_QSTR(MP_QSTR_PCM_SYNC), MP_ROM_PTR(&pin_PA04) }, // MicroMod PCM_SYNC | AUD_LRCLK | I2S_WS | PDM_DATA (PA4)
{ MP_ROM_QSTR(MP_QSTR_PCM_CLK), MP_ROM_PTR(&pin_PB03) }, // MicroMod PCM_CLK | AUD_BCLK | I2S_SCK | PDM_CLK (PB3)
// MicroMod PDM pins
{ MP_ROM_QSTR(MP_QSTR_PDM_DATA), MP_ROM_PTR(&pin_PA04) }, // MicroMod PDM_DATA | AUD_LRCLK | I2S_WS | PCM_SYNC (PA4)
{ MP_ROM_QSTR(MP_QSTR_PDM_CLK), MP_ROM_PTR(&pin_PB03) }, // MicroMod PDM_CLK | AUD_BCLK | I2S_SCK | PCM_CLK (PB3)
// MicroMod SWD pins
{ MP_ROM_QSTR(MP_QSTR_SWDIO), MP_ROM_PTR(&pin_PA13) }, // MicroMod SWDIO (PA13)
{ MP_ROM_QSTR(MP_QSTR_SWCLK), MP_ROM_PTR(&pin_PA14) }, // MicroMod SWDCK (PA14)
// { MP_ROM_QSTR(MP_QSTR_SWO), MP_ROM_PTR() }, // MicroMod SWO | G11 (not connected)
// MicroMod ADC pins
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PC05) }, // MicroMod A0 (PC5)
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB00) }, // MicroMod A1 (PB0)
// MicroMod PWM pins
{ MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_PC06) }, // MicroMod PWM0 (PC6)
{ MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_PC07) }, // MicroMod PWM1 (PC7)
// MicroMod digital pins
{ MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PC00) }, // MicroMod D0 (PC0)
{ MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PC01) }, // MicroMod D1 | CAM_TRIG (PC1)
// MicroMod general purpose pins
{ MP_ROM_QSTR(MP_QSTR_G0), MP_ROM_PTR(&pin_PD02) }, // MicroMod G0 | BUS0 (PD2)
{ MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_PA08) }, // MicroMod G1 | BUS1 (PA8)
{ MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_PA00) }, // MicroMod G2 | BUS2 (PA0)
{ MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_PC08) }, // MicroMod G3 | BUS3 (PC8)
{ MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_PC09) }, // MicroMod G4 | BUS4 (PC9)
{ MP_ROM_QSTR(MP_QSTR_G5), MP_ROM_PTR(&pin_PC13) }, // MicroMod G5 | BUS5 (PC13)
{ MP_ROM_QSTR(MP_QSTR_G6), MP_ROM_PTR(&pin_PC02) }, // MicroMod G6 | BUS6 (PC2)
// { MP_ROM_QSTR(MP_QSTR_G7), MP_ROM_PTR() }, // MicroMod G7 | BUS7 (not connected)
// { MP_ROM_QSTR(MP_QSTR_G8), MP_ROM_PTR() }, // MicroMod G8 (not connected)
// { MP_ROM_QSTR(MP_QSTR_G9), MP_ROM_PTR() }, // MicroMod G9 | ADC_D- | CAM_HSYNC (not connected)
{ MP_ROM_QSTR(MP_QSTR_G10), MP_ROM_PTR(&pin_PB13) }, // MicroMod G10 | ADC_D+ | CAM_VSYNC (PB13)
{ MP_ROM_QSTR(MP_QSTR_G11), MP_ROM_PTR(&pin_PB12) }, // MicroMod G11 | SWO (PB12)
// MicroMod 8-bit bus pins
{ MP_ROM_QSTR(MP_QSTR_BUS0), MP_ROM_PTR(&pin_PD02) }, // MicroMod BUS0 | G0 (PD2)
{ MP_ROM_QSTR(MP_QSTR_BUS1), MP_ROM_PTR(&pin_PA08) }, // MicroMod BUS1 | G1 (PA8)
{ MP_ROM_QSTR(MP_QSTR_BUS2), MP_ROM_PTR(&pin_PA00) }, // MicroMod BUS2 | G2 (PA0)
{ MP_ROM_QSTR(MP_QSTR_BUS3), MP_ROM_PTR(&pin_PC08) }, // MicroMod BUS3 | G3 (PC8)
{ MP_ROM_QSTR(MP_QSTR_BUS4), MP_ROM_PTR(&pin_PC09) }, // MicroMod BUS4 | G4 (PC9)
{ MP_ROM_QSTR(MP_QSTR_BUS5), MP_ROM_PTR(&pin_PC13) }, // MicroMod BUS5 | G5 (PC13)
{ MP_ROM_QSTR(MP_QSTR_BUS6), MP_ROM_PTR(&pin_PC02) }, // MicroMod BUS6 | G6 (PC2)
// { MP_ROM_QSTR(MP_QSTR_BUS7), MP_ROM_PTR() }, // MicroMod BUS7 | G7 (not connected)
// MicroMod differential ADC input pins
// { MP_ROM_QSTR(MP_QSTR_ADC_DM), MP_ROM_PTR() }, // MicroMod ADC_D- | G9 | CAM_HSYNC (not connected)
// { MP_ROM_QSTR(MP_QSTR_ADC_DP), MP_ROM_PTR(&pin_PB13) }, // MicroMod ADC_D+ | G10 | CAM_VSYNC (PB13)
// MicroMod camera pins
// { MP_ROM_QSTR(MP_QSTR_CAM_MCLK), MP_ROM_PTR(&pin_PB04) }, // MicroMod CAM_MCLK | AUD_OUT | I2S_OUT | PCM_OUT (PB4)
// { MP_ROM_QSTR(MP_QSTR_CAM_PCLK), MP_ROM_PTR(&pin_PB05) }, // MicroMod CAM_PCLK | AUD_IN | I2S_IN | PCM_IN (PB5)
// { MP_ROM_QSTR(MP_QSTR_CAM_TRIG), MP_ROM_PTR(&pin_PC01) }, // MicroMod CAM_TRIG | D1 (PC1)
// { MP_ROM_QSTR(MP_QSTR_CAM_HSYNC), MP_ROM_PTR() }, // MicroMod CAM_HSYNC | ADC_D- | G9 (not connected)
// { MP_ROM_QSTR(MP_QSTR_CAM_VSYNC), MP_ROM_PTR(&pin_PB13) }, // MicroMod CAM_VSYNC | ADC_D+ | G10 (PB13)
// Module-specific aliases (not part of the MicroMod spec)
{ MP_ROM_QSTR(MP_QSTR_HOST_VBUS), MP_ROM_PTR(&pin_PB13) }, // HOST_VBUS | G10 | ADC_D+ | CAM_VSYNC (PB13)
{ MP_ROM_QSTR(MP_QSTR_HOST_ID), MP_ROM_PTR(&pin_PB12) }, // HOST_ID | G11 | SWO (PB12)
// CircuitPython board objects
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, // CircuitPython I2C
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, // CircuitPython SPI
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, // CircuitPython UART
};
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

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@ -188,6 +188,9 @@ endif
ifeq ($(CIRCUITPY_GAMEPADSHIFT),1)
SRC_PATTERNS += gamepadshift/%
endif
ifeq ($(CIRCUITPY_GETPASS),1)
SRC_PATTERNS += getpass/%
endif
ifeq ($(CIRCUITPY_GNSS),1)
SRC_PATTERNS += gnss/%
endif
@ -519,6 +522,7 @@ SRC_SHARED_MODULE_ALL = \
fontio/__init__.c \
framebufferio/FramebufferDisplay.c \
framebufferio/__init__.c \
getpass/__init__.c \
ipaddress/IPv4Address.c \
ipaddress/__init__.c \
keypad/__init__.c \

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@ -483,6 +483,13 @@ extern const struct _mp_obj_module_t gamepadshift_module;
#define GAMEPAD_ROOT_POINTERS
#endif
#if CIRCUITPY_GETPASS
extern const struct _mp_obj_module_t getpass_module;
#define GETPASS_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_getpass), (mp_obj_t)&getpass_module },
#else
#define GETPASS_MODULE
#endif
#if CIRCUITPY_GNSS
extern const struct _mp_obj_module_t gnss_module;
#define GNSS_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_gnss), (mp_obj_t)&gnss_module },
@ -896,6 +903,7 @@ extern const struct _mp_obj_module_t msgpack_module;
FRAMEBUFFERIO_MODULE \
FREQUENCYIO_MODULE \
GAMEPADSHIFT_MODULE \
GETPASS_MODULE \
GNSS_MODULE \
I2CPERIPHERAL_MODULE \
IPADDRESS_MODULE \

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@ -190,6 +190,9 @@ CFLAGS += -DCIRCUITPY_FREQUENCYIO=$(CIRCUITPY_FREQUENCYIO)
CIRCUITPY_GAMEPADSHIFT ?= 0
CFLAGS += -DCIRCUITPY_GAMEPADSHIFT=$(CIRCUITPY_GAMEPADSHIFT)
CIRCUITPY_GETPASS ?= 1
CFLAGS += -DCIRCUITPY_GETPASS=$(CIRCUITPY_GETPASS)
CIRCUITPY_GNSS ?= 0
CFLAGS += -DCIRCUITPY_GNSS=$(CIRCUITPY_GNSS)

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@ -0,0 +1,86 @@
/*
* This file is part of the Micro Python project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2021 microDev
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "py/stream.h"
#include "shared-module/getpass/__init__.h"
//| """Getpass Module
//|
//| This module provides a way to get input from user without echoing it.
//|
//| """
//| ...
//|
//| def getpass(prompt: Optional[str] = 'Password: ', stream: Optional[io.FileIO] = None) -> str:
//|
//| """Prompt the user without echoing.
//|
//| :param str prompt: The user is prompted using the string ``prompt``, which defaults to ``'Password: '``.
//| :param io.FileIO stream: The ``prompt`` is written to the file-like object ``stream`` if provided.
//|
//| """
//| ...
//|
STATIC mp_obj_t getpass_getpass(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
enum { ARG_prompt, ARG_stream };
static const mp_arg_t allowed_args[] = {
{ MP_QSTR_prompt, MP_ARG_OBJ, {.u_obj = mp_const_none} },
{ MP_QSTR_stream, MP_ARG_OBJ, {.u_obj = mp_const_none} },
};
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
const char *prompt = (args[ARG_prompt].u_obj == mp_const_none) ? "Password: " : mp_obj_str_get_str(args[ARG_prompt].u_obj);
mp_print_t print = {.data = NULL};
if (args[ARG_stream].u_obj != mp_const_none) {
#if MICROPY_PY_IO && MICROPY_PY_SYS_STDFILES
mp_get_stream_raise(args[ARG_stream].u_obj, MP_STREAM_OP_WRITE);
print.data = MP_OBJ_TO_PTR(args[ARG_stream].u_obj);
print.print_strn = mp_stream_write_adaptor;
#else
mp_raise_NotImplementedError(translate("stream operation not supported"));
#endif
}
return shared_module_getpass_getpass(prompt, ((print.data) ? &print : NULL));
}
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(getpass_getpass_obj, 0, getpass_getpass);
STATIC const mp_rom_map_elem_t getpass_module_globals_table[] = {
// module name
{ MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_getpass) },
// module functions
{ MP_ROM_QSTR(MP_QSTR_getpass), MP_ROM_PTR(&getpass_getpass_obj) },
};
STATIC MP_DEFINE_CONST_DICT(getpass_module_globals, getpass_module_globals_table);
const mp_obj_module_t getpass_module = {
.base = { &mp_type_module },
.globals = (mp_obj_dict_t *)&getpass_module_globals,
};

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@ -206,7 +206,7 @@ audioio_get_buffer_result_t audioio_wavefile_get_buffer(audioio_wavefile_obj_t *
}
if (need_more_data) {
uint16_t num_bytes_to_load = self->len;
uint32_t num_bytes_to_load = self->len;
if (num_bytes_to_load > self->bytes_remaining) {
num_bytes_to_load = self->bytes_remaining;
}

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@ -0,0 +1,61 @@
/*
* This file is part of the Micro Python project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2021 microDev
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "py/mphal.h"
#include "lib/mp-readline/readline.h"
#include "shared-module/getpass/__init__.h"
mp_obj_t shared_module_getpass_getpass(const char *prompt, mp_print_t *print) {
vstr_t vstr;
vstr_init(&vstr, 16);
if (print == NULL) {
mp_hal_stdout_tx_str(prompt);
} else {
mp_printf(print, prompt);
}
for (;;) {
int c = mp_hal_stdin_rx_chr();
if (c == CHAR_CTRL_C) {
mp_raise_type(&mp_type_KeyboardInterrupt);
} else if (c == CHAR_CTRL_D && vstr.len == 0) {
mp_raise_type(&mp_type_EOFError);
} else if (c == 8 || c == 127) {
// backspace
vstr_cut_tail_bytes(&vstr, 1);
} else if (c >= 32) {
// printable character
vstr_ins_char(&vstr, vstr.len, c);
} else if (c == '\r') {
// newline
mp_hal_stdout_tx_str("\r\n");
break;
}
}
return mp_obj_new_str_from_vstr(&mp_type_str, &vstr);
}

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@ -0,0 +1,34 @@
/*
* This file is part of the Micro Python project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2021 microDev
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef MICROPY_INCLUDED_SHARED_MODULE_GETPASS___INIT___H
#define MICROPY_INCLUDED_SHARED_MODULE_GETPASS___INIT___H
#include "py/runtime.h"
extern mp_obj_t shared_module_getpass_getpass(const char *prompt, mp_print_t *print);
#endif // MICROPY_INCLUDED_SHARED_MODULE_GETPASS___INIT___H

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@ -77,8 +77,6 @@ void common_hal_keypad_keymatrix_construct(keypad_keymatrix_obj_t *self, mp_uint
// Add self to the list of active keypad scanners.
keypad_register_scanner((keypad_scanner_obj_t *)self);
supervisor_enable_tick();
}
void common_hal_keypad_keymatrix_deinit(keypad_keymatrix_obj_t *self) {

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@ -63,8 +63,6 @@ void common_hal_keypad_keys_construct(keypad_keys_obj_t *self, mp_uint_t num_pin
// Add self to the list of active keypad scanners.
keypad_register_scanner((keypad_scanner_obj_t *)self);
supervisor_enable_tick();
}
void common_hal_keypad_keys_deinit(keypad_keys_obj_t *self) {

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@ -71,8 +71,6 @@ void common_hal_keypad_shiftregisterkeys_construct(keypad_shiftregisterkeys_obj_
// Add self to the list of active keypad scanners.
keypad_register_scanner((keypad_scanner_obj_t *)self);
supervisor_enable_tick();
}
void common_hal_keypad_shiftregisterkeys_deinit(keypad_shiftregisterkeys_obj_t *self) {

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@ -57,12 +57,9 @@ void keypad_tick(void) {
}
void keypad_reset(void) {
if (MP_STATE_VM(keypad_scanners_linked_list)) {
supervisor_disable_tick();
while (MP_STATE_VM(keypad_scanners_linked_list)) {
keypad_deregister_scanner(MP_STATE_VM(keypad_scanners_linked_list));
}
MP_STATE_VM(keypad_scanners_linked_list) = NULL;
keypad_scanners_linked_list_lock = false;
}
// Register a Keys, KeyMatrix, etc. that will be scanned in the background
@ -71,10 +68,16 @@ void keypad_register_scanner(keypad_scanner_obj_t *scanner) {
scanner->next = MP_STATE_VM(keypad_scanners_linked_list);
MP_STATE_VM(keypad_scanners_linked_list) = scanner;
supervisor_release_lock(&keypad_scanners_linked_list_lock);
// One more request for ticks.
supervisor_enable_tick();
}
// Remove scanner from the list of active scanners.
void keypad_deregister_scanner(keypad_scanner_obj_t *scanner) {
// One less request for ticks.
supervisor_disable_tick();
supervisor_acquire_lock(&keypad_scanners_linked_list_lock);
if (MP_STATE_VM(keypad_scanners_linked_list) == scanner) {
// Scanner is at the front; splice it out.