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nrf: Remove nRF51 boards and files, update README

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This commit is contained in:
arturo182 2018-02-07 20:40:44 +01:00
parent 29ae4cdd1c
commit 05bd5d4ee6
63 changed files with 19 additions and 9466 deletions
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49
ports/nrf/README.md
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@ -1,6 +1,6 @@
# MicroPython Port To The Nordic Semiconductor nRF Series
# CircuitPython Port To The Nordic Semiconductor nRF52 Series
This is a port of MicroPython to the Nordic Semiconductor nRF series of chips.
This is a port of CircuitPython to the Nordic Semiconductor nRF52 series of chips.
## Supported Features
@ -10,30 +10,21 @@ This is a port of MicroPython to the Nordic Semiconductor nRF series of chips.
* Pins
* ADC
* I2C
* PWM (nRF52 only)
* PWM
* Temperature
* RTC (Real Time Counter. Low-Power counter)
* BLE support including:
* Peripheral role on nrf51 targets
* Central role and Peripheral role on nrf52 targets
* Peripheral role
* Scanner role
* _REPL over Bluetooth LE_ (optionally using WebBluetooth)
* ubluepy: Bluetooth LE module for MicroPython
* ubluepy: Bluetooth LE module for CircuitPython
* 1 non-connectable advertiser while in connection
## Tested Hardware
* nRF51
* [micro:bit](http://microbit.org/)
* PCA10000 (dongle)
* PCA10001
* PCA10028
* PCA10031 (dongle)
* [WT51822-S4AT](http://www.wireless-tag.com/wireless_module/BLE/WT51822-S4AT.html)
* nRF52832
* [PCA10040](http://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.nrf52%2Fdita%2Fnrf52%2Fdevelopment%2Fnrf52_dev_kit.html)
* [Adafruit Feather nRF52](https://www.adafruit.com/product/3406)
* [Thingy:52](http://www.nordicsemi.com/eng/Products/Nordic-Thingy-52)
* [Arduino Primo](http://www.arduino.org/products/boards/arduino-primo)
* nRF52840
* [PCA10056](http://www.nordicsemi.com/eng/Products/nRF52840-Preview-DK)
@ -41,19 +32,19 @@ This is a port of MicroPython to the Nordic Semiconductor nRF series of chips.
Prerequisite steps for building the nrf port:
git clone <URL>.git micropython
cd micropython
git clone <URL>.git circuitpython
cd circuitpython
git submodule update --init
make -C mpy-cross
By default, the PCA10040 (nrf52832) is used as compile target. To build and flash issue the following command inside the ports/nrf/ folder:
By default, the feather52 (nRF52832) is used as compile target. To build and flash issue the following command inside the ports/nrf/ folder:
make
make flash
Alternatively the target board could be defined:
make BOARD=pca10040
make BOARD=pca10056
make flash
## Compile and Flash with Bluetooth Stack
@ -76,16 +67,9 @@ Note: further tuning of features to include in bluetooth or even setting up the
Target Board (BOARD) | Bluetooth Stack (SD) | Bluetooth Support | Flash Util
---------------------|-------------------------|------------------------|-------------------------------
microbit | s110 | Peripheral | [PyOCD](#pyocdopenocd-targets)
pca10000 | s110 | Peripheral | [Segger](#segger-targets)
pca10001 | s110 | Peripheral | [Segger](#segger-targets)
pca10028 | s110 | Peripheral | [Segger](#segger-targets)
pca10031 | s110 | Peripheral | [Segger](#segger-targets)
wt51822_s4at | s110 | Peripheral | Manual, see [datasheet](https://4tronix.co.uk/picobot2/WT51822-S4AT.pdf) for pinout
pca10040 | s132 | Peripheral and Central | [Segger](#segger-targets)
feather52 | s132 | Peripheral and Central | [UART DFU](#dfu-targets)
arduino_primo | s132 | Peripheral and Central | [PyOCD](#pyocdopenocd-targets)
pca10056 | s140 | Peripheral | [Segger](#segger-targets)
pca10040 | s132 | Peripheral and Scanner | [Segger](#segger-targets)
feather52 | s132 | Peripheral and Scanner | [UART DFU](#dfu-targets)
pca10056 | s140 | Peripheral and Scanner | [Segger](#segger-targets)
## Segger Targets
@ -103,13 +87,6 @@ Install the necessary tools to flash and debug using Segger:
note: On Linux it might be required to link SEGGER's `libjlinkarm.so` inside nrfjprog's folder.
## PyOCD/OpenOCD Targets
Install the necessary tools to flash and debug using OpenOCD:
sudo apt-get install openocd
sudo pip install pyOCD
## DFU Targets
sudo apt-get install build-essential libffi-dev pkg-config gcc-arm-none-eabi git python python-pip

79
ports/nrf/boards/arduino_primo/mpconfigboard.h
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@ -1,79 +0,0 @@
/*
* This file is part of the Micro Python project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2017 Glenn Ruben Bakke
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#define MICROPY_HW_BOARD_NAME "Arduino Primo"
#define MICROPY_HW_MCU_NAME "NRF52832"
#define MICROPY_PY_SYS_PLATFORM "nrf52"
#define MICROPY_PY_MACHINE_SOFT_PWM (1)
#define MICROPY_PY_MUSIC (1)
#define MICROPY_PY_MACHINE_HW_PWM (1)
#define MICROPY_PY_MACHINE_HW_SPI (1)
#define MICROPY_PY_MACHINE_TIMER (1)
#define MICROPY_PY_MACHINE_RTC (1)
#define MICROPY_PY_MACHINE_I2C (1)
#define MICROPY_PY_MACHINE_ADC (1)
#define MICROPY_PY_MACHINE_TEMP (1)
#define MICROPY_HW_HAS_LED (1)
#define MICROPY_HW_HAS_SWITCH (0)
#define MICROPY_HW_HAS_FLASH (0)
#define MICROPY_HW_HAS_SDCARD (0)
#define MICROPY_HW_HAS_MMA7660 (0)
#define MICROPY_HW_HAS_LIS3DSH (0)
#define MICROPY_HW_HAS_LCD (0)
#define MICROPY_HW_ENABLE_RNG (0)
#define MICROPY_HW_ENABLE_RTC (0)
#define MICROPY_HW_ENABLE_TIMER (0)
#define MICROPY_HW_ENABLE_SERVO (0)
#define MICROPY_HW_ENABLE_DAC (0)
#define MICROPY_HW_ENABLE_CAN (0)
#define MICROPY_HW_LED_COUNT (1)
#define MICROPY_HW_LED_PULLUP (0)
#define MICROPY_HW_LED1 (20) // LED1
// UART config
#define MICROPY_HW_UART1_RX (pin_A11)
#define MICROPY_HW_UART1_TX (pin_A12)
#define MICROPY_HW_UART1_HWFC (0)
// SPI0 config
#define MICROPY_HW_SPI0_NAME "SPI0"
#define MICROPY_HW_SPI0_SCK (pin_A25) // (Arduino D13)
#define MICROPY_HW_SPI0_MOSI (pin_A23) // (Arduino D11)
#define MICROPY_HW_SPI0_MISO (pin_A24) // (Arduino D12)
#define MICROPY_HW_PWM0_NAME "PWM0"
#define MICROPY_HW_PWM1_NAME "PWM1"
#define MICROPY_HW_PWM2_NAME "PWM2"
// buzzer pin
#define MICROPY_HW_MUSIC_PIN (pin_A8)
#define HELP_TEXT_BOARD_LED "1"

7
ports/nrf/boards/arduino_primo/mpconfigboard.mk
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@ -1,7 +0,0 @@
MCU_SERIES = m4
MCU_VARIANT = nrf52
MCU_SUB_VARIANT = nrf52832
LD_FILE = boards/nrf52832_512k_64k.ld
FLASHER = pyocd
NRF_DEFINES += -DNRF52832_XXAA

9
ports/nrf/boards/arduino_primo/mpconfigboard_s132.mk
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@ -1,9 +0,0 @@
MCU_SERIES = m4
MCU_VARIANT = nrf52
MCU_SUB_VARIANT = nrf52832
SOFTDEV_VERSION = 3.0.0
FLASHER=pyocd
LD_FILE = boards/nrf52832_512k_64k_s132_$(SOFTDEV_VERSION).ld
NRF_DEFINES += -DNRF52832_XXAA

17
ports/nrf/boards/arduino_primo/nrf52_hal_conf.h
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@ -1,17 +0,0 @@
#ifndef NRF52_HAL_CONF_H__
#define NRF52_HAL_CONF_H__
#define HAL_UART_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
#define HAL_TIME_MODULE_ENABLED
#define HAL_PWM_MODULE_ENABLED
#define HAL_RTC_MODULE_ENABLED
#define HAL_TIMER_MODULE_ENABLED
#define HAL_TWI_MODULE_ENABLED
#define HAL_ADCE_MODULE_ENABLED
#define HAL_TEMP_MODULE_ENABLED
// #define HAL_UARTE_MODULE_ENABLED
// #define HAL_SPIE_MODULE_ENABLED
// #define HAL_TWIE_MODULE_ENABLED
#endif // NRF52_HAL_CONF_H__

30
ports/nrf/boards/arduino_primo/pins.csv
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@ -1,30 +0,0 @@
PA2,PA2
PA3,PA3
PA4,PA4
PA5,PA5
PA6,PA6
PA7,PA7
PA8,PA8
PA9,PA9
PA10,PA10
PA11,PA11
PA12,PA12
PA13,PA13
PA14,PA14
PA15,PA15
PA16,PA16
PA17,PA17
PA18,PA18
PA19,PA19
PA20,PA20
PA21,PA21
PA22,PA22
PA23,PA23
PA24,PA24
PA25,PA25
PA26,PA26
PA27,PA27
PA28,PA28
PA29,PA29
PA30,PA30
PA31,PA31
1 PA2 PA2
2 PA3 PA3
3 PA4 PA4
4 PA5 PA5
5 PA6 PA6
6 PA7 PA7
7 PA8 PA8
8 PA9 PA9
9 PA10 PA10
10 PA11 PA11
11 PA12 PA12
12 PA13 PA13
13 PA14 PA14
14 PA15 PA15
15 PA16 PA16
16 PA17 PA17
17 PA18 PA18
18 PA19 PA19
19 PA20 PA20
20 PA21 PA21
21 PA22 PA22
22 PA23 PA23
23 PA24 PA24
24 PA25 PA25
25 PA26 PA26
26 PA27 PA27
27 PA28 PA28
28 PA29 PA29
29 PA30 PA30
30 PA31 PA31

78
ports/nrf/boards/dvk_bl652/mpconfigboard.h
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@ -1,78 +0,0 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2016 Glenn Ruben Bakke
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#define DVK_BL652
#define MICROPY_HW_BOARD_NAME "DVK-BL652"
#define MICROPY_HW_MCU_NAME "NRF52832"
#define MICROPY_PY_SYS_PLATFORM "bl652"
#define MICROPY_PY_MACHINE_PWM (1)
#define MICROPY_PY_MACHINE_HW_SPI (1)
#define MICROPY_PY_MACHINE_TIMER (1)
#define MICROPY_PY_MACHINE_RTC (1)
#define MICROPY_PY_MACHINE_I2C (1)
#define MICROPY_PY_MACHINE_ADC (1)
#define MICROPY_PY_MACHINE_TEMP (1)
#define MICROPY_HW_HAS_LED (1)
#define MICROPY_HW_HAS_SWITCH (0)
#define MICROPY_HW_HAS_FLASH (0)
#define MICROPY_HW_HAS_SDCARD (0)
#define MICROPY_HW_HAS_MMA7660 (0)
#define MICROPY_HW_HAS_LIS3DSH (0)
#define MICROPY_HW_HAS_LCD (0)
#define MICROPY_HW_ENABLE_RNG (0)
#define MICROPY_HW_ENABLE_RTC (0)
#define MICROPY_HW_ENABLE_TIMER (0)
#define MICROPY_HW_ENABLE_SERVO (0)
#define MICROPY_HW_ENABLE_DAC (0)
#define MICROPY_HW_ENABLE_CAN (0)
#define MICROPY_HW_LED_COUNT (2)
#define MICROPY_HW_LED_PULLUP (0)
#define MICROPY_HW_LED1 (17) // LED1
#define MICROPY_HW_LED2 (19) // LED2
// UART config
#define MICROPY_HW_UART1_RX (pin_A8)
#define MICROPY_HW_UART1_TX (pin_A6)
#define MICROPY_HW_UART1_CTS (pin_A7)
#define MICROPY_HW_UART1_RTS (pin_A5)
#define MICROPY_HW_UART1_HWFC (1)
// SPI0 config
#define MICROPY_HW_SPI0_NAME "SPI0"
#define MICROPY_HW_SPI0_SCK (pin_A25)
#define MICROPY_HW_SPI0_MOSI (pin_A23)
#define MICROPY_HW_SPI0_MISO (pin_A24)
#define MICROPY_HW_PWM0_NAME "PWM0"
#define MICROPY_HW_PWM1_NAME "PWM1"
#define MICROPY_HW_PWM2_NAME "PWM2"
#define HELP_TEXT_BOARD_LED "1,2"

6
ports/nrf/boards/dvk_bl652/mpconfigboard.mk
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@ -1,6 +0,0 @@
MCU_SERIES = m4
MCU_VARIANT = nrf52
MCU_SUB_VARIANT = nrf52832
LD_FILE = boards/nrf52832_512k_64k.ld
NRF_DEFINES += -DNRF52832_XXAA

10
ports/nrf/boards/dvk_bl652/mpconfigboard_s132.mk
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@ -1,10 +0,0 @@
MCU_SERIES = m4
MCU_VARIANT = nrf52
MCU_SUB_VARIANT = nrf52832
SOFTDEV_VERSION = 3.0.0
LD_FILE = boards/nrf52832_512k_64k_s132_$(SOFTDEV_VERSION).ld
NRF_DEFINES += -DNRF52832_XXAA
CFLAGS += -DBLUETOOTH_LFCLK_RC

18
ports/nrf/boards/dvk_bl652/nrf52_hal_conf.h
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@ -1,18 +0,0 @@
#ifndef NRF52_HAL_CONF_H__
#define NRF52_HAL_CONF_H__
#define HAL_UART_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
#define HAL_TIME_MODULE_ENABLED
#define HAL_PWM_MODULE_ENABLED
#define HAL_RTC_MODULE_ENABLED
#define HAL_TIMER_MODULE_ENABLED
#define HAL_TWI_MODULE_ENABLED
#define HAL_ADCE_MODULE_ENABLED
#define HAL_TEMP_MODULE_ENABLED
#define HAL_RNG_MODULE_ENABLED
// #define HAL_UARTE_MODULE_ENABLED
// #define HAL_SPIE_MODULE_ENABLED
// #define HAL_TWIE_MODULE_ENABLED
#endif // NRF52_HAL_CONF_H__

31
ports/nrf/boards/dvk_bl652/pins.csv
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@ -1,31 +0,0 @@
PA2,PA2
PA3,PA3
PA4,PA4
UART_RTS,PA5
UART_TX,PA6
UART_CTS,PA7
UART_RX,PA8
PA9,PA9
PA10,PA10
PA11,PA11
PA12,PA12
PA13,PA13
PA14,PA14
PA15,PA15
PA16,PA16
PA17,PA17
PA18,PA18
PA19,PA19
PA20,PA20
PA21,PA21
PA22,PA22
PA23,PA23
PA24,PA24
PA25,PA25
PA26,PA26
PA27,PA27
PA28,PA28
PA29,PA29
PA30,PA30
PA31,PA31
1 PA2 PA2
2 PA3 PA3
3 PA4 PA4
4 UART_RTS PA5
5 UART_TX PA6
6 UART_CTS PA7
7 UART_RX PA8
8 PA9 PA9
9 PA10 PA10
10 PA11 PA11
11 PA12 PA12
12 PA13 PA13
13 PA14 PA14
14 PA15 PA15
15 PA16 PA16
16 PA17 PA17
17 PA18 PA18
18 PA19 PA19
19 PA20 PA20
20 PA21 PA21
21 PA22 PA22
22 PA23 PA23
23 PA24 PA24
24 PA25 PA25
25 PA26 PA26
26 PA27 PA27
27 PA28 PA28
28 PA29 PA29
29 PA30 PA30
30 PA31 PA31

68
ports/nrf/boards/microbit/mpconfigboard.h
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@ -1,68 +0,0 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2017 Glenn Ruben Bakke
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#define PCA10028
#define MICROPY_HW_BOARD_NAME "micro:bit"
#define MICROPY_HW_MCU_NAME "NRF51822"
#define MICROPY_PY_SYS_PLATFORM "nrf51"
#define MICROPY_PY_MUSIC (0)
#define MICROPY_PY_MACHINE_SOFT_PWM (0)
#define MICROPY_PY_MACHINE_HW_SPI (1)
#define MICROPY_PY_MACHINE_TIMER (1)
#define MICROPY_PY_MACHINE_RTC (1)
#define MICROPY_PY_MACHINE_I2C (0)
#define MICROPY_PY_MACHINE_ADC (1)
#define MICROPY_PY_MACHINE_TEMP (1)
#define MICROPY_HW_HAS_LED (0)
#define MICROPY_HW_HAS_SWITCH (0)
#define MICROPY_HW_HAS_FLASH (0)
#define MICROPY_HW_HAS_SDCARD (0)
#define MICROPY_HW_HAS_MMA7660 (0)
#define MICROPY_HW_HAS_LIS3DSH (0)
#define MICROPY_HW_HAS_LCD (0)
#define MICROPY_HW_ENABLE_RNG (0)
#define MICROPY_HW_ENABLE_RTC (0)
#define MICROPY_HW_ENABLE_TIMER (0)
#define MICROPY_HW_ENABLE_SERVO (0)
#define MICROPY_HW_ENABLE_DAC (0)
#define MICROPY_HW_ENABLE_CAN (0)
// UART config
#define MICROPY_HW_UART1_RX (pin_A25)
#define MICROPY_HW_UART1_TX (pin_A24)
#define MICROPY_HW_UART1_HWFC (0)
// SPI0 config
#define MICROPY_HW_SPI0_NAME "SPI0"
#define MICROPY_HW_SPI0_SCK (pin_A23)
#define MICROPY_HW_SPI0_MOSI (pin_A21)
#define MICROPY_HW_SPI0_MISO (pin_A22)
// micro:bit music pin
#define MICROPY_HW_MUSIC_PIN (pin_A3)

5
ports/nrf/boards/microbit/mpconfigboard.mk
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@ -1,5 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
LD_FILE = boards/nrf51x22_256k_16k.ld
FLASHER = pyocd

8
ports/nrf/boards/microbit/mpconfigboard_s110.mk
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@ -1,8 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
SOFTDEV_VERSION = 8.0.0
LD_FILE = boards/nrf51x22_256k_16k_s110_$(SOFTDEV_VERSION).ld
FLASHER = pyocd
CFLAGS += -DBLUETOOTH_LFCLK_RC

14
ports/nrf/boards/microbit/nrf51_hal_conf.h
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@ -1,14 +0,0 @@
#ifndef NRF51_HAL_CONF_H__
#define NRF51_HAL_CONF_H__
#define HAL_UART_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
#define HAL_TIME_MODULE_ENABLED
#define HAL_RTC_MODULE_ENABLED
#define HAL_TIMER_MODULE_ENABLED
#define HAL_TWI_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
#define HAL_TEMP_MODULE_ENABLED
#define HAL_RNG_MODULE_ENABLED
#endif // NRF51_HAL_CONF_H__

32
ports/nrf/boards/microbit/pins.csv
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@ -1,32 +0,0 @@
I2C_SCL,PA0
PA1,PA1
PA2,PA2
PA3,PA3
PA4,PA4
PA5,PA5
PA6,PA6
PA7,PA7
UART_RTS,PA8
UART_TX,PA9
UART_CTS,PA10
UART_RX,PA11
PA12,PA12
PA13,PA13
PA14,PA14
PA15,PA15
PA16,PA16
PA17,PA17
PA18,PA18
PA19,PA19
PA20,PA20
SPI_MOSI,PA21
SPI_MISO,PA22
SPI_SCK,PA23
PA24,PA24
PA25,PA25
PA26,PA26
PA27,PA27
PA28,PA28
PA29,PA29
I2C_SDA,PA30
PA31,PA31
1 I2C_SCL PA0
2 PA1 PA1
3 PA2 PA2
4 PA3 PA3
5 PA4 PA4
6 PA5 PA5
7 PA6 PA6
8 PA7 PA7
9 UART_RTS PA8
10 UART_TX PA9
11 UART_CTS PA10
12 UART_RX PA11
13 PA12 PA12
14 PA13 PA13
15 PA14 PA14
16 PA15 PA15
17 PA16 PA16
18 PA17 PA17
19 PA18 PA18
20 PA19 PA19
21 PA20 PA20
22 SPI_MOSI PA21
23 SPI_MISO PA22
24 SPI_SCK PA23
25 PA24 PA24
26 PA25 PA25
27 PA26 PA26
28 PA27 PA27
29 PA28 PA28
30 PA29 PA29
31 I2C_SDA PA30
32 PA31 PA31

31
ports/nrf/boards/nrf51_prefix.c
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@ -1,31 +0,0 @@
// nrf51_prefix.c becomes the initial portion of the generated pins file.
#include <stdio.h>
#include "py/obj.h"
#include "py/mphal.h"
#include "pin.h"
#define AF(af_idx, af_fn, af_unit, af_type, af_ptr) \
{ \
{ &pin_af_type }, \
.name = MP_QSTR_AF ## af_idx ## _ ## af_fn ## af_unit, \
.idx = (af_idx), \
.fn = AF_FN_ ## af_fn, \
.unit = (af_unit), \
.type = AF_PIN_TYPE_ ## af_fn ## _ ## af_type, \
.af_fn = (af_ptr) \
}
#define PIN(p_port, p_pin, p_af, p_adc_num, p_adc_channel) \
{ \
{ &pin_type }, \
.name = MP_QSTR_ ## p_port ## p_pin, \
.port = PORT_ ## p_port, \
.pin = (p_pin), \
.num_af = (sizeof(p_af) / sizeof(pin_af_obj_t)), \
.pin_mask = (1 << p_pin), \
.af = p_af, \
.adc_num = p_adc_num, \
.adc_channel = p_adc_channel, \
}

28
ports/nrf/boards/nrf51x22_256k_16k.ld
View File

@ -1,28 +0,0 @@
/*
GNU linker script for NRF52 blank w/ no SoftDevice
*/
/* Specify the memory areas */
SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x040000 /* entire flash, 256 KiB */
FLASH_ISR (rx) : ORIGIN = 0x00000000, LENGTH = 0x000400 /* sector 0, 1 KiB */
FLASH_TEXT (rx) : ORIGIN = 0x00000400, LENGTH = 0x03FC00 /* 255 KiB */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x004000 /* 16 KiB */
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 4K;
_minimum_heap_size = 8K;
/* top end of the stack */
/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_end = 0x20002000; /* tunable */
INCLUDE "boards/common.ld"

28
ports/nrf/boards/nrf51x22_256k_16k_s110_8.0.0.ld
View File

@ -1,28 +0,0 @@
/*
GNU linker script for NRF51822 AA w/ S110 8.0.0 SoftDevice
*/
/* Specify the memory areas */
SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x040000 /* entire flash, 256 KiB */
FLASH_ISR (rx) : ORIGIN = 0x00018000, LENGTH = 0x000400 /* sector 0, 1 KiB */
FLASH_TEXT (rx) : ORIGIN = 0x00018400, LENGTH = 0x027c00 /* 159 KiB */
RAM (xrw) : ORIGIN = 0x20002000, LENGTH = 0x002000 /* 8 KiB */
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 1K;
/* top end of the stack */
/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_end = 0x20003c00; /* tunable */
INCLUDE "boards/common.ld"

28
ports/nrf/boards/nrf51x22_256k_32k.ld
View File

@ -1,28 +0,0 @@
/*
GNU linker script for NRF52 blank w/ no SoftDevice
*/
/* Specify the memory areas */
SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x040000 /* entire flash, 256 KiB */
FLASH_ISR (rx) : ORIGIN = 0x00000000, LENGTH = 0x000400 /* sector 0, 1 KiB */
FLASH_TEXT (rx) : ORIGIN = 0x00000400, LENGTH = 0x03F000 /* 255 KiB */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x008000 /* 32 KiB */
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 4K;
_minimum_heap_size = 24K;
/* top end of the stack */
/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_end = 0x20006000; /* tunable */
INCLUDE "boards/common.ld"

28
ports/nrf/boards/nrf51x22_256k_32k_s110_8.0.0.ld
View File

@ -1,28 +0,0 @@
/*
GNU linker script for NRF51822 AC w/ S110 8.0.0 SoftDevice
*/
/* Specify the memory areas */
SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x040000 /* entire flash, 256 KiB */
FLASH_ISR (rx) : ORIGIN = 0x00018000, LENGTH = 0x000400 /* sector 0, 1 KiB */
FLASH_TEXT (rx) : ORIGIN = 0x00018400, LENGTH = 0x027c00 /* 159 KiB */
RAM (xrw) : ORIGIN = 0x20002000, LENGTH = 0x006000 /* 24 KiB */
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 1K;
/* top end of the stack */
/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_end = 0x20005000; /* tunable */
INCLUDE "boards/common.ld"

28
ports/nrf/boards/nrf51x22_256k_32k_s120_2.1.0.ld
View File

@ -1,28 +0,0 @@
/*
GNU linker script for NRF51822 AC w/ S120 2.1.0 SoftDevice
*/
/* Specify the memory areas */
SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x040000 /* entire flash, 256 KiB */
FLASH_ISR (rx) : ORIGIN = 0x0001D000, LENGTH = 0x000400 /* sector 0, 1 KiB */
FLASH_TEXT (rx) : ORIGIN = 0x0001D400, LENGTH = 0x022c00 /* 139 KiB */
RAM (xrw) : ORIGIN = 0x20002800, LENGTH = 0x005800 /* 22 KiB */
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 4K;
/* top end of the stack */
/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_end = 0x20003000; /* tunable */
INCLUDE "boards/common.ld"

28
ports/nrf/boards/nrf51x22_256k_32k_s130_2.0.1.ld
View File

@ -1,28 +0,0 @@
/*
GNU linker script for NRF51822 AC w/ S130 2.0.1 SoftDevice
*/
/* Specify the memory areas */
SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x040000 /* entire flash, 256 KiB */
FLASH_ISR (rx) : ORIGIN = 0x0001b000, LENGTH = 0x000400 /* sector 0, 1 KiB */
FLASH_TEXT (rx) : ORIGIN = 0x0001b400, LENGTH = 0x024c00 /* 147 KiB */
RAM (xrw) : ORIGIN = 0x200013c8, LENGTH = 0x006c38 /* 27 KiB */
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 6K;
/* top end of the stack */
/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_end = 0x20002000; /* tunable */
INCLUDE "boards/common.ld"

66
ports/nrf/boards/pca10000/mpconfigboard.h
View File

@ -1,66 +0,0 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2016 Glenn Ruben Bakke
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#define PCA10000
#define MICROPY_HW_BOARD_NAME "PCA10000"
#define MICROPY_HW_MCU_NAME "NRF51822"
#define MICROPY_PY_SYS_PLATFORM "nrf51-dongle"
#define MICROPY_PY_MACHINE_HW_SPI (0)
#define MICROPY_PY_MACHINE_TIMER (1)
#define MICROPY_PY_MACHINE_RTC (1)
#define MICROPY_PY_MACHINE_I2C (0)
#define MICROPY_PY_MACHINE_ADC (0)
#define MICROPY_PY_MACHINE_TEMP (1)
#define MICROPY_HW_HAS_LED (1)
#define MICROPY_HW_HAS_SWITCH (0)
#define MICROPY_HW_HAS_FLASH (0)
#define MICROPY_HW_HAS_SDCARD (0)
#define MICROPY_HW_HAS_MMA7660 (0)
#define MICROPY_HW_HAS_LIS3DSH (0)
#define MICROPY_HW_HAS_LCD (0)
#define MICROPY_HW_ENABLE_RNG (0)
#define MICROPY_HW_ENABLE_RTC (0)
#define MICROPY_HW_ENABLE_TIMER (0)
#define MICROPY_HW_ENABLE_SERVO (0)
#define MICROPY_HW_ENABLE_DAC (0)
#define MICROPY_HW_ENABLE_CAN (0)
#define MICROPY_HW_LED_TRICOLOR (1)
#define MICROPY_HW_LED_PULLUP (1)
#define MICROPY_HW_LED_RED (21) // RED
#define MICROPY_HW_LED_GREEN (22) // GREEN
#define MICROPY_HW_LED_BLUE (23) // BLUE
// UART config
#define MICROPY_HW_UART1_RX (pin_A11)
#define MICROPY_HW_UART1_TX (pin_A9)
#define MICROPY_HW_UART1_HWFC (0)
#define HELP_TEXT_BOARD_LED "1,2,3"

4
ports/nrf/boards/pca10000/mpconfigboard.mk
View File

@ -1,4 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
LD_FILE = boards/nrf51x22_256k_16k.ld

5
ports/nrf/boards/pca10000/mpconfigboard_s110.mk
View File

@ -1,5 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
SOFTDEV_VERSION = 8.0.0
LD_FILE = boards/nrf51x22_256k_16k_s110_$(SOFTDEV_VERSION).ld

11
ports/nrf/boards/pca10000/nrf51_hal_conf.h
View File

@ -1,11 +0,0 @@
#ifndef NRF51_HAL_CONF_H__
#define NRF51_HAL_CONF_H__
#define HAL_UART_MODULE_ENABLED
#define HAL_RTC_MODULE_ENABLED
#define HAL_TIMER_MODULE_ENABLED
#define HAL_TIME_MODULE_ENABLED
#define HAL_TEMP_MODULE_ENABLED
#define HAL_RNG_MODULE_ENABLED
#endif // NRF51_HAL_CONF_H__

7
ports/nrf/boards/pca10000/pins.csv
View File

@ -1,7 +0,0 @@
UART_RTS,PA8
UART_TX,PA9
UART_CTS,PA10
UART_RX,PA11
LED_RED,PA21
LED_GREEN,PA22
LED_BLUE,PA23
1 UART_RTS PA8
2 UART_TX PA9
3 UART_CTS PA10
4 UART_RX PA11
5 LED_RED PA21
6 LED_GREEN PA22
7 LED_BLUE PA23

68
ports/nrf/boards/pca10001/mpconfigboard.h
View File

@ -1,68 +0,0 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2016 Glenn Ruben Bakke
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#define PCA10001
#define MICROPY_HW_BOARD_NAME "PCA10001"
#define MICROPY_HW_MCU_NAME "NRF51822"
#define MICROPY_PY_SYS_PLATFORM "nrf51-DK"
#define MICROPY_PY_MACHINE_HW_SPI (0)
#define MICROPY_PY_MACHINE_TIMER (1)
#define MICROPY_PY_MACHINE_RTC (1)
#define MICROPY_PY_MACHINE_I2C (1)
#define MICROPY_PY_MACHINE_ADC (1)
#define MICROPY_PY_MACHINE_TEMP (1)
#define MICROPY_HW_HAS_LED (1)
#define MICROPY_HW_HAS_SWITCH (0)
#define MICROPY_HW_HAS_FLASH (0)
#define MICROPY_HW_HAS_SDCARD (0)
#define MICROPY_HW_HAS_MMA7660 (0)
#define MICROPY_HW_HAS_LIS3DSH (0)
#define MICROPY_HW_HAS_LCD (0)
#define MICROPY_HW_ENABLE_RNG (0)
#define MICROPY_HW_ENABLE_RTC (0)
#define MICROPY_HW_ENABLE_TIMER (0)
#define MICROPY_HW_ENABLE_SERVO (0)
#define MICROPY_HW_ENABLE_DAC (0)
#define MICROPY_HW_ENABLE_CAN (0)
#define MICROPY_HW_LED_COUNT (2)
#define MICROPY_HW_LED_PULLUP (0)
#define MICROPY_HW_LED1 (18) // LED1
#define MICROPY_HW_LED2 (19) // LED2
// UART config
#define MICROPY_HW_UART1_RX (pin_A11)
#define MICROPY_HW_UART1_TX (pin_A9)
#define MICROPY_HW_UART1_CTS (pin_A10)
#define MICROPY_HW_UART1_RTS (pin_A8)
#define MICROPY_HW_UART1_HWFC (0)
#define HELP_TEXT_BOARD_LED "1,2"

4
ports/nrf/boards/pca10001/mpconfigboard.mk
View File

@ -1,4 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
LD_FILE = boards/nrf51x22_256k_16k.ld

5
ports/nrf/boards/pca10001/mpconfigboard_s110.mk
View File

@ -1,5 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
SOFTDEV_VERSION = 8.0.0
LD_FILE = boards/nrf51x22_256k_16k_s110_$(SOFTDEV_VERSION).ld

14
ports/nrf/boards/pca10001/nrf51_hal_conf.h
View File

@ -1,14 +0,0 @@
#ifndef NRF51_HAL_CONF_H__
#define NRF51_HAL_CONF_H__
#define HAL_UART_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
#define HAL_TIME_MODULE_ENABLED
#define HAL_RTC_MODULE_ENABLED
#define HAL_TIMER_MODULE_ENABLED
#define HAL_TWI_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
#define HAL_TEMP_MODULE_ENABLED
#define HAL_RNG_MODULE_ENABLED
#endif // NRF51_HAL_CONF_H__

32
ports/nrf/boards/pca10001/pins.csv
View File

@ -1,32 +0,0 @@
PA0,PA0
PA1,PA1
PA2,PA2
PA3,PA3
PA4,PA4
PA5,PA5
PA6,PA6
PA7,PA7
UART_RTS,PA8
UART_TX,PA9
UART_CTS,PA10
UART_RX,PA11
PA12,PA12
PA13,PA13
PA14,PA14
PA15,PA15
PA16,PA16
PA17,PA17
PA18,PA18
PA19,PA19
PA20,PA20
PA21,PA21
PA22,PA22
PA23,PA23
PA24,PA24
PA25,PA25
PA26,PA26
PA27,PA27
PA28,PA28
PA29,PA29
PA30,PA30
PA31,PA31
1 PA0 PA0
2 PA1 PA1
3 PA2 PA2
4 PA3 PA3
5 PA4 PA4
6 PA5 PA5
7 PA6 PA6
8 PA7 PA7
9 UART_RTS PA8
10 UART_TX PA9
11 UART_CTS PA10
12 UART_RX PA11
13 PA12 PA12
14 PA13 PA13
15 PA14 PA14
16 PA15 PA15
17 PA16 PA16
18 PA17 PA17
19 PA18 PA18
20 PA19 PA19
21 PA20 PA20
22 PA21 PA21
23 PA22 PA22
24 PA23 PA23
25 PA24 PA24
26 PA25 PA25
27 PA26 PA26
28 PA27 PA27
29 PA28 PA28
30 PA29 PA29
31 PA30 PA30
32 PA31 PA31

75
ports/nrf/boards/pca10028/mpconfigboard.h
View File

@ -1,75 +0,0 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2016 Glenn Ruben Bakke
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#define PCA10028
#define MICROPY_HW_BOARD_NAME "PCA10028"
#define MICROPY_HW_MCU_NAME "NRF51822"
#define MICROPY_PY_SYS_PLATFORM "nrf51-DK"
#define MICROPY_PY_MACHINE_HW_SPI (1)
#define MICROPY_PY_MACHINE_TIMER (1)
#define MICROPY_PY_MACHINE_RTC (1)
#define MICROPY_PY_MACHINE_I2C (1)
#define MICROPY_PY_MACHINE_ADC (1)
#define MICROPY_PY_MACHINE_TEMP (1)
#define MICROPY_HW_HAS_LED (1)
#define MICROPY_HW_HAS_SWITCH (0)
#define MICROPY_HW_HAS_FLASH (0)
#define MICROPY_HW_HAS_SDCARD (0)
#define MICROPY_HW_HAS_MMA7660 (0)
#define MICROPY_HW_HAS_LIS3DSH (0)
#define MICROPY_HW_HAS_LCD (0)
#define MICROPY_HW_ENABLE_RNG (0)
#define MICROPY_HW_ENABLE_RTC (0)
#define MICROPY_HW_ENABLE_TIMER (0)
#define MICROPY_HW_ENABLE_SERVO (0)
#define MICROPY_HW_ENABLE_DAC (0)
#define MICROPY_HW_ENABLE_CAN (0)
#define MICROPY_HW_LED_COUNT (4)
#define MICROPY_HW_LED_PULLUP (1)
#define MICROPY_HW_LED1 (21) // LED1
#define MICROPY_HW_LED2 (22) // LED2
#define MICROPY_HW_LED3 (23) // LED3
#define MICROPY_HW_LED4 (24) // LED4
// UART config
#define MICROPY_HW_UART1_RX (pin_A11)
#define MICROPY_HW_UART1_TX (pin_A9)
#define MICROPY_HW_UART1_CTS (pin_A10)
#define MICROPY_HW_UART1_RTS (pin_A8)
#define MICROPY_HW_UART1_HWFC (1)
// SPI0 config
#define MICROPY_HW_SPI0_NAME "SPI0"
#define MICROPY_HW_SPI0_SCK (pin_A29)
#define MICROPY_HW_SPI0_MOSI (pin_A25)
#define MICROPY_HW_SPI0_MISO (pin_A28)
#define HELP_TEXT_BOARD_LED "1,2,3,4"

4
ports/nrf/boards/pca10028/mpconfigboard.mk
View File

@ -1,4 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
LD_FILE = boards/nrf51x22_256k_32k.ld

5
ports/nrf/boards/pca10028/mpconfigboard_s110.mk
View File

@ -1,5 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
SOFTDEV_VERSION = 8.0.0
LD_FILE = boards/nrf51x22_256k_32k_s110_$(SOFTDEV_VERSION).ld

5
ports/nrf/boards/pca10028/mpconfigboard_s120.mk
View File

@ -1,5 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
SOFTDEV_VERSION = 2.1.0
LD_FILE = boards/nrf51x22_256k_32k_s120_$(SOFTDEV_VERSION).ld

5
ports/nrf/boards/pca10028/mpconfigboard_s130.mk
View File

@ -1,5 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
SOFTDEV_VERSION = 2.0.1
LD_FILE = boards/nrf51x22_256k_32k_s130_$(SOFTDEV_VERSION).ld

14
ports/nrf/boards/pca10028/nrf51_hal_conf.h
View File

@ -1,14 +0,0 @@
#ifndef NRF51_HAL_CONF_H__
#define NRF51_HAL_CONF_H__
#define HAL_UART_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
#define HAL_TIME_MODULE_ENABLED
#define HAL_RTC_MODULE_ENABLED
#define HAL_TIMER_MODULE_ENABLED
#define HAL_TWI_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
#define HAL_TEMP_MODULE_ENABLED
#define HAL_RNG_MODULE_ENABLED
#endif // NRF51_HAL_CONF_H__

32
ports/nrf/boards/pca10028/pins.csv
View File

@ -1,32 +0,0 @@
PA0,PA0
PA1,PA1,ADC0_IN2
PA2,PA2,ADC0_IN3
PA3,PA3,ADC0_IN4
PA4,PA4,ADC0_IN5
PA5,PA5,ADC0_IN6
PA6,PA6,ADC0_IN7
PA7,PA7
UART_RTS,PA8
UART_TX,PA9
UART_CTS,PA10
UART_RX,PA11
PA12,PA12
PA13,PA13
PA14,PA14
PA15,PA15
PA16,PA16
PA17,PA17
PA18,PA18
PA19,PA19
PA20,PA20
PA21,PA21
PA22,PA22
PA23,PA23
PA24,PA24
PA25,PA25
PA26,PA26
PA27,PA27
PA28,PA28
PA29,PA29
PA30,PA30
PA31,PA31
1 PA0,PA0
2 PA1,PA1,ADC0_IN2
3 PA2,PA2,ADC0_IN3
4 PA3,PA3,ADC0_IN4
5 PA4,PA4,ADC0_IN5
6 PA5,PA5,ADC0_IN6
7 PA6,PA6,ADC0_IN7
8 PA7,PA7
9 UART_RTS,PA8
10 UART_TX,PA9
11 UART_CTS,PA10
12 UART_RX,PA11
13 PA12,PA12
14 PA13,PA13
15 PA14,PA14
16 PA15,PA15
17 PA16,PA16
18 PA17,PA17
19 PA18,PA18
20 PA19,PA19
21 PA20,PA20
22 PA21,PA21
23 PA22,PA22
24 PA23,PA23
25 PA24,PA24
26 PA25,PA25
27 PA26,PA26
28 PA27,PA27
29 PA28,PA28
30 PA29,PA29
31 PA30,PA30
32 PA31,PA31

74
ports/nrf/boards/pca10031/mpconfigboard.h
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@ -1,74 +0,0 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2016 Glenn Ruben Bakke
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#define PCA10031
#define MICROPY_HW_BOARD_NAME "PCA10031"
#define MICROPY_HW_MCU_NAME "NRF51822"
#define MICROPY_PY_SYS_PLATFORM "nrf51-dongle"
#define MICROPY_PY_MACHINE_HW_SPI (1)
#define MICROPY_PY_MACHINE_TIMER (1)
#define MICROPY_PY_MACHINE_RTC (1)
#define MICROPY_PY_MACHINE_I2C (1)
#define MICROPY_PY_MACHINE_ADC (1)
#define MICROPY_PY_MACHINE_TEMP (1)
#define MICROPY_HW_HAS_LED (1)
#define MICROPY_HW_HAS_SWITCH (0)
#define MICROPY_HW_HAS_FLASH (0)
#define MICROPY_HW_HAS_SDCARD (0)
#define MICROPY_HW_HAS_MMA7660 (0)
#define MICROPY_HW_HAS_LIS3DSH (0)
#define MICROPY_HW_HAS_LCD (0)
#define MICROPY_HW_ENABLE_RNG (0)
#define MICROPY_HW_ENABLE_RTC (0)
#define MICROPY_HW_ENABLE_TIMER (0)
#define MICROPY_HW_ENABLE_SERVO (0)
#define MICROPY_HW_ENABLE_DAC (0)
#define MICROPY_HW_ENABLE_CAN (0)
#define MICROPY_HW_LED_TRICOLOR (1)
#define MICROPY_HW_LED_PULLUP (1)
#define MICROPY_HW_LED_RED (21) // RED
#define MICROPY_HW_LED_GREEN (22) // GREEN
#define MICROPY_HW_LED_BLUE (23) // BLUE
// UART config
#define MICROPY_HW_UART1_RX (pin_A11)
#define MICROPY_HW_UART1_TX (pin_A9)
#define MICROPY_HW_UART1_CTS (pin_A10)
#define MICROPY_HW_UART1_RTS (pin_A8)
#define MICROPY_HW_UART1_HWFC (0)
// SPI0 config
#define MICROPY_HW_SPI0_NAME "SPI0"
#define MICROPY_HW_SPI0_SCK (pin_A15)
#define MICROPY_HW_SPI0_MOSI (pin_A16)
#define MICROPY_HW_SPI0_MISO (pin_A17)
#define HELP_TEXT_BOARD_LED "1,2,3"

4
ports/nrf/boards/pca10031/mpconfigboard.mk
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@ -1,4 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
LD_FILE = boards/nrf51x22_256k_32k.ld

5
ports/nrf/boards/pca10031/mpconfigboard_s110.mk
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@ -1,5 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
SOFTDEV_VERSION = 8.0.0
LD_FILE = boards/nrf51x22_256k_32k_s110_$(SOFTDEV_VERSION).ld

5
ports/nrf/boards/pca10031/mpconfigboard_s120.mk
View File

@ -1,5 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
SOFTDEV_VERSION = 2.1.0
LD_FILE = boards/nrf51x22_256k_32k_s120_$(SOFTDEV_VERSION).ld

5
ports/nrf/boards/pca10031/mpconfigboard_s130.mk
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@ -1,5 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
SOFTDEV_VERSION = 2.0.1
LD_FILE = boards/nrf51x22_256k_32k_s130_$(SOFTDEV_VERSION).ld

14
ports/nrf/boards/pca10031/nrf51_hal_conf.h
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@ -1,14 +0,0 @@
#ifndef NRF51_HAL_CONF_H__
#define NRF51_HAL_CONF_H__
#define HAL_UART_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
#define HAL_TIME_MODULE_ENABLED
#define HAL_RTC_MODULE_ENABLED
#define HAL_TIMER_MODULE_ENABLED
#define HAL_TWI_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
#define HAL_TEMP_MODULE_ENABLED
#define HAL_RNG_MODULE_ENABLED
#endif // NRF51_HAL_CONF_H__

13
ports/nrf/boards/pca10031/pins.csv
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@ -1,13 +0,0 @@
UART_RTS,PA8
UART_TX,PA9
UART_CTS,PA10
UART_RX,PA11
LED_RED,PA21
LED_GREEN,PA22
LED_BLUE,PA23
PA15,PA15
PA16,PA16
PA17,PA17
PA18,PA18
PA19,PA19
PA20,PA20
1 UART_RTS PA8
2 UART_TX PA9
3 UART_CTS PA10
4 UART_RX PA11
5 LED_RED PA21
6 LED_GREEN PA22
7 LED_BLUE PA23
8 PA15 PA15
9 PA16 PA16
10 PA17 PA17
11 PA18 PA18
12 PA19 PA19
13 PA20 PA20

2
ports/nrf/boards/pca10040/mpconfigboard_s132.mk
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@ -1,7 +1,7 @@
MCU_SERIES = m4
MCU_VARIANT = nrf52
MCU_SUB_VARIANT = nrf52832
SOFTDEV_VERSION = 3.0.0
SOFTDEV_VERSION = 5.0.0
LD_FILE = boards/nrf52832_512k_64k_s132_$(SOFTDEV_VERSION).ld

65
ports/nrf/boards/wt51822_s4at/mpconfigboard.h
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@ -1,65 +0,0 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2017 Ayke van Laethem
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#define WT51822_S4AT
// Datasheet for board:
// https://4tronix.co.uk/picobot2/WT51822-S4AT.pdf
#define MICROPY_HW_BOARD_NAME "WT51822-S4AT"
#define MICROPY_HW_MCU_NAME "NRF51822"
#define MICROPY_PY_SYS_PLATFORM "nrf51"
#define MICROPY_PY_MACHINE_HW_SPI (1)
#define MICROPY_PY_MACHINE_TIMER (1)
#define MICROPY_PY_MACHINE_RTC (1)
#define MICROPY_PY_MACHINE_I2C (1)
#define MICROPY_PY_MACHINE_ADC (1)
#define MICROPY_PY_MACHINE_TEMP (1)
#define MICROPY_HW_HAS_LED (0)
#define MICROPY_HW_HAS_SWITCH (0)
#define MICROPY_HW_HAS_FLASH (0)
#define MICROPY_HW_HAS_SDCARD (0)
#define MICROPY_HW_HAS_MMA7660 (0)
#define MICROPY_HW_HAS_LIS3DSH (0)
#define MICROPY_HW_HAS_LCD (0)
#define MICROPY_HW_ENABLE_RNG (0)
#define MICROPY_HW_ENABLE_RTC (0)
#define MICROPY_HW_ENABLE_TIMER (0)
#define MICROPY_HW_ENABLE_SERVO (0)
#define MICROPY_HW_ENABLE_DAC (0)
#define MICROPY_HW_ENABLE_CAN (0)
// UART config
#define MICROPY_HW_UART1_RX (pin_A1)
#define MICROPY_HW_UART1_TX (pin_A2)
#define MICROPY_HW_UART1_HWFC (0)
// SPI0 config
#define MICROPY_HW_SPI0_NAME "SPI0"
#define MICROPY_HW_SPI0_SCK (pin_A9)
#define MICROPY_HW_SPI0_MOSI (pin_A10)
#define MICROPY_HW_SPI0_MISO (pin_A13)

4
ports/nrf/boards/wt51822_s4at/mpconfigboard.mk
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@ -1,4 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
LD_FILE = boards/nrf51x22_256k_16k.ld

7
ports/nrf/boards/wt51822_s4at/mpconfigboard_s110.mk
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@ -1,7 +0,0 @@
MCU_SERIES = m0
MCU_VARIANT = nrf51
MCU_SUB_VARIANT = nrf51822
SOFTDEV_VERSION = 8.0.0
LD_FILE = boards/nrf51x22_256k_16k_s110_$(SOFTDEV_VERSION).ld
CFLAGS += -DBLUETOOTH_LFCLK_RC

14
ports/nrf/boards/wt51822_s4at/nrf51_hal_conf.h
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@ -1,14 +0,0 @@
#ifndef NRF51_HAL_CONF_H__
#define NRF51_HAL_CONF_H__
#define HAL_UART_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
#define HAL_TIME_MODULE_ENABLED
#define HAL_RTC_MODULE_ENABLED
#define HAL_TIMER_MODULE_ENABLED
#define HAL_TWI_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
#define HAL_TEMP_MODULE_ENABLED
#define HAL_RNG_MODULE_ENABLED
#endif // NRF51_HAL_CONF_H__

7
ports/nrf/boards/wt51822_s4at/pins.csv
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@ -1,7 +0,0 @@
PA1,PA1
PA2,PA2
PA3,PA3
PA4,PA4
PA9,PA9
PA10,PA10
PA13,PA13
1 PA1 PA1
2 PA2 PA2
3 PA3 PA3
4 PA4 PA4
5 PA9 PA9
6 PA10 PA10
7 PA13 PA13

1193
ports/nrf/device/nrf51/nrf51.h
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6129
ports/nrf/device/nrf51/nrf51_bitfields.h
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File diff suppressed because it is too large Load Diff

440
ports/nrf/device/nrf51/nrf51_deprecated.h
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@ -1,440 +0,0 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF51_DEPRECATED_H
#define NRF51_DEPRECATED_H
/*lint ++flb "Enter library region */
/* This file is given to prevent your SW from not compiling with the updates made to nrf51.h and
* nrf51_bitfields.h. The macros defined in this file were available previously. Do not use these
* macros on purpose. Use the ones defined in nrf51.h and nrf51_bitfields.h instead.
*/
/* NVMC */
/* The register ERASEPROTECTEDPAGE is called ERASEPCR0 in the documentation. */
#define ERASEPROTECTEDPAGE ERASEPCR0
/* LPCOMP */
/* The interrupt ISR was renamed. Adding old name to the macros. */
#define LPCOMP_COMP_IRQHandler LPCOMP_IRQHandler
#define LPCOMP_COMP_IRQn LPCOMP_IRQn
/* Corrected typo in RESULT register. */
#define LPCOMP_RESULT_RESULT_Bellow LPCOMP_RESULT_RESULT_Below
/* MPU */
/* The field MPU.PERR0.LPCOMP_COMP was renamed. Added into deprecated in case somebody was using the macros defined for it. */
#define MPU_PERR0_LPCOMP_COMP_Pos MPU_PERR0_LPCOMP_Pos
#define MPU_PERR0_LPCOMP_COMP_Msk MPU_PERR0_LPCOMP_Msk
#define MPU_PERR0_LPCOMP_COMP_InRegion1 MPU_PERR0_LPCOMP_InRegion1
#define MPU_PERR0_LPCOMP_COMP_InRegion0 MPU_PERR0_LPCOMP_InRegion0
/* POWER */
/* The field POWER.RAMON.OFFRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
#define POWER_RAMON_OFFRAM3_Pos (19UL)
#define POWER_RAMON_OFFRAM3_Msk (0x1UL << POWER_RAMON_OFFRAM3_Pos)
#define POWER_RAMON_OFFRAM3_RAM3Off (0UL)
#define POWER_RAMON_OFFRAM3_RAM3On (1UL)
/* The field POWER.RAMON.OFFRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
#define POWER_RAMON_OFFRAM2_Pos (18UL)
#define POWER_RAMON_OFFRAM2_Msk (0x1UL << POWER_RAMON_OFFRAM2_Pos)
#define POWER_RAMON_OFFRAM2_RAM2Off (0UL)
#define POWER_RAMON_OFFRAM2_RAM2On (1UL)
/* The field POWER.RAMON.ONRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
#define POWER_RAMON_ONRAM3_Pos (3UL)
#define POWER_RAMON_ONRAM3_Msk (0x1UL << POWER_RAMON_ONRAM3_Pos)
#define POWER_RAMON_ONRAM3_RAM3Off (0UL)
#define POWER_RAMON_ONRAM3_RAM3On (1UL)
/* The field POWER.RAMON.ONRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
#define POWER_RAMON_ONRAM2_Pos (2UL)
#define POWER_RAMON_ONRAM2_Msk (0x1UL << POWER_RAMON_ONRAM2_Pos)
#define POWER_RAMON_ONRAM2_RAM2Off (0UL)
#define POWER_RAMON_ONRAM2_RAM2On (1UL)
/* RADIO */
/* The enumerated value RADIO.TXPOWER.TXPOWER.Neg40dBm was renamed. Added into deprecated with the new macro name. */
#define RADIO_TXPOWER_TXPOWER_Neg40dBm RADIO_TXPOWER_TXPOWER_Neg30dBm
/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */
#define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos
#define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk
#define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include
#define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip
/* The name of the field PLLLOCK was corrected. Old macros added for compatibility. */
#define RADIO_TEST_PLL_LOCK_Pos RADIO_TEST_PLLLOCK_Pos
#define RADIO_TEST_PLL_LOCK_Msk RADIO_TEST_PLLLOCK_Msk
#define RADIO_TEST_PLL_LOCK_Disabled RADIO_TEST_PLLLOCK_Disabled
#define RADIO_TEST_PLL_LOCK_Enabled RADIO_TEST_PLLLOCK_Enabled
/* The name of the field CONSTCARRIER was corrected. Old macros added for compatibility. */
#define RADIO_TEST_CONST_CARRIER_Pos RADIO_TEST_CONSTCARRIER_Pos
#define RADIO_TEST_CONST_CARRIER_Msk RADIO_TEST_CONSTCARRIER_Msk
#define RADIO_TEST_CONST_CARRIER_Disabled RADIO_TEST_CONSTCARRIER_Disabled
#define RADIO_TEST_CONST_CARRIER_Enabled RADIO_TEST_CONSTCARRIER_Enabled
/* FICR */
/* The registers FICR.SIZERAMBLOCK0, FICR.SIZERAMBLOCK1, FICR.SIZERAMBLOCK2 and FICR.SIZERAMBLOCK3 were renamed into an array. */
#define SIZERAMBLOCK0 SIZERAMBLOCKS
#define SIZERAMBLOCK1 SIZERAMBLOCKS
#define SIZERAMBLOCK2 SIZERAMBLOCK[2] /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */
#define SIZERAMBLOCK3 SIZERAMBLOCK[3] /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */
/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
#define DEVICEID0 DEVICEID[0]
#define DEVICEID1 DEVICEID[1]
/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
#define ER0 ER[0]
#define ER1 ER[1]
#define ER2 ER[2]
#define ER3 ER[3]
/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
#define IR0 IR[0]
#define IR1 IR[1]
#define IR2 IR[2]
#define IR3 IR[3]
/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
#define DEVICEADDR0 DEVICEADDR[0]
#define DEVICEADDR1 DEVICEADDR[1]
/* PPI */
/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
#define TASKS_CHG0EN TASKS_CHG[0].EN
#define TASKS_CHG0DIS TASKS_CHG[0].DIS
#define TASKS_CHG1EN TASKS_CHG[1].EN
#define TASKS_CHG1DIS TASKS_CHG[1].DIS
#define TASKS_CHG2EN TASKS_CHG[2].EN
#define TASKS_CHG2DIS TASKS_CHG[2].DIS
#define TASKS_CHG3EN TASKS_CHG[3].EN
#define TASKS_CHG3DIS TASKS_CHG[3].DIS
/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
#define CH0_EEP CH[0].EEP
#define CH0_TEP CH[0].TEP
#define CH1_EEP CH[1].EEP
#define CH1_TEP CH[1].TEP
#define CH2_EEP CH[2].EEP
#define CH2_TEP CH[2].TEP
#define CH3_EEP CH[3].EEP
#define CH3_TEP CH[3].TEP
#define CH4_EEP CH[4].EEP
#define CH4_TEP CH[4].TEP
#define CH5_EEP CH[5].EEP
#define CH5_TEP CH[5].TEP
#define CH6_EEP CH[6].EEP
#define CH6_TEP CH[6].TEP
#define CH7_EEP CH[7].EEP
#define CH7_TEP CH[7].TEP
#define CH8_EEP CH[8].EEP
#define CH8_TEP CH[8].TEP
#define CH9_EEP CH[9].EEP
#define CH9_TEP CH[9].TEP
#define CH10_EEP CH[10].EEP
#define CH10_TEP CH[10].TEP
#define CH11_EEP CH[11].EEP
#define CH11_TEP CH[11].TEP
#define CH12_EEP CH[12].EEP
#define CH12_TEP CH[12].TEP
#define CH13_EEP CH[13].EEP
#define CH13_TEP CH[13].TEP
#define CH14_EEP CH[14].EEP
#define CH14_TEP CH[14].TEP
#define CH15_EEP CH[15].EEP
#define CH15_TEP CH[15].TEP
/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
#define CHG0 CHG[0]
#define CHG1 CHG[1]
#define CHG2 CHG[2]
#define CHG3 CHG[3]
/* All bitfield macros for the CHGx registers therefore changed name. */
#define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included
#define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included
#define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included
#define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included
/*lint --flb "Leave library region" */
#endif /* NRF51_DEPRECATED_H */

151
ports/nrf/device/nrf51/startup_nrf51822.c
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@ -1,151 +0,0 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2017 Glenn Ruben Bakke
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <stdint.h>
extern uint32_t _estack;
extern uint32_t _sidata;
extern uint32_t _sdata;
extern uint32_t _edata;
extern uint32_t _sbss;
extern uint32_t _ebss;
typedef void (*func)(void);
extern void _start(void) __attribute__((noreturn));
extern void SystemInit(void);
void Default_Handler(void) {
while (1);
}
void Reset_Handler(void) {
uint32_t * ram_on_addr = (uint32_t *)0x40000524;
uint32_t * ram_on_b_addr = (uint32_t *)0x40000554;
// RAM on in on-mode
*ram_on_addr = 3; // block 0 and 1
*ram_on_b_addr = 3; // block 2 and 3
#if 0
// RAM on in off-mode
ram_on_addr = 1 << 16;
ram_on_b_addr = 1 << 17;
#endif
uint32_t * p_src = &_sidata;
uint32_t * p_dest = &_sdata;
while (p_dest < &_edata) {
*p_dest++ = *p_src++;
}
uint32_t * p_bss = &_sbss;
uint32_t * p_bss_end = &_ebss;
while (p_bss < p_bss_end) {
*p_bss++ = 0ul;
}
SystemInit();
_start();
}
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void HardFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void POWER_CLOCK_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void RADIO_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void UART0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void SPI0_TWI0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void SPI1_TWI1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void GPIOTE_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void ADC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void TIMER0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void TIMER1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void TIMER2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void RTC0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void TEMP_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void RNG_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void ECB_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void CCM_AAR_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void WDT_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void RTC1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void QDEC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void LPCOMP_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void SWI0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void SWI1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void SWI2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void SWI3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void SWI4_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
void SWI5_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
const func __Vectors[] __attribute__ ((section(".isr_vector"))) = {
(func)&_estack,
Reset_Handler,
NMI_Handler,
HardFault_Handler,
0,
0,
0,
0,
0,
0,
0,
SVC_Handler,
0,
0,
PendSV_Handler,
SysTick_Handler,
/* External Interrupts */
POWER_CLOCK_IRQHandler,
RADIO_IRQHandler,
UART0_IRQHandler,
SPI0_TWI0_IRQHandler,
SPI1_TWI1_IRQHandler,
0,
GPIOTE_IRQHandler,
ADC_IRQHandler,
TIMER0_IRQHandler,
TIMER1_IRQHandler,
TIMER2_IRQHandler,
RTC0_IRQHandler,
TEMP_IRQHandler,
RNG_IRQHandler,
ECB_IRQHandler,
CCM_AAR_IRQHandler,
WDT_IRQHandler,
RTC1_IRQHandler,
QDEC_IRQHandler,
LPCOMP_IRQHandler,
SWI0_IRQHandler,
SWI1_IRQHandler,
SWI2_IRQHandler,
SWI3_IRQHandler,
SWI4_IRQHandler,
SWI5_IRQHandler
};

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ports/nrf/device/nrf51/system_nrf51.h
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/* Copyright (c) 2012 ARM LIMITED
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of ARM nor the names of its contributors may be used to
* endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef SYSTEM_NRF51_H
#define SYSTEM_NRF51_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
extern void SystemInit (void);
/**
* Update SystemCoreClock variable
*
* @param none
* @return none
*
* @brief Updates the SystemCoreClock with current core Clock
* retrieved from cpu registers.
*/
extern void SystemCoreClockUpdate (void);
#ifdef __cplusplus
}
#endif
#endif /* SYSTEM_NRF51_H */

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ports/nrf/device/nrf51/system_nrf51822.c
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/* Copyright (c) 2012 ARM LIMITED
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of ARM nor the names of its contributors may be used to
* endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/* NOTE: Template files (including this one) are application specific and therefore expected to
be copied into the application project folder prior to its use! */
#include <stdint.h>
#include <stdbool.h>
#include "nrf.h"
#include "system_nrf51.h"
/*lint ++flb "Enter library region" */
#define __SYSTEM_CLOCK (16000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */
static bool is_manual_peripheral_setup_needed(void);
static bool is_disabled_in_debug_needed(void);
static bool is_peripheral_domain_setup_needed(void);
#if defined ( __CC_ARM )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
#elif defined ( __ICCARM__ )
__root uint32_t SystemCoreClock = __SYSTEM_CLOCK;
#elif defined ( __GNUC__ )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
#endif
void SystemCoreClockUpdate(void)
{
SystemCoreClock = __SYSTEM_CLOCK;
}
void SystemInit(void)
{
/* If desired, switch off the unused RAM to lower consumption by the use of RAMON register.
It can also be done in the application main() function. */
/* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
to enable the use of peripherals" found at Product Anomaly document for your device found at
https://www.nordicsemi.com/. The side effect of executing these instructions in the devices
that do not need it is that the new peripherals in the second generation devices (LPCOMP for
example) will not be available. */
if (is_manual_peripheral_setup_needed())
{
*(uint32_t volatile *)0x40000504 = 0xC007FFDF;
*(uint32_t volatile *)0x40006C18 = 0x00008000;
}
/* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
register is incorrect" found at Product Anomaly document for your device found at
https://www.nordicsemi.com/. There is no side effect of using these instruction if not needed. */
if (is_disabled_in_debug_needed())
{
NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
}
/* Execute the following code to eliminate excessive current in sleep mode with RAM retention in nRF51802 devices,
as indicated by PAN 76 "System: Excessive current in sleep mode with retention" found at Product Anomaly document
for your device found at https://www.nordicsemi.com/. */
if (is_peripheral_domain_setup_needed()){
if (*(uint32_t volatile *)0x4006EC00 != 1){
*(uint32_t volatile *)0x4006EC00 = 0x9375;
while (*(uint32_t volatile *)0x4006EC00 != 1){
}
}
*(uint32_t volatile *)0x4006EC14 = 0xC0;
}
}
static bool is_manual_peripheral_setup_needed(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x00) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x10) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
}
return false;
}
static bool is_disabled_in_debug_needed(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
}
return false;
}
static bool is_peripheral_domain_setup_needed(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0xA0) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0xD0) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
}
return false;
}
/*lint --flb "Leave library region" */

41
ports/nrf/drivers/bluetooth/download_ble_stack.sh
View File

@ -1,22 +1,5 @@
#!/bin/bash
function download_s110_nrf51_8_0_0
{
echo ""
echo "####################################"
echo "### Downloading s110_nrf51_8.0.0 ###"
echo "####################################"
echo ""
mkdir -p $1/s110_nrf51_8.0.0
cd $1/s110_nrf51_8.0.0
wget https://www.nordicsemi.com/eng/nordic/download_resource/45846/3/78153065/80234
mv 80234 temp.zip
unzip -u temp.zip
rm temp.zip
cd -
}
function download_s132_nrf52_2_0_1
{
echo ""
@ -34,24 +17,6 @@ function download_s132_nrf52_2_0_1
cd -
}
function download_s132_nrf52_3_0_0
{
echo ""
echo "####################################"
echo "### Downloading s132_nrf52_3.0.0 ###"
echo "####################################"
echo ""
mkdir -p $1/s132_nrf52_3.0.0
cd $1/s132_nrf52_3.0.0
wget https://www.nordicsemi.com/eng/nordic/download_resource/56261/6/26298825/108144
mv 108144 temp.zip
unzip -u temp.zip
rm temp.zip
cd -
}
function download_s132_nrf52_5_0_0
{
echo ""
@ -92,19 +57,13 @@ SCRIPT_DIR="$(cd -P "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
if [ $# -eq 0 ]; then
echo "No Bluetooth LE stack defined, downloading all."
download_s110_nrf51_8_0_0 ${SCRIPT_DIR}
download_s132_nrf52_2_0_1 ${SCRIPT_DIR}
download_s132_nrf52_3_0_0 ${SCRIPT_DIR}
download_s132_nrf52_5_0_0 ${SCRIPT_DIR}
download_s140_nrf52_6_0_0_6_alpha ${SCRIPT_DIR}
else
case $1 in
"s110_nrf51" )
download_s110_nrf51_8_0_0 ${SCRIPT_DIR} ;;
"s132_nrf52_2_0_1" )
download_s132_nrf52_2_0_1 ${SCRIPT_DIR} ;;
"s132_nrf52_3_0_0" )
download_s132_nrf52_3_0_0 ${SCRIPT_DIR} ;;
"s132_nrf52_5_0_0" )
download_s132_nrf52_5_0_0 ${SCRIPT_DIR} ;;
"s140_nrf52_6_0_0_6_alpha" )

30
ports/nrf/hal/nrf51_hal.h
View File

@ -1,30 +0,0 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2016 Glenn Ruben Bakke
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <nrf.h>
// include config from board
#include "nrf51_hal_conf.h"

4
ports/nrf/mpconfigport.h
View File

@ -46,11 +46,7 @@
#define MICROPY_ENABLE_SOURCE_LINE (1)
//CP UPDATE: See mpconfigport.h for LONGINT implementation
#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ)
#if NRF51
#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_NONE)
#else
#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT)
#endif
#define MICROPY_OPT_COMPUTED_GOTO (0)
#define MICROPY_OPT_CACHE_MAP_LOOKUP_IN_BYTECODE (0)

32
ports/nrf/nrf51_af.csv
View File

@ -1,32 +0,0 @@
PA0,PA0
PA1,PA1,ADC0_IN2
PA2,PA2,ADC0_IN3
PA3,PA3,ADC0_IN4
PA4,PA4,ADC0_IN5
PA5,PA5,ADC0_IN6
PA6,PA6,ADC0_IN7
PA7,PA7
PA8,PA8
PA9,PA9
PA10,PA10
PA11,PA11
PA12,PA12
PA13,PA13
PA14,PA14
PA15,PA15
PA16,PA16
PA17,PA17
PA18,PA18
PA19,PA19
PA20,PA20
PA21,PA21
PA22,PA22
PA23,PA23
PA24,PA24
PA25,PA25
PA26,PA26
PA27,PA27
PA28,PA28
PA29,PA29
PA30,PA30
PA31,PA31
1 PA0,PA0
2 PA1,PA1,ADC0_IN2
3 PA2,PA2,ADC0_IN3
4 PA3,PA3,ADC0_IN4
5 PA4,PA4,ADC0_IN5
6 PA5,PA5,ADC0_IN6
7 PA6,PA6,ADC0_IN7
8 PA7,PA7
9 PA8,PA8
10 PA9,PA9
11 PA10,PA10
12 PA11,PA11
13 PA12,PA12
14 PA13,PA13
15 PA14,PA14
16 PA15,PA15
17 PA16,PA16
18 PA17,PA17
19 PA18,PA18
20 PA19,PA19
21 PA20,PA20
22 PA21,PA21
23 PA22,PA22
24 PA23,PA23
25 PA24,PA24
26 PA25,PA25
27 PA26,PA26
28 PA27,PA27
29 PA28,PA28
30 PA29,PA29
31 PA30,PA30
32 PA31,PA31