Add b_n opcode to inline thumb asm.
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b14de21fc8
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03d4124320
@ -288,6 +288,19 @@ void asm_thumb_cmp_rlo_i8(asm_thumb_t *as, uint rlo, int i8) {
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asm_thumb_write_op16(as, OP_CMP_RLO_I8(rlo, i8));
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}
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#define OP_B_N(byte_offset) (0xe000 | (((byte_offset) >> 1) & 0x07ff))
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void asm_thumb_b_n(asm_thumb_t *as, int label) {
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int dest = get_label_dest(as, label);
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int rel = dest - as->code_offset;
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rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
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if (SIGNED_FIT12(rel)) {
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asm_thumb_write_op16(as, OP_B_N(rel));
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} else {
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printf("asm_thumb_b_n: branch does not fit in 12 bits\n");
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}
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}
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#define OP_BEQ_N(byte_offset) (0xd000 | (((byte_offset) >> 1) & 0x00ff))
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#define OP_BNE_N(byte_offset) (0xd100 | (((byte_offset) >> 1) & 0x00ff))
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#define OP_BCS_N(byte_offset) (0xd200 | (((byte_offset) >> 1) & 0x00ff))
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@ -371,7 +384,6 @@ void asm_thumb_ite_ge(asm_thumb_t *as) {
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asm_thumb_write_op16(as, 0xbfac);
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}
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#define OP_B(byte_offset) (0xe000 | (((byte_offset) >> 1) & 0x07ff))
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// this could be wrong, because it should have a range of +/- 16MiB...
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#define OP_BW_HI(byte_offset) (0xf000 | (((byte_offset) >> 12) & 0x07ff))
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#define OP_BW_LO(byte_offset) (0xb800 | (((byte_offset) >> 1) & 0x07ff))
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@ -384,7 +396,7 @@ void asm_thumb_b_label(asm_thumb_t *as, int label) {
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// is a backwards jump, so we know the size of the jump on the first pass
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// calculate rel assuming 12 bit relative jump
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if (SIGNED_FIT12(rel)) {
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asm_thumb_write_op16(as, OP_B(rel));
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asm_thumb_write_op16(as, OP_B_N(rel));
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} else {
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goto large_jump;
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}
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@ -49,6 +49,7 @@ void asm_thumb_movt_reg_i16(asm_thumb_t *as, uint reg_dest, int i16_src);
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void asm_thumb_mov_reg_reg(asm_thumb_t *as, uint reg_dest, uint reg_src);
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void asm_thumb_subs_rlo_rlo_i3(asm_thumb_t *as, uint rlo_dest, uint rlo_src, int i3_src);
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void asm_thumb_cmp_rlo_i8(asm_thumb_t *as, uint rlo, int i8);
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void asm_thumb_b_n(asm_thumb_t *as, int label);
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void asm_thumb_bgt_n(asm_thumb_t *as, int label);
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void asm_thumb_mov_reg_i32(asm_thumb_t *as, uint reg_dest, machine_uint_t i32_src); // convenience
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@ -52,7 +52,7 @@ static void emit_inline_thumb_end_pass(emit_inline_asm_t *emit) {
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static int emit_inline_thumb_count_params(emit_inline_asm_t *emit, int n_params, py_parse_node_t *pn_params) {
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if (n_params > 4) {
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printf("SyntaxError: can only have up to 3 parameters to inline assembler\n");
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printf("SyntaxError: can only have up to 4 parameters to inline thumb assembly\n");
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return 0;
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}
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for (int i = 0; i < n_params; i++) {
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@ -62,7 +62,7 @@ static int emit_inline_thumb_count_params(emit_inline_asm_t *emit, int n_params,
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}
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const char *p = qstr_str(PY_PARSE_NODE_LEAF_ARG(pn_params[i]));
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if (!(strlen(p) == 2 && p[0] == 'r' && p[1] == '0' + i)) {
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printf("SyntaxError: parameter %d to inline assembler must be r%d\n", i, i);
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printf("SyntaxError: parameter %d to inline assembler must be r%d\n", i + 1, i);
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return 0;
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}
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}
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@ -128,6 +128,9 @@ static int get_arg_label(emit_inline_asm_t *emit, qstr op, py_parse_node_t *pn_a
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static void emit_inline_thumb_op(emit_inline_asm_t *emit, qstr op, int n_args, py_parse_node_t *pn_args) {
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// TODO perhaps make two tables:
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// one_args =
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// "b", LAB, asm_thumb_b_n,
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// "bgt", LAB, asm_thumb_bgt_n,
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// two_args =
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// "movs", RLO, I8, asm_thumb_movs_reg_i8
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// "movw", REG, REG, asm_thumb_movw_reg_i16
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@ -135,7 +138,14 @@ static void emit_inline_thumb_op(emit_inline_asm_t *emit, qstr op, int n_args, p
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// "subs", RLO, RLO, I3, asm_thumb_subs_reg_reg_i3
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// 1 arg
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if (strcmp(qstr_str(op), "bgt") == 0) {
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if (strcmp(qstr_str(op), "b") == 0) {
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if (!check_n_arg(op, n_args, 1)) {
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return;
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}
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int label_num = get_arg_label(emit, op, pn_args, 0);
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// TODO check that this succeeded, ie branch was within range
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asm_thumb_b_n(emit->as, label_num);
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} else if (strcmp(qstr_str(op), "bgt") == 0) {
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if (!check_n_arg(op, n_args, 1)) {
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return;
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}
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