2014-03-12 02:55:41 -04:00
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/**
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******************************************************************************
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* @file stm32f4xx_hal_dac.h
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* @author MCD Application Team
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2014-08-06 17:33:31 -04:00
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* @version V1.1.0
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* @date 19-June-2014
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2014-03-12 02:55:41 -04:00
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* @brief Header file of DAC HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F4xx_HAL_DAC_H
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#define __STM32F4xx_HAL_DAC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal_def.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup DAC
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief HAL State structures definition
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*/
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typedef enum
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{
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HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */
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HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */
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HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */
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HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */
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HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */
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}HAL_DAC_StateTypeDef;
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/**
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* @brief DAC handle Structure definition
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*/
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typedef struct
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{
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DAC_TypeDef *Instance; /*!< Register base address */
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__IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
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HAL_LockTypeDef Lock; /*!< DAC locking object */
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DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
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DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
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__IO uint32_t ErrorCode; /*!< DAC Error code */
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}DAC_HandleTypeDef;
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/**
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* @brief DAC Configuration regular Channel structure definition
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*/
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typedef struct
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{
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uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
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This parameter can be a value of @ref DAC_trigger_selection */
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uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
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This parameter can be a value of @ref DAC_output_buffer */
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}DAC_ChannelConfTypeDef;
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup DAC_Error_Code
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* @{
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*/
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#define HAL_DAC_ERROR_NONE 0x00 /*!< No error */
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#define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DAM underrun error */
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#define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DAM underrun error */
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#define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */
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/**
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* @}
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*/
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/** @defgroup DAC_trigger_selection
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* @{
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*/
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#define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
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has been loaded, and not by external trigger */
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#define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
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#define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
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#define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
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#define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
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#define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
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#define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
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#define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
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#define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
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#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
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((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
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((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
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((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
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((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
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((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
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((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
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((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
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((TRIGGER) == DAC_TRIGGER_SOFTWARE))
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/**
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* @}
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*/
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/** @defgroup DAC_output_buffer
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* @{
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*/
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#define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000)
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#define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
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#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
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((STATE) == DAC_OUTPUTBUFFER_DISABLE))
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/**
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* @}
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*/
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/** @defgroup DAC_Channel_selection
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* @{
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*/
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#define DAC_CHANNEL_1 ((uint32_t)0x00000000)
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#define DAC_CHANNEL_2 ((uint32_t)0x00000010)
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#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
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((CHANNEL) == DAC_CHANNEL_2))
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/**
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* @}
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*/
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/** @defgroup DAC_data_alignement
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* @{
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*/
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#define DAC_ALIGN_12B_R ((uint32_t)0x00000000)
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#define DAC_ALIGN_12B_L ((uint32_t)0x00000004)
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#define DAC_ALIGN_8B_R ((uint32_t)0x00000008)
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#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
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((ALIGN) == DAC_ALIGN_12B_L) || \
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((ALIGN) == DAC_ALIGN_8B_R))
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/**
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* @}
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*/
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/** @defgroup DAC_data
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* @{
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*/
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#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)
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/**
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* @}
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*/
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/** @defgroup DAC_flags_definition
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* @{
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*/
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#define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
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#define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
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#define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR1) || \
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((FLAG) == DAC_FLAG_DMAUDR2))
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/**
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* @}
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*/
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/** @defgroup DAC_IT_definition
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* @{
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*/
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#define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
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#define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
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#define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR1) || \
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((IT) == DAC_IT_DMAUDR2))
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @brief Reset DAC handle state
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* @param __HANDLE__: specifies the DAC handle.
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* @retval None
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*/
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#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
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/** @brief Enable the DAC channel
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* @param __HANDLE__: specifies the DAC handle.
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* @param __DAC_Channel__: specifies the DAC channel
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* @retval None
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*/
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#define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
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((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
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/** @brief Disable the DAC channel
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* @param __HANDLE__: specifies the DAC handle
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* @param __DAC_Channel__: specifies the DAC channel.
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* @retval None
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*/
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#define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
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((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
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/** @brief Set DHR12R1 alignment
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* @param __ALIGNEMENT__: specifies the DAC alignement
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* @retval None
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*/
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#define __HAL_DHR12R1_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000008) + (__ALIGNEMENT__))
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/** @brief Set DHR12R2 alignment
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* @param __ALIGNEMENT__: specifies the DAC alignement
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* @retval None
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*/
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#define __HAL_DHR12R2_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000014) + (__ALIGNEMENT__))
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/** @brief Set DHR12RD alignment
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* @param __ALIGNEMENT__: specifies the DAC alignement
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* @retval None
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*/
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#define __HAL_DHR12RD_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000020) + (__ALIGNEMENT__))
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/** @brief Enable the DAC interrupt
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* @param __HANDLE__: specifies the DAC handle
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* @param __INTERRUPT__: specifies the DAC interrupt.
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* @retval None
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*/
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#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
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/** @brief Disable the DAC interrupt
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* @param __HANDLE__: specifies the DAC handle
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* @param __INTERRUPT__: specifies the DAC interrupt.
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* @retval None
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*/
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#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
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/** @brief Get the selected DAC's flag status.
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* @param __HANDLE__: specifies the DAC handle.
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* @retval None
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*/
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#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
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/** @brief Clear the DAC's flag.
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* @param __HANDLE__: specifies the DAC handle.
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* @retval None
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*/
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#define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
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/* Include DAC HAL Extension module */
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#include "stm32f4xx_hal_dac_ex.h"
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/* Exported functions --------------------------------------------------------*/
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/* Initialization/de-initialization functions *********************************/
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HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
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HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
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void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
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void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
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/* I/O operation functions ****************************************************/
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HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
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HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
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HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
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HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
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uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
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/* Peripheral Control functions ***********************************************/
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2014-03-12 02:55:41 -04:00
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HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
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HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
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2014-08-06 17:33:31 -04:00
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/* Peripheral State functions *************************************************/
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2014-03-12 02:55:41 -04:00
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HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
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void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
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uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
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void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
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void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
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void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
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void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
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#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /*__STM32F4xx_HAL_DAC_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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