2016-11-03 18:50:59 -04:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 Scott Shawcroft
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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// This file contains all of the port specific HAL functions for the machine
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// module.
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#include "shared-bindings/nativeio/SPI.h"
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#include "py/nlr.h"
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// We use ENABLE registers below we don't want to treat as a macro.
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#undef ENABLE
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// Number of times to try to send packet if failed.
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#define TIMEOUT 1
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void common_hal_nativeio_spi_construct(nativeio_spi_obj_t *self,
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const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi,
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const mcu_pin_obj_t * miso, uint32_t baudrate) {
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struct spi_config config_spi_master;
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spi_get_config_defaults(&config_spi_master);
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Sercom* sercom = NULL;
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uint32_t clock_pinmux = 0;
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2016-11-29 19:54:20 -05:00
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bool mosi_none = mosi == mp_const_none;
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bool miso_none = miso == mp_const_none;
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2016-11-03 18:50:59 -04:00
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uint32_t mosi_pinmux = 0;
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uint32_t miso_pinmux = 0;
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uint8_t clock_pad = 0;
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uint8_t mosi_pad = 0;
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uint8_t miso_pad = 0;
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for (int i = 0; i < NUM_SERCOMS_PER_PIN; i++) {
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Sercom* potential_sercom = clock->sercom[i].sercom;
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if (potential_sercom == NULL ||
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potential_sercom->SPI.CTRLA.bit.ENABLE != 0) {
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continue;
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}
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clock_pinmux = clock->sercom[i].pinmux;
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clock_pad = clock->sercom[i].pad;
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for (int j = 0; j < NUM_SERCOMS_PER_PIN; j++) {
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2016-11-29 19:54:20 -05:00
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if (!mosi_none) {
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if(potential_sercom == mosi->sercom[j].sercom) {
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mosi_pinmux = mosi->sercom[j].pinmux;
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mosi_pad = mosi->sercom[j].pad;
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if (miso_none) {
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sercom = potential_sercom;
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}
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} else {
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2016-11-03 18:50:59 -04:00
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break;
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}
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}
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2016-11-29 19:54:20 -05:00
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if (!miso_none) {
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for (int k = 0; k < NUM_SERCOMS_PER_PIN; k++) {
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if (potential_sercom == miso->sercom[k].sercom) {
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miso_pinmux = miso->sercom[k].pinmux;
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miso_pad = miso->sercom[k].pad;
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sercom = potential_sercom;
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break;
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}
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}
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}
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2016-11-03 18:50:59 -04:00
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if (sercom != NULL) {
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break;
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}
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}
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if (sercom != NULL) {
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break;
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}
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}
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if (sercom == NULL) {
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2016-11-29 19:54:20 -05:00
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nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError,
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2016-11-03 18:50:59 -04:00
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"No hardware support available with those pins."));
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}
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// Depends on where MOSI and CLK are.
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uint8_t dopo = 8;
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if (clock_pad == 1) {
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if (mosi_pad == 0) {
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dopo = 0;
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} else if (mosi_pad == 3) {
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dopo = 2;
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}
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} else if (clock_pad == 3) {
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if (mosi_pad == 0) {
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dopo = 3;
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} else if (mosi_pad == 2) {
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dopo = 1;
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}
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}
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if (dopo == 8) {
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nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "SPI MOSI and clock pins incompatible."));
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}
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config_spi_master.mux_setting = (dopo << SERCOM_SPI_CTRLA_DOPO_Pos) |
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(miso_pad << SERCOM_SPI_CTRLA_DIPO_Pos);
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// Map pad to pinmux through a short array.
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uint32_t *pinmuxes[4] = {&config_spi_master.pinmux_pad0,
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&config_spi_master.pinmux_pad1,
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&config_spi_master.pinmux_pad2,
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&config_spi_master.pinmux_pad3};
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*pinmuxes[clock_pad] = clock_pinmux;
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2016-11-29 19:54:20 -05:00
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if (!mosi_none) {
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*pinmuxes[mosi_pad] = mosi_pinmux;
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}
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if (!miso_none) {
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*pinmuxes[miso_pad] = miso_pinmux;
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}
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2016-11-03 18:50:59 -04:00
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config_spi_master.mode_specific.master.baudrate = baudrate;
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spi_init(&self->spi_master_instance, sercom, &config_spi_master);
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spi_enable(&self->spi_master_instance);
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}
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void common_hal_nativeio_spi_deinit(nativeio_spi_obj_t *self) {
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spi_disable(&self->spi_master_instance);
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}
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bool common_hal_nativeio_spi_write(nativeio_spi_obj_t *self,
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const uint8_t *data, size_t len) {
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enum status_code status = spi_write_buffer_wait(
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&self->spi_master_instance,
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data,
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len);
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return status == STATUS_OK;
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}
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bool common_hal_nativeio_spi_read(nativeio_spi_obj_t *self,
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uint8_t *data, size_t len) {
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enum status_code status = spi_read_buffer_wait(
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&self->spi_master_instance,
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data,
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len,
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0);
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return status == STATUS_OK;
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}
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