2022-04-06 17:19:38 -04:00
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#include "shared-bindings/board/__init__.h"
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#include "supervisor/board.h"
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STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
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CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
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// Micromod pins mapped to logical Teensy pins
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2022-04-07 17:11:22 -04:00
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// Plus pins mapping some of the names on micromod breakout boards
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2022-04-06 17:19:38 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_AD_B0_03)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_03)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_GPIO_AD_B0_03)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_AD_B0_02)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_02)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_GPIO_AD_B0_02)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_EMC_04)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_EMC_05)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_EMC_06)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_EMC_08)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_B0_10)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_B1_01)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_RX4), MP_ROM_PTR(&pin_GPIO_B1_01)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_B1_00)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_TX4), MP_ROM_PTR(&pin_GPIO_B1_00)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_B0_11)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_B0_00)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_B0_02)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_B0_02)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_B0_01)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_B0_01)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_B0_03)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO_B0_03)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_B0_03)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_B1_02)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B1_02)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_TX3), MP_ROM_PTR(&pin_GPIO_AD_B1_02)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_AD_B1_03)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_03)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_RX3), MP_ROM_PTR(&pin_GPIO_AD_B1_03)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO_AD_B1_07)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B1_07)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_GPIO_AD_B1_07)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO_AD_B1_06)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_06)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_GPIO_AD_B1_06)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO_AD_B1_01)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_01)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_AD_B1_01)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_SDA0), MP_ROM_PTR(&pin_GPIO_AD_B1_01)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO_AD_B1_00)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B1_00)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_AD_B1_00)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_SCL0), MP_ROM_PTR(&pin_GPIO_AD_B1_00)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO_AD_B1_10)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO_AD_B1_10)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_TX5), MP_ROM_PTR(&pin_GPIO_AD_B1_10)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO_AD_B1_11)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO_AD_B1_11)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_RX5), MP_ROM_PTR(&pin_GPIO_AD_B1_11)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_GPIO_AD_B1_08)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO_AD_B1_08)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO_AD_B1_09)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO_AD_B1_09)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO_AD_B0_12)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_GPIO_AD_B0_12)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_TX6), MP_ROM_PTR(&pin_GPIO_AD_B0_12)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO_AD_B0_13)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_GPIO_AD_B0_13)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_RX6), MP_ROM_PTR(&pin_GPIO_AD_B0_13)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_GPIO_AD_B1_14)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_GPIO_AD_B1_14)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_GPIO_AD_B1_15)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_A13), MP_ROM_PTR(&pin_GPIO_AD_B1_15)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_GPIO_EMC_32)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_RX7), MP_ROM_PTR(&pin_GPIO_EMC_32)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D29), MP_ROM_PTR(&pin_GPIO_EMC_31)},
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2022-04-08 10:41:51 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_TX7), MP_ROM_PTR(&pin_GPIO_EMC_31)},
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2022-04-06 17:19:38 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_GPIO_EMC_37)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_GPIO_EMC_36)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D32), MP_ROM_PTR(&pin_GPIO_B0_12)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_GPIO_EMC_07)},
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// SD Card slot
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{MP_OBJ_NEW_QSTR(MP_QSTR_D34), MP_ROM_PTR(&pin_GPIO_SD_B0_03)},
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2022-04-08 10:41:51 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_DAT1), MP_ROM_PTR(&pin_GPIO_SD_B0_03)},
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2022-04-06 17:19:38 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_GPIO_SD_B0_02)},
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2022-04-08 10:41:51 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_DAT0), MP_ROM_PTR(&pin_GPIO_SD_B0_02)},
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2022-04-06 17:19:38 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_GPIO_SD_B0_01)},
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2022-04-08 10:41:51 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_CLK), MP_ROM_PTR(&pin_GPIO_SD_B0_01)},
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2022-04-06 17:19:38 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_GPIO_SD_B0_00)},
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2022-04-08 10:41:51 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_CMD), MP_ROM_PTR(&pin_GPIO_SD_B0_00)},
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2022-04-06 17:19:38 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_D38), MP_ROM_PTR(&pin_GPIO_SD_B0_05)},
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2022-04-08 10:41:51 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_DAT3), MP_ROM_PTR(&pin_GPIO_SD_B0_05)},
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2022-04-06 17:19:38 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_D39), MP_ROM_PTR(&pin_GPIO_SD_B0_04)},
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2022-04-08 10:41:51 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_DAT2), MP_ROM_PTR(&pin_GPIO_SD_B0_04)},
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2022-04-06 17:19:38 -04:00
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2022-04-08 10:41:51 -04:00
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// new pins (not on T4 or T4.1)
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2022-04-06 17:19:38 -04:00
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{MP_OBJ_NEW_QSTR(MP_QSTR_D40), MP_ROM_PTR(&pin_GPIO_B0_04)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_BUS0), MP_ROM_PTR(&pin_GPIO_B0_04)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D41), MP_ROM_PTR(&pin_GPIO_B0_05)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_BUS1), MP_ROM_PTR(&pin_GPIO_B0_05)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D42), MP_ROM_PTR(&pin_GPIO_B0_06)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_BUS2), MP_ROM_PTR(&pin_GPIO_B0_06)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D43), MP_ROM_PTR(&pin_GPIO_B0_07)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_BUS3), MP_ROM_PTR(&pin_GPIO_B0_07)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D44), MP_ROM_PTR(&pin_GPIO_B0_08)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_BUS4), MP_ROM_PTR(&pin_GPIO_B0_08)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_D45), MP_ROM_PTR(&pin_GPIO_B0_09)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_BUS5), MP_ROM_PTR(&pin_GPIO_B0_09)},
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// USB Host
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{MP_ROM_QSTR(MP_QSTR_USB_HOST_POWER), MP_ROM_PTR(&pin_GPIO_EMC_40)},
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{MP_ROM_QSTR(MP_QSTR_USB_HOST_DP), MP_ROM_PTR(&pin_USB_OTG2_DP)},
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{MP_ROM_QSTR(MP_QSTR_USB_HOST_DM), MP_ROM_PTR(&pin_USB_OTG2_DN)},
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{MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj)},
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{MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj)},
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{MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj)},
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2022-04-08 10:41:51 -04:00
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// Micromod Names on different carrier boards
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_03)}, // D0
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_02)}, // D1
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_PWM1), MP_ROM_PTR(&pin_GPIO_EMC_04)}, // D2
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_PWM0), MP_ROM_PTR(&pin_GPIO_EMC_05)}, // D3
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_D0), MP_ROM_PTR(&pin_GPIO_EMC_06)}, // D4
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_D1), MP_ROM_PTR(&pin_GPIO_EMC_08)}, // D5
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_G6), MP_ROM_PTR(&pin_GPIO_B0_10)}, // D6
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_I2S_SDO), MP_ROM_PTR(&pin_GPIO_B1_01)}, // D7
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_I2S_SDI), MP_ROM_PTR(&pin_GPIO_B1_00)}, // D8
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_G7), MP_ROM_PTR(&pin_GPIO_B0_11)}, // D9
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_CS), MP_ROM_PTR(&pin_GPIO_B0_00)}, // D10
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_COPI), MP_ROM_PTR(&pin_GPIO_B0_02)}, // D11
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_CIPO), MP_ROM_PTR(&pin_GPIO_B0_01)}, // D12
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_SCK), MP_ROM_PTR(&pin_GPIO_B0_03)}, // D13
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_A0), MP_ROM_PTR(&pin_GPIO_AD_B1_02)}, // D14
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_03)}, // D15
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_RX2), MP_ROM_PTR(&pin_GPIO_AD_B1_07)}, // D16
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_TX2), MP_ROM_PTR(&pin_GPIO_AD_B1_06)}, // D17
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_SDA), MP_ROM_PTR(&pin_GPIO_AD_B1_01)}, // D18
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_SCL), MP_ROM_PTR(&pin_GPIO_AD_B1_00)}, // D19
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_I2S_FS), MP_ROM_PTR(&pin_GPIO_AD_B1_10)}, // D20
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_I2S_CLK), MP_ROM_PTR(&pin_GPIO_AD_B1_11)}, // D21
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_BATT_VIN3), MP_ROM_PTR(&pin_GPIO_AD_B1_08)}, // D22
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_MCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_09)}, // D23
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_SCL1), MP_ROM_PTR(&pin_GPIO_AD_B0_12)}, // D24
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_SDA1), MP_ROM_PTR(&pin_GPIO_AD_B0_13)}, // D25
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_G8), MP_ROM_PTR(&pin_GPIO_AD_B1_14)}, // D26
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_G11), MP_ROM_PTR(&pin_GPIO_AD_B1_15)}, // D27
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_33V_EN), MP_ROM_PTR(&pin_GPIO_EMC_32)}, // D28
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_I2C_INT), MP_ROM_PTR(&pin_GPIO_EMC_31)}, // D29
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_CAN_RX), MP_ROM_PTR(&pin_GPIO_EMC_37)}, // D30
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_CAN_TX), MP_ROM_PTR(&pin_GPIO_EMC_36)}, // D31
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_G9), MP_ROM_PTR(&pin_GPIO_B0_12)}, // D32
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_G10), MP_ROM_PTR(&pin_GPIO_EMC_07)}, // D33
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_DAT1), MP_ROM_PTR(&pin_GPIO_SD_B0_03)}, // D34
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_DAT0), MP_ROM_PTR(&pin_GPIO_SD_B0_02)}, // 35
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_CIPO1), MP_ROM_PTR(&pin_GPIO_SD_B0_02)}, // 35
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_SCK1), MP_ROM_PTR(&pin_GPIO_SD_B0_01)}, // D36
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_COPI1), MP_ROM_PTR(&pin_GPIO_SD_B0_00)}, // D37
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_CS1), MP_ROM_PTR(&pin_GPIO_SD_B0_05)}, // D38
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_DAT3), MP_ROM_PTR(&pin_GPIO_SD_B0_05)}, // D38
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_DAT2), MP_ROM_PTR(&pin_GPIO_SD_B0_04)},
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_G0), MP_ROM_PTR(&pin_GPIO_B0_04)}, // D40
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_G1), MP_ROM_PTR(&pin_GPIO_B0_05)}, // D41
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_G2), MP_ROM_PTR(&pin_GPIO_B0_06)}, // D42
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_G3), MP_ROM_PTR(&pin_GPIO_B0_07)}, // D43
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_G4), MP_ROM_PTR(&pin_GPIO_B0_08)}, // D44
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{MP_OBJ_NEW_QSTR(MP_QSTR_MM_G5), MP_ROM_PTR(&pin_GPIO_B0_09)}, // D45
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2022-04-06 17:19:38 -04:00
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};
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MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
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