2020-09-24 12:19:46 -04:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2020 Jeff Epler for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <string.h>
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#include "py/runtime.h"
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#include "py/mperrno.h"
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#include "common-hal/canio/CAN.h"
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#include "peripherals/periph.h"
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#include "shared-bindings/microcontroller/Pin.h"
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#include "shared-bindings/util.h"
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#include "supervisor/port.h"
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STATIC bool reserved_can[MP_ARRAY_SIZE(mcu_can_banks)];
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STATIC const mcu_periph_obj_t *find_pin_function(const mcu_periph_obj_t *table, size_t sz, const mcu_pin_obj_t *pin, int periph_index) {
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for(size_t i = 0; i<sz; i++, table++) {
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if (periph_index != -1 && periph_index != table->periph_index) {
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continue;
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}
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if (pin == table->pin) {
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return table;
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}
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}
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return NULL;
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}
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__attribute__((optimize("O0")))
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void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent)
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{
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#define DIV_ROUND(a, b) (((a) + (b)/2) / (b))
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#define DIV_ROUND_UP(a, b) (((a) + (b) - 1) / (b))
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const uint8_t can_tx_len = MP_ARRAY_SIZE(mcu_can_tx_list);
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const uint8_t can_rx_len = MP_ARRAY_SIZE(mcu_can_rx_list);
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const mcu_periph_obj_t *mcu_tx = find_pin_function(mcu_can_tx_list, can_tx_len, tx, -1);
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if (!mcu_tx) {
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mp_raise_ValueError_varg(translate("Invalid %q pin selection"), MP_QSTR_tx);
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}
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int periph_index = mcu_tx->periph_index;
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const mcu_periph_obj_t *mcu_rx = find_pin_function(mcu_can_rx_list, can_rx_len, rx, periph_index);
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if (!mcu_rx) {
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mp_raise_ValueError_varg(translate("Invalid %q pin selection"), MP_QSTR_rx);
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}
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if (reserved_can[periph_index]) {
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mp_raise_ValueError(translate("Hardware busy, try alternative pins"));
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}
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const uint32_t can_frequency = 42000000;
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uint32_t clocks_per_bit = DIV_ROUND(can_frequency, baudrate);
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uint32_t clocks_to_sample = DIV_ROUND(clocks_per_bit * 7, 8);
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uint32_t clocks_after_sample = clocks_per_bit - clocks_to_sample;
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uint32_t divisor = MAX(DIV_ROUND_UP(clocks_to_sample, 16), DIV_ROUND_UP(clocks_after_sample, 8));
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const uint32_t sjw = 3;
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uint32_t tq_per_bit = DIV_ROUND(clocks_per_bit, divisor);
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uint32_t tq_to_sample = DIV_ROUND(clocks_to_sample, divisor);
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uint32_t tq_after_sample = tq_per_bit - tq_to_sample;
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if (divisor > 1023) {
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mp_raise_OSError(MP_EINVAL); // baudrate cannot be attained (16kHz or something is lower bound, should never happen)
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}
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{
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GPIO_InitTypeDef GPIO_InitStruct = {
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.Pin = pin_mask(tx->number),
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.Speed = GPIO_SPEED_FREQ_VERY_HIGH,
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.Mode = GPIO_MODE_AF_PP,
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.Pull = GPIO_PULLUP,
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.Alternate = mcu_tx->altfn_index,
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};
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HAL_GPIO_Init(pin_port(tx->port), &GPIO_InitStruct);
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GPIO_InitStruct.Pin = pin_mask(rx->number);
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GPIO_InitStruct.Alternate = mcu_rx->altfn_index;
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HAL_GPIO_Init(pin_port(rx->port), &GPIO_InitStruct);
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}
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CAN_TypeDef *hw = mcu_can_banks[periph_index - 1];
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// CAN2 shares resources with CAN1. So we always enable CAN1, then split
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// the filter banks equally between them.
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__HAL_RCC_CAN1_CLK_ENABLE();
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if(hw == CAN2) {
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__HAL_RCC_CAN2_CLK_ENABLE();
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self->start_filter_bank = 14;
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self->end_filter_bank = 28;
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self->filter_hw = CAN1;
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} else {
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self->start_filter_bank = 0;
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self->end_filter_bank = 14;
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self->filter_hw = hw;
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}
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CAN_InitTypeDef init = {
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.AutoRetransmission = ENABLE,
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.AutoBusOff = ENABLE,
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.Prescaler = divisor,
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.Mode = (loopback ? CAN_MODE_LOOPBACK : 0) | (silent ? CAN_MODE_SILENT_LOOPBACK : 0),
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.SyncJumpWidth = (sjw-1) << CAN_BTR_SJW_Pos,
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.TimeSeg1 = (tq_to_sample-2) << CAN_BTR_TS1_Pos,
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.TimeSeg2 = (tq_after_sample-1) << CAN_BTR_TS2_Pos,
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};
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self->periph_index = periph_index;
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self->silent = silent;
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self->loopback = loopback;
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self->baudrate = baudrate;
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self->handle.Instance = hw;
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self->handle.Init = init;
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self->handle.State = HAL_CAN_STATE_RESET;
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HAL_CAN_Init(&self->handle);
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// Set the filter split as 14:14
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// COULDDO(@jepler): Dynamically allocate filter banks between CAN1/2
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self->filter_hw->FMR |= CAN_FMR_FINIT;
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self->filter_hw->FMR = CAN_FMR_FINIT | (14 << CAN_FMR_CAN2SB_Pos);
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// Clear every filter enable bit for this can HW
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uint32_t fa1r = self->filter_hw->FA1R;
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for (int i = self->start_filter_bank; i<self->end_filter_bank; i++) {
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fa1r &= ~(1 << i);
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}
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self->filter_hw->FA1R = fa1r;
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CLEAR_BIT(self->filter_hw->FMR, CAN_FMR_FINIT);
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HAL_CAN_Start(&self->handle);
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reserved_can[periph_index] = true;
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}
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bool common_hal_canio_can_loopback_get(canio_can_obj_t *self)
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{
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return self->loopback;
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}
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int common_hal_canio_can_baudrate_get(canio_can_obj_t *self)
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{
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return self->baudrate;
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}
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int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self)
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{
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return (self->handle.Instance->ESR & CAN_ESR_TEC) >> CAN_ESR_TEC_Pos;
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}
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int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self)
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{
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return (self->handle.Instance->ESR & CAN_ESR_REC) >> CAN_ESR_REC_Pos;
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}
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canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self) {
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uint32_t esr = self->handle.Instance->ESR;
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if (READ_BIT(esr, CAN_ESR_BOFF)) {
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return BUS_STATE_OFF;
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}
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if (READ_BIT(esr, CAN_ESR_EPVF)) {
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return BUS_STATE_ERROR_PASSIVE;
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}
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if (READ_BIT(esr, CAN_ESR_EWGF)) {
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return BUS_STATE_ERROR_WARNING;
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}
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return BUS_STATE_ERROR_ACTIVE;
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}
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void common_hal_canio_can_restart(canio_can_obj_t *self) {
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if (!common_hal_canio_can_auto_restart_get(self)) {
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HAL_CAN_Start(&self->handle);
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}
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}
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bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self) {
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return READ_BIT(self->handle.Instance->MCR, CAN_MCR_ABOM);
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}
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void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool value) {
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if(value) {
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SET_BIT(self->handle.Instance->MCR, CAN_MCR_ABOM);
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} else {
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CLEAR_BIT(self->handle.Instance->MCR, CAN_MCR_ABOM);
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}
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}
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void common_hal_canio_can_send(canio_can_obj_t *self, mp_obj_t message_in)
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{
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canio_message_obj_t *message = message_in;
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uint32_t mailbox;
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bool rtr = message->base.type == &canio_remote_transmission_request_type;
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CAN_TxHeaderTypeDef header = {
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.StdId = message->id,
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.ExtId = message->id,
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.IDE = message->extended ? CAN_ID_EXT : CAN_ID_STD,
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.RTR = rtr ? CAN_RTR_REMOTE : CAN_RTR_DATA,
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.DLC = message->size,
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};
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2020-10-06 10:18:53 -04:00
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uint32_t free_level = HAL_CAN_GetTxMailboxesFreeLevel(&self->handle);
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if (free_level == 0) {
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// There's no free Tx mailbox. We need to cancel some message without
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// transmitting it, because once the bus returns to active state it's
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// preferable to transmit the newest messages instead of older messages.
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//
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// We don't strictly guarantee that we abort the oldest Tx request,
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// rather we just abort a different index each time. This permits us
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// to avoid tracking this information altogether.
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HAL_CAN_AbortTxRequest(&self->handle, 1 << (self->cancel_mailbox));
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self->cancel_mailbox = (self->cancel_mailbox + 1) % 3;
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}
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2020-09-24 12:19:46 -04:00
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HAL_StatusTypeDef status = HAL_CAN_AddTxMessage(&self->handle, &header, message->data, &mailbox);
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if (status != HAL_OK) {
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mp_raise_OSError(MP_ENOMEM);
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}
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2020-10-06 10:18:53 -04:00
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// wait 8ms (hard coded for now) for TX to occur
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uint64_t deadline = port_get_raw_ticks(NULL) + 8;
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while (port_get_raw_ticks(NULL) < deadline && HAL_CAN_IsTxMessagePending(&self->handle, 1 << mailbox)) {
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RUN_BACKGROUND_TASKS;
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}
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2020-09-24 12:19:46 -04:00
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}
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bool common_hal_canio_can_silent_get(canio_can_obj_t *self) {
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return self->silent;
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}
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bool common_hal_canio_can_deinited(canio_can_obj_t *self) {
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return !self->handle.Instance;
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}
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void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self) {
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if (common_hal_canio_can_deinited(self)) {
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raise_deinited_error();
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}
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}
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void common_hal_canio_can_deinit(canio_can_obj_t *self)
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{
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if (self->handle.Instance) {
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SET_BIT(self->handle.Instance->MCR, CAN_MCR_RESET);
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while (READ_BIT(self->handle.Instance->MCR, CAN_MCR_RESET)) {
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}
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reserved_can[self->periph_index] = 0;
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}
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self->handle.Instance = NULL;
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}
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void common_hal_canio_reset(void) {
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for (size_t i=0; i<MP_ARRAY_SIZE(mcu_can_banks); i++) {
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SET_BIT(mcu_can_banks[i]->MCR, CAN_MCR_RESET);
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reserved_can[i] = 0;
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}
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}
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