2016-11-03 18:50:59 -04:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 Scott Shawcroft
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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// This file contains all of the Python API definitions for the
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// bitbangio.SPI class.
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#include <string.h>
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#include "shared-bindings/bitbangio/SPI.h"
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2016-11-29 18:49:50 -05:00
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#include "shared-bindings/microcontroller/Pin.h"
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#include "shared-bindings/util.h"
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2018-05-09 15:12:42 -04:00
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#include "lib/utils/buffer_helper.h"
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#include "lib/utils/context_manager_helpers.h"
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#include "py/mperrno.h"
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#include "py/runtime.h"
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#include "supervisor/shared/translate.h"
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//| .. currentmodule:: bitbangio
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//|
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//| :class:`SPI` -- a 3-4 wire serial protocol
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//| -----------------------------------------------
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//|
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//| SPI is a serial protocol that has exclusive pins for data in and out of the
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//| master. It is typically faster than :py:class:`~bitbangio.I2C` because a
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//| separate pin is used to control the active slave rather than a transmitted
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//| address. This class only manages three of the four SPI lines: `!clock`,
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//| `!MOSI`, `!MISO`. Its up to the client to manage the appropriate slave
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//| select line. (This is common because multiple slaves can share the `!clock`,
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//| `!MOSI` and `!MISO` lines and therefore the hardware.)
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//|
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//| .. class:: SPI(clock, MOSI=None, MISO=None)
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//|
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//| Construct an SPI object on the given pins.
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//|
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//| :param ~microcontroller.Pin clock: the pin to use for the clock.
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//| :param ~microcontroller.Pin MOSI: the Master Out Slave In pin.
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//| :param ~microcontroller.Pin MISO: the Master In Slave Out pin.
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//|
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// TODO(tannewt): Support LSB SPI.
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STATIC mp_obj_t bitbangio_spi_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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enum { ARG_clock, ARG_MOSI, ARG_MISO, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_clock, MP_ARG_REQUIRED | MP_ARG_OBJ },
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{ MP_QSTR_MOSI, MP_ARG_OBJ, {.u_obj = mp_const_none} },
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{ MP_QSTR_MISO, MP_ARG_OBJ, {.u_obj = mp_const_none} },
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};
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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const mcu_pin_obj_t* clock = validate_obj_is_free_pin(args[ARG_clock].u_obj);
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const mcu_pin_obj_t* mosi = validate_obj_is_free_pin_or_none(args[ARG_MOSI].u_obj);
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const mcu_pin_obj_t* miso = validate_obj_is_free_pin_or_none(args[ARG_MISO].u_obj);
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bitbangio_spi_obj_t *self = m_new_obj(bitbangio_spi_obj_t);
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self->base.type = &bitbangio_spi_type;
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shared_module_bitbangio_spi_construct(self, clock, mosi, miso);
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return (mp_obj_t)self;
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}
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//| .. method:: deinit()
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//|
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//| Turn off the SPI bus.
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//|
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STATIC mp_obj_t bitbangio_spi_obj_deinit(mp_obj_t self_in) {
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bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
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shared_module_bitbangio_spi_deinit(self);
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_spi_deinit_obj, bitbangio_spi_obj_deinit);
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STATIC void check_for_deinit(bitbangio_spi_obj_t *self) {
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if (shared_module_bitbangio_spi_deinited(self)) {
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raise_deinited_error();
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}
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}
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//| .. method:: __enter__()
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//|
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//| No-op used by Context Managers.
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//|
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// Provided by context manager helper.
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//| .. method:: __exit__()
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//|
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//| Automatically deinitializes the hardware when exiting a context. See
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//| :ref:`lifetime-and-contextmanagers` for more info.
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//|
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STATIC mp_obj_t bitbangio_spi_obj___exit__(size_t n_args, const mp_obj_t *args) {
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(void)n_args;
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shared_module_bitbangio_spi_deinit(args[0]);
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitbangio_spi_obj___exit___obj, 4, 4, bitbangio_spi_obj___exit__);
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static void check_lock(bitbangio_spi_obj_t *self) {
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if (!shared_module_bitbangio_spi_has_lock(self)) {
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mp_raise_RuntimeError(translate("Function requires lock"));
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}
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}
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//| .. method:: configure(*, baudrate=100000, polarity=0, phase=0, bits=8)
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//|
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//| Configures the SPI bus. Only valid when locked.
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//|
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//| :param int baudrate: the clock rate in Hertz
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//| :param int polarity: the base state of the clock line (0 or 1)
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//| :param int phase: the edge of the clock that data is captured. First (0)
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//| or second (1). Rising or falling depends on clock polarity.
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//| :param int bits: the number of bits per word
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//|
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STATIC mp_obj_t bitbangio_spi_configure(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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enum { ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 100000} },
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{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
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};
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bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
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check_for_deinit(self);
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check_lock(self);
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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uint8_t polarity = args[ARG_polarity].u_int;
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if (polarity != 0 && polarity != 1) {
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mp_raise_ValueError(translate("Invalid polarity"));
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}
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uint8_t phase = args[ARG_phase].u_int;
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if (phase != 0 && phase != 1) {
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mp_raise_ValueError(translate("Invalid phase"));
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}
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uint8_t bits = args[ARG_bits].u_int;
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if (bits != 8 && bits != 9) {
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mp_raise_ValueError(translate("Invalid number of bits"));
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}
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shared_module_bitbangio_spi_configure(self, args[ARG_baudrate].u_int, polarity, phase, bits);
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_KW(bitbangio_spi_configure_obj, 1, bitbangio_spi_configure);
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//| .. method:: try_lock()
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//|
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//| Attempts to grab the SPI lock. Returns True on success.
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//|
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//| :return: True when lock has been grabbed
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//| :rtype: bool
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//|
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STATIC mp_obj_t bitbangio_spi_obj_try_lock(mp_obj_t self_in) {
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bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
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check_for_deinit(self);
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return mp_obj_new_bool(shared_module_bitbangio_spi_try_lock(self));
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}
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MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_spi_try_lock_obj, bitbangio_spi_obj_try_lock);
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//| .. method:: unlock()
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//|
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//| Releases the SPI lock.
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//|
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STATIC mp_obj_t bitbangio_spi_obj_unlock(mp_obj_t self_in) {
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bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
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check_for_deinit(self);
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shared_module_bitbangio_spi_unlock(self);
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_spi_unlock_obj, bitbangio_spi_obj_unlock);
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//| .. method:: write(buf)
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//|
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//| Write the data contained in ``buf``. Requires the SPI being locked.
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//| If the buffer is empty, nothing happens.
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//|
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// TODO(tannewt): Add support for start and end kwargs.
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STATIC mp_obj_t bitbangio_spi_write(mp_obj_t self_in, mp_obj_t wr_buf) {
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bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
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check_for_deinit(self);
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mp_buffer_info_t src;
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mp_get_buffer_raise(wr_buf, &src, MP_BUFFER_READ);
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if (src.len == 0) {
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return mp_const_none;
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}
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check_lock(self);
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bool ok = shared_module_bitbangio_spi_write(self, src.buf, src.len);
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if (!ok) {
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mp_raise_OSError(MP_EIO);
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}
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_2(bitbangio_spi_write_obj, bitbangio_spi_write);
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//| .. method:: readinto(buf)
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//|
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//| Read into the buffer specified by ``buf`` while writing zeroes.
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//| Requires the SPI being locked.
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//| If the number of bytes to read is 0, nothing happens.
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//|
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// TODO(tannewt): Add support for start and end kwargs.
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STATIC mp_obj_t bitbangio_spi_readinto(size_t n_args, const mp_obj_t *args) {
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bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(args[0]);
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check_for_deinit(self);
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mp_buffer_info_t bufinfo;
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mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_WRITE);
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if (bufinfo.len == 0) {
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return mp_const_none;
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}
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check_lock(args[0]);
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bool ok = shared_module_bitbangio_spi_read(self, bufinfo.buf, bufinfo.len);
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if (!ok) {
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mp_raise_OSError(MP_EIO);
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}
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitbangio_spi_readinto_obj, 2, 2, bitbangio_spi_readinto);
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2019-05-30 22:01:27 -04:00
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//| .. method:: write_readinto(buffer_out, buffer_in, *, out_start=0, out_end=None, in_start=0, in_end=None)
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//|
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//| Write out the data in ``buffer_out`` while simultaneously reading data into ``buffer_in``.
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2018-05-09 15:12:42 -04:00
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//| The lengths of the slices defined by ``buffer_out[out_start:out_end]`` and ``buffer_in[in_start:in_end]``
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//| must be equal.
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//| If buffer slice lengths are both 0, nothing happens.
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//|
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//| :param bytearray buffer_out: Write out the data in this buffer
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//| :param bytearray buffer_in: Read data into this buffer
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//| :param int out_start: Start of the slice of buffer_out to write out: ``buffer_out[out_start:out_end]``
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2019-05-30 22:01:27 -04:00
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//| :param int out_end: End of the slice; this index is not included. Defaults to ``len(buffer_out)``
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2018-05-09 15:12:42 -04:00
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//| :param int in_start: Start of the slice of ``buffer_in`` to read into: ``buffer_in[in_start:in_end]``
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2019-05-30 22:01:27 -04:00
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//| :param int in_end: End of the slice; this index is not included. Defaults to ``len(buffer_in)``
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2018-05-09 15:12:42 -04:00
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//|
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STATIC mp_obj_t bitbangio_spi_write_readinto(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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enum { ARG_buffer_out, ARG_buffer_in, ARG_out_start, ARG_out_end, ARG_in_start, ARG_in_end };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_buffer_out, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_buffer_in, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_out_start, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_out_end, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = INT_MAX} },
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{ MP_QSTR_in_start, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_in_end, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = INT_MAX} },
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};
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bitbangio_spi_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
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2019-06-12 04:00:59 -04:00
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check_for_deinit(self);
|
2018-01-30 17:18:57 -05:00
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|
2018-05-09 15:12:42 -04:00
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|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
2018-01-30 17:18:57 -05:00
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|
2018-05-09 15:12:42 -04:00
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mp_buffer_info_t buf_out_info;
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mp_get_buffer_raise(args[ARG_buffer_out].u_obj, &buf_out_info, MP_BUFFER_READ);
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int32_t out_start = args[ARG_out_start].u_int;
|
2019-08-27 15:49:46 -04:00
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|
size_t out_length = buf_out_info.len;
|
2018-05-09 15:12:42 -04:00
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|
normalize_buffer_bounds(&out_start, args[ARG_out_end].u_int, &out_length);
|
2018-01-30 17:18:57 -05:00
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|
2018-05-09 15:12:42 -04:00
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|
mp_buffer_info_t buf_in_info;
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|
|
mp_get_buffer_raise(args[ARG_buffer_in].u_obj, &buf_in_info, MP_BUFFER_WRITE);
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|
|
int32_t in_start = args[ARG_in_start].u_int;
|
2019-08-27 15:49:46 -04:00
|
|
|
size_t in_length = buf_in_info.len;
|
2018-05-09 15:12:42 -04:00
|
|
|
normalize_buffer_bounds(&in_start, args[ARG_in_end].u_int, &in_length);
|
2018-01-30 17:18:57 -05:00
|
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|
2018-05-09 15:12:42 -04:00
|
|
|
if (out_length != in_length) {
|
2018-07-31 19:53:54 -04:00
|
|
|
mp_raise_ValueError(translate("buffer slices must be of equal length"));
|
2018-05-09 15:12:42 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
if (out_length == 0) {
|
|
|
|
return mp_const_none;
|
2018-02-05 10:44:29 -05:00
|
|
|
}
|
2018-01-30 17:18:57 -05:00
|
|
|
|
|
|
|
bool ok = shared_module_bitbangio_spi_transfer(self,
|
2018-05-09 15:12:42 -04:00
|
|
|
((uint8_t*)buf_out_info.buf) + out_start,
|
|
|
|
((uint8_t*)buf_in_info.buf) + in_start,
|
|
|
|
out_length);
|
2018-01-30 17:18:57 -05:00
|
|
|
if (!ok) {
|
|
|
|
mp_raise_OSError(MP_EIO);
|
|
|
|
}
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
2018-05-09 15:12:42 -04:00
|
|
|
MP_DEFINE_CONST_FUN_OBJ_KW(bitbangio_spi_write_readinto_obj, 2, bitbangio_spi_write_readinto);
|
2018-01-30 17:18:57 -05:00
|
|
|
|
2016-11-03 18:50:59 -04:00
|
|
|
STATIC const mp_rom_map_elem_t bitbangio_spi_locals_dict_table[] = {
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&bitbangio_spi_deinit_obj) },
|
2017-02-19 10:11:33 -05:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) },
|
2016-11-03 18:50:59 -04:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&bitbangio_spi_obj___exit___obj) },
|
|
|
|
|
2016-11-30 18:08:34 -05:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_configure), MP_ROM_PTR(&bitbangio_spi_configure_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_try_lock), MP_ROM_PTR(&bitbangio_spi_try_lock_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_unlock), MP_ROM_PTR(&bitbangio_spi_unlock_obj) },
|
|
|
|
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&bitbangio_spi_readinto_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&bitbangio_spi_write_obj) },
|
2018-01-30 17:45:04 -05:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_write_readinto), MP_ROM_PTR(&bitbangio_spi_write_readinto_obj) },
|
2016-11-03 18:50:59 -04:00
|
|
|
};
|
|
|
|
STATIC MP_DEFINE_CONST_DICT(bitbangio_spi_locals_dict, bitbangio_spi_locals_dict_table);
|
|
|
|
|
|
|
|
const mp_obj_type_t bitbangio_spi_type = {
|
|
|
|
{ &mp_type_type },
|
|
|
|
.name = MP_QSTR_SPI,
|
|
|
|
.make_new = bitbangio_spi_make_new,
|
|
|
|
.locals_dict = (mp_obj_dict_t*)&bitbangio_spi_locals_dict,
|
|
|
|
};
|