309 lines
12 KiB
C
309 lines
12 KiB
C
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/* Copyright (c) 2012 ARM LIMITED
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* * Neither the name of ARM nor the names of its contributors may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#include "nrf.h"
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#include "system_nrf52.h"
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/*lint ++flb "Enter library region" */
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#define __SYSTEM_CLOCK_64M (64000000UL)
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static bool errata_16(void);
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static bool errata_31(void);
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static bool errata_32(void);
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static bool errata_36(void);
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static bool errata_37(void);
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static bool errata_57(void);
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static bool errata_66(void);
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static bool errata_108(void);
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#if defined ( __CC_ARM )
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uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
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#elif defined ( __ICCARM__ )
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__root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
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#elif defined ( __GNUC__ )
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uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
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#endif
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void SystemCoreClockUpdate(void)
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{
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SystemCoreClock = __SYSTEM_CLOCK_64M;
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}
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void SystemInit(void)
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{
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/* Workaround for Errata 16 "System: RAM may be corrupt on wakeup from CPU IDLE" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/ */
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if (errata_16()){
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*(volatile uint32_t *)0x4007C074 = 3131961357ul;
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}
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/* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/ */
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if (errata_31()){
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*(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13;
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}
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/* Workaround for Errata 32 "DIF: Debug session automatically enables TracePort pins" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/ */
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if (errata_32()){
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CoreDebug->DEMCR &= ~CoreDebug_DEMCR_TRCENA_Msk;
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}
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/* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/ */
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if (errata_36()){
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NRF_CLOCK->EVENTS_DONE = 0;
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NRF_CLOCK->EVENTS_CTTO = 0;
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NRF_CLOCK->CTIV = 0;
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}
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/* Workaround for Errata 37 "RADIO: Encryption engine is slow by default" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/ */
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if (errata_37()){
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*(volatile uint32_t *)0x400005A0 = 0x3;
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}
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/* Workaround for Errata 57 "NFCT: NFC Modulation amplitude" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/ */
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if (errata_57()){
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*(volatile uint32_t *)0x40005610 = 0x00000005;
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*(volatile uint32_t *)0x40005688 = 0x00000001;
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*(volatile uint32_t *)0x40005618 = 0x00000000;
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*(volatile uint32_t *)0x40005614 = 0x0000003F;
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}
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/* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/ */
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if (errata_66()){
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NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
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NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
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NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
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NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
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NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
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NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
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NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
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NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
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NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
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NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
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NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
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NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
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NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
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NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
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NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
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NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
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NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
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}
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/* Workaround for Errata 108 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
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for your device located at https://infocenter.nordicsemi.com/ */
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if (errata_108()){
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*(volatile uint32_t *)0x40000EE4 = *(volatile uint32_t *)0x10000258 & 0x0000004F;
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}
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/* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
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* compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
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* operations are not used in your code. */
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#if (__FPU_USED == 1)
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SCB->CPACR |= (3UL << 20) | (3UL << 22);
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__DSB();
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__ISB();
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#endif
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/* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
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two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
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normal GPIOs. */
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#if defined (CONFIG_NFCT_PINS_AS_GPIOS)
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if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NVIC_SystemReset();
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}
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#endif
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/* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
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defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
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reserved for PinReset and not available as normal GPIO. */
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#if defined (CONFIG_GPIO_AS_PINRESET)
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if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
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((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_UICR->PSELRESET[0] = 21;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_UICR->PSELRESET[1] = 21;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
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while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
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NVIC_SystemReset();
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}
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#endif
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/* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
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Specification to see which one). */
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#if defined (ENABLE_SWO)
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CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
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NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
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NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
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#endif
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/* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
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Specification to see which ones). */
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#if defined (ENABLE_TRACE)
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CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
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NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
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NRF_P0->PIN_CNF[14] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
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NRF_P0->PIN_CNF[15] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
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NRF_P0->PIN_CNF[16] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
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NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
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NRF_P0->PIN_CNF[20] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
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#endif
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SystemCoreClockUpdate();
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}
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static bool errata_16(void)
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{
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if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
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if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
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return true;
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}
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}
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return false;
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}
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static bool errata_31(void)
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{
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if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
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if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
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return true;
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}
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if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40){
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return true;
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}
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if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){
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return true;
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}
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}
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return false;
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}
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static bool errata_32(void)
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{
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if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
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if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
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return true;
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}
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}
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return false;
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}
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static bool errata_36(void)
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{
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if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
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if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
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return true;
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}
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if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40){
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return true;
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}
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if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){
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return true;
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}
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}
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return false;
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}
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static bool errata_37(void)
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{
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if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
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if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
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return true;
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}
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}
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return false;
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}
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static bool errata_57(void)
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{
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if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
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if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
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return true;
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}
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}
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return false;
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}
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static bool errata_66(void)
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{
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if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
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if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){
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return true;
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}
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}
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return false;
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}
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static bool errata_108(void)
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{
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if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
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if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
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return true;
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}
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if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40){
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return true;
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}
|
||
|
|
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/*lint --flb "Leave library region" */
|