475 lines
19 KiB
C
475 lines
19 KiB
C
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/**
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******************************************************************************
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* @file stm32f2xx_hal_spi.h
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* @author MCD Application Team
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* @version V1.0.1
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* @date 25-March-2014
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* @brief Header file of SPI HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F2xx_HAL_SPI_H
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#define __STM32F2xx_HAL_SPI_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f2xx_hal_def.h"
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/** @addtogroup STM32F2xx_HAL_Driver
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* @{
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*/
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/** @addtogroup SPI
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief SPI Configuration Structure definition
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*/
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typedef struct
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{
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uint32_t Mode; /*!< Specifies the SPI operating mode.
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This parameter can be a value of @ref SPI_mode */
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uint32_t Direction; /*!< Specifies the SPI Directional mode state.
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This parameter can be a value of @ref SPI_Direction_mode */
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uint32_t DataSize; /*!< Specifies the SPI data size.
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This parameter can be a value of @ref SPI_data_size */
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uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
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This parameter can be a value of @ref SPI_Clock_Polarity */
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uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
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This parameter can be a value of @ref SPI_Clock_Phase */
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uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
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hardware (NSS pin) or by software using the SSI bit.
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This parameter can be a value of @ref SPI_Slave_Select_management */
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uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
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used to configure the transmit and receive SCK clock.
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This parameter can be a value of @ref SPI_BaudRate_Prescaler
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@note The communication clock is derived from the master
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clock. The slave clock does not need to be set */
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uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
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This parameter can be a value of @ref SPI_MSB_LSB_transmission */
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uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
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This parameter can be a value of @ref SPI_TI_mode */
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uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
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This parameter can be a value of @ref SPI_CRC_Calculation */
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uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
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This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
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}SPI_InitTypeDef;
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/**
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* @brief HAL SPI State structure definition
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*/
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typedef enum
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{
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HAL_SPI_STATE_RESET = 0x00, /*!< SPI not yet initialized or disabled */
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HAL_SPI_STATE_READY = 0x01, /*!< SPI initialized and ready for use */
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HAL_SPI_STATE_BUSY = 0x02, /*!< SPI process is ongoing */
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HAL_SPI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
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HAL_SPI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
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HAL_SPI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
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HAL_SPI_STATE_ERROR = 0x03 /*!< SPI error state */
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}HAL_SPI_StateTypeDef;
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/**
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* @brief HAL SPI Error Code structure definition
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*/
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typedef enum
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{
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HAL_SPI_ERROR_NONE = 0x00, /*!< No error */
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HAL_SPI_ERROR_MODF = 0x01, /*!< MODF error */
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HAL_SPI_ERROR_CRC = 0x02, /*!< CRC error */
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HAL_SPI_ERROR_OVR = 0x04, /*!< OVR error */
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HAL_SPI_ERROR_FRE = 0x08, /*!< FRE error */
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HAL_SPI_ERROR_DMA = 0x10, /*!< DMA transfer error */
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HAL_SPI_ERROR_FLAG = 0x20 /*!< Flag: RXNE,TXE, BSY */
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}HAL_SPI_ErrorTypeDef;
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/**
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* @brief SPI handle Structure definition
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*/
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typedef struct __SPI_HandleTypeDef
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{
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SPI_TypeDef *Instance; /* SPI registers base address */
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SPI_InitTypeDef Init; /* SPI communication parameters */
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uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
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uint16_t TxXferSize; /* SPI Tx transfer size */
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uint16_t TxXferCount; /* SPI Tx Transfer Counter */
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uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
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uint16_t RxXferSize; /* SPI Rx transfer size */
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uint16_t RxXferCount; /* SPI Rx Transfer Counter */
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DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA handle parameters */
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DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA handle parameters */
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void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Rx ISR */
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void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Tx ISR */
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HAL_LockTypeDef Lock; /* SPI locking object */
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__IO HAL_SPI_StateTypeDef State; /* SPI communication state */
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__IO HAL_SPI_ErrorTypeDef ErrorCode; /* SPI Error code */
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}SPI_HandleTypeDef;
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup SPI_Exported_Constants
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* @{
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*/
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/** @defgroup SPI_mode
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* @{
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*/
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#define SPI_MODE_SLAVE ((uint32_t)0x00000000)
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#define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
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#define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
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((MODE) == SPI_MODE_MASTER))
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/**
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* @}
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*/
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/** @defgroup SPI_Direction_mode
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* @{
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*/
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#define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
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#define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
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#define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
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#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
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((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
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((MODE) == SPI_DIRECTION_1LINE))
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#define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
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((MODE) == SPI_DIRECTION_1LINE))
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#define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
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/**
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* @}
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*/
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/** @defgroup SPI_data_size
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* @{
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*/
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#define SPI_DATASIZE_8BIT ((uint32_t)0x00000000)
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#define SPI_DATASIZE_16BIT SPI_CR1_DFF
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#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
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((DATASIZE) == SPI_DATASIZE_8BIT))
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/**
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* @}
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*/
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/** @defgroup SPI_Clock_Polarity
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* @{
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*/
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#define SPI_POLARITY_LOW ((uint32_t)0x00000000)
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#define SPI_POLARITY_HIGH SPI_CR1_CPOL
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#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
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((CPOL) == SPI_POLARITY_HIGH))
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/**
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* @}
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*/
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/** @defgroup SPI_Clock_Phase
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* @{
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*/
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#define SPI_PHASE_1EDGE ((uint32_t)0x00000000)
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#define SPI_PHASE_2EDGE SPI_CR1_CPHA
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#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
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((CPHA) == SPI_PHASE_2EDGE))
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/**
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* @}
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*/
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/** @defgroup SPI_Slave_Select_management
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* @{
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*/
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#define SPI_NSS_SOFT SPI_CR1_SSM
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#define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
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#define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
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#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
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((NSS) == SPI_NSS_HARD_INPUT) || \
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((NSS) == SPI_NSS_HARD_OUTPUT))
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/**
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* @}
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*/
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/** @defgroup SPI_BaudRate_Prescaler
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* @{
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*/
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#define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
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#define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008)
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#define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010)
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#define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018)
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#define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020)
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#define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028)
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#define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030)
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#define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038)
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#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
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((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
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((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
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((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
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((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
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((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
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((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
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((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
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/**
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* @}
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*/
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/** @defgroup SPI_MSB_LSB_transmission
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* @{
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*/
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#define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
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#define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
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#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
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((BIT) == SPI_FIRSTBIT_LSB))
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/**
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* @}
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*/
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/** @defgroup SPI_TI_mode
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* @{
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*/
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#define SPI_TIMODE_DISABLED ((uint32_t)0x00000000)
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#define SPI_TIMODE_ENABLED SPI_CR2_FRF
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#define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLED) || \
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((MODE) == SPI_TIMODE_ENABLED))
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/**
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* @}
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*/
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/** @defgroup SPI_CRC_Calculation
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* @{
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*/
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#define SPI_CRCCALCULATION_DISABLED ((uint32_t)0x00000000)
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#define SPI_CRCCALCULATION_ENABLED SPI_CR1_CRCEN
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#define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLED) || \
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((CALCULATION) == SPI_CRCCALCULATION_ENABLED))
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/**
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* @}
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*/
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/** @defgroup SPI_Interrupt_configuration_definition
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* @{
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*/
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#define SPI_IT_TXE SPI_CR2_TXEIE
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#define SPI_IT_RXNE SPI_CR2_RXNEIE
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#define SPI_IT_ERR SPI_CR2_ERRIE
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/**
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* @}
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*/
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/** @defgroup SPI_Flag_definition
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* @{
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*/
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#define SPI_FLAG_RXNE SPI_SR_RXNE
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#define SPI_FLAG_TXE SPI_SR_TXE
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#define SPI_FLAG_CRCERR SPI_SR_CRCERR
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#define SPI_FLAG_MODF SPI_SR_MODF
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#define SPI_FLAG_OVR SPI_SR_OVR
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#define SPI_FLAG_BSY SPI_SR_BSY
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#define SPI_FLAG_FRE SPI_SR_FRE
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @brief Enable or disable the specified SPI interrupts.
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* @param __HANDLE__: specifies the SPI handle.
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* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
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* @param __INTERRUPT__: specifies the interrupt source to enable or disable.
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* This parameter can be one of the following values:
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* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
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* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
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* @arg SPI_IT_ERR: Error interrupt enable
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||
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* @retval None
|
||
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|
*/
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||
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#define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
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#define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
|
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|
|
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/** @brief Check if the specified SPI interrupt source is enabled or disabled.
|
||
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|
* @param __HANDLE__: specifies the SPI handle.
|
||
|
|
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||
|
|
* @param __INTERRUPT__: specifies the SPI interrupt source to check.
|
||
|
|
* This parameter can be one of the following values:
|
||
|
|
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||
|
|
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||
|
|
* @arg SPI_IT_ERR: Error interrupt enable
|
||
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|
* @retval The new state of __IT__ (TRUE or FALSE).
|
||
|
|
*/
|
||
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#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||
|
|
|
||
|
|
/** @brief Check whether the specified SPI flag is set or not.
|
||
|
|
* @param __HANDLE__: specifies the SPI handle.
|
||
|
|
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||
|
|
* @param __FLAG__: specifies the flag to check.
|
||
|
|
* This parameter can be one of the following values:
|
||
|
|
* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
|
||
|
|
* @arg SPI_FLAG_TXE: Transmit buffer empty flag
|
||
|
|
* @arg SPI_FLAG_CRCERR: CRC error flag
|
||
|
|
* @arg SPI_FLAG_MODF: Mode fault flag
|
||
|
|
* @arg SPI_FLAG_OVR: Overrun flag
|
||
|
|
* @arg SPI_FLAG_BSY: Busy flag
|
||
|
|
* @arg SPI_FLAG_FRE: Frame format error flag
|
||
|
|
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||
|
|
*/
|
||
|
|
#define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
|
||
|
|
|
||
|
|
/** @brief Clear the SPI CRCERR pending flag.
|
||
|
|
* @param __HANDLE__: specifies the SPI handle.
|
||
|
|
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
#define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR &= ~(SPI_FLAG_CRCERR))
|
||
|
|
|
||
|
|
/** @brief Clear the SPI MODF pending flag.
|
||
|
|
* @param __HANDLE__: specifies the SPI handle.
|
||
|
|
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR;\
|
||
|
|
(__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE);}while(0)
|
||
|
|
|
||
|
|
/** @brief Clear the SPI OVR pending flag.
|
||
|
|
* @param __HANDLE__: specifies the SPI handle.
|
||
|
|
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->DR;\
|
||
|
|
(__HANDLE__)->Instance->SR;}while(0)
|
||
|
|
|
||
|
|
/** @brief Clear the SPI FRE pending flag.
|
||
|
|
* @param __HANDLE__: specifies the SPI handle.
|
||
|
|
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR)
|
||
|
|
|
||
|
|
#define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
|
||
|
|
#define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_SPE)
|
||
|
|
|
||
|
|
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
|
||
|
|
|
||
|
|
#define __HAL_SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
|
||
|
|
|
||
|
|
#define __HAL_SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_BIDIOE)
|
||
|
|
|
||
|
|
#define __HAL_SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (~SPI_CR1_CRCEN);\
|
||
|
|
(__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
|
||
|
|
|
||
|
|
/* Exported functions --------------------------------------------------------*/
|
||
|
|
|
||
|
|
/* Initialization/de-initialization functions **********************************/
|
||
|
|
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
|
||
|
|
HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
|
||
|
|
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
|
||
|
|
void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
|
||
|
|
|
||
|
|
/* I/O operation functions *****************************************************/
|
||
|
|
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||
|
|
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||
|
|
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
|
||
|
|
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||
|
|
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||
|
|
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
|
||
|
|
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||
|
|
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||
|
|
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
|
||
|
|
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
|
||
|
|
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
|
||
|
|
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
|
||
|
|
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
|
||
|
|
void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
|
||
|
|
|
||
|
|
/* Peripheral State and Control functions **************************************/
|
||
|
|
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
|
||
|
|
HAL_SPI_ErrorTypeDef HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* __STM32F2xx_HAL_SPI_H */
|
||
|
|
|
||
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|