2017-12-21 07:49:14 -05:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2019-01-30 18:50:07 -05:00
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#include "py/mphal.h"
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#include "py/obj.h"
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#include "py/runtime.h"
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2017-12-21 07:49:14 -05:00
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#include "common-hal/microcontroller/Pin.h"
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#include "common-hal/microcontroller/Processor.h"
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2019-01-30 18:50:07 -05:00
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#include "shared-bindings/nvm/ByteArray.h"
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2018-01-03 16:50:57 -05:00
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#include "shared-bindings/microcontroller/__init__.h"
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2017-12-21 07:49:14 -05:00
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#include "shared-bindings/microcontroller/Pin.h"
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#include "shared-bindings/microcontroller/Processor.h"
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2018-06-27 14:14:25 -04:00
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#include "supervisor/filesystem.h"
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2020-01-30 09:52:06 -05:00
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#include "supervisor/port.h"
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2019-07-14 14:02:01 -04:00
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#include "supervisor/shared/safe_mode.h"
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2018-06-27 14:14:25 -04:00
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#include "nrfx_glue.h"
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2020-01-30 09:52:06 -05:00
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#include "nrf_nvic.h"
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2018-06-27 14:14:25 -04:00
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2018-07-16 09:01:46 -04:00
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// This routine should work even when interrupts are disabled. Used by OneWire
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// for precise timing.
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2017-12-21 07:49:14 -05:00
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void common_hal_mcu_delay_us(uint32_t delay) {
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2018-06-27 14:14:25 -04:00
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NRFX_DELAY_US(delay);
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2017-12-21 07:49:14 -05:00
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}
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2020-01-30 09:52:06 -05:00
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static volatile uint32_t nesting_count = 0;
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static uint8_t is_nested_critical_region;
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2017-12-21 07:49:14 -05:00
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void common_hal_mcu_disable_interrupts() {
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nRF: Always use sd_nvic_critical_region calls
The motivation for doing this is so that we can allow
common_hal_mcu_disable_interrupts in IRQ context, something that works
on other ports, but not on nRF with SD enabled. This is because
when SD is enabled, calling sd_softdevice_is_enabled in the context
of an interrupt with priority 2 or 3 causes a HardFault. We have chosen
to give the USB interrupt priority 2 on nRF, the highest priority that
is compatible with SD.
Since at least SoftDevice s130 v2.0.1, sd_nvic_critical_region_enter/exit
have been implemented as inline functions and are safe to call even if
softdevice is not enabled. Reference kindly provided by danh:
https://devzone.nordicsemi.com/f/nordic-q-a/29553/sd_nvic_critical_region_enter-exit-missing-in-s130-v2
Switching to these as the default/only way to enable/disable interrupts
simplifies things, and fixes several problems and potential problems:
* Interrupts at priority 2 or 3 could not call common_hal_mcu_disable_interrupts
because the call to sd_softdevice_is_enabled would HardFault
* Hypothetically, the state of sd_softdevice_is_enabled
could change from the disable to the enable call, meaning the calls
would not match (__disable_irq() could be balanced with
sd_nvic_critical_region_exit).
This also fixes a problem I believe would exist if disable() were called
twice when SD is enabled. There is a single "is_nested_critical_region"
flag, and the second call would set it to 1. Both of the enable()
calls that followed would call critical_region_exit(1), and interrupts
would not properly be reenabled. In the new version of the code,
we use our own nesting_count value to track the intended state, so
now nested disable()s only call critical_region_enter() once, only
updating is_nested_critical_region once; and only the second enable()
call will call critical_region_exit, with the right value of i_n_c_r.
Finally, in port_sleep_until_interrupt, if !sd_enabled, we really do
need to __disable_irq, rather than using the common_hal_mcu routines;
the reason why is documented in a comment.
2020-07-14 18:34:45 -04:00
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if (nesting_count == 0) {
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// Unlike __disable_irq(), this should only be called the first time
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// "is_nested_critical_region" is sd's equivalent of our nesting count
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// so a nested call would store 0 in the global and make the later
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// exit call not actually reenable interrupts
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//
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// This only disables interrupts of priority 2 through 7; levels 0, 1,
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// and 4, are exclusive to softdevice and should never be used, so
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// this limitation is not important.
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2020-01-30 09:52:06 -05:00
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sd_nvic_critical_region_enter(&is_nested_critical_region);
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}
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nRF: Always use sd_nvic_critical_region calls
The motivation for doing this is so that we can allow
common_hal_mcu_disable_interrupts in IRQ context, something that works
on other ports, but not on nRF with SD enabled. This is because
when SD is enabled, calling sd_softdevice_is_enabled in the context
of an interrupt with priority 2 or 3 causes a HardFault. We have chosen
to give the USB interrupt priority 2 on nRF, the highest priority that
is compatible with SD.
Since at least SoftDevice s130 v2.0.1, sd_nvic_critical_region_enter/exit
have been implemented as inline functions and are safe to call even if
softdevice is not enabled. Reference kindly provided by danh:
https://devzone.nordicsemi.com/f/nordic-q-a/29553/sd_nvic_critical_region_enter-exit-missing-in-s130-v2
Switching to these as the default/only way to enable/disable interrupts
simplifies things, and fixes several problems and potential problems:
* Interrupts at priority 2 or 3 could not call common_hal_mcu_disable_interrupts
because the call to sd_softdevice_is_enabled would HardFault
* Hypothetically, the state of sd_softdevice_is_enabled
could change from the disable to the enable call, meaning the calls
would not match (__disable_irq() could be balanced with
sd_nvic_critical_region_exit).
This also fixes a problem I believe would exist if disable() were called
twice when SD is enabled. There is a single "is_nested_critical_region"
flag, and the second call would set it to 1. Both of the enable()
calls that followed would call critical_region_exit(1), and interrupts
would not properly be reenabled. In the new version of the code,
we use our own nesting_count value to track the intended state, so
now nested disable()s only call critical_region_enter() once, only
updating is_nested_critical_region once; and only the second enable()
call will call critical_region_exit, with the right value of i_n_c_r.
Finally, in port_sleep_until_interrupt, if !sd_enabled, we really do
need to __disable_irq, rather than using the common_hal_mcu routines;
the reason why is documented in a comment.
2020-07-14 18:34:45 -04:00
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__DMB();
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nesting_count++;
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2017-12-21 07:49:14 -05:00
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}
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void common_hal_mcu_enable_interrupts() {
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nRF: Always use sd_nvic_critical_region calls
The motivation for doing this is so that we can allow
common_hal_mcu_disable_interrupts in IRQ context, something that works
on other ports, but not on nRF with SD enabled. This is because
when SD is enabled, calling sd_softdevice_is_enabled in the context
of an interrupt with priority 2 or 3 causes a HardFault. We have chosen
to give the USB interrupt priority 2 on nRF, the highest priority that
is compatible with SD.
Since at least SoftDevice s130 v2.0.1, sd_nvic_critical_region_enter/exit
have been implemented as inline functions and are safe to call even if
softdevice is not enabled. Reference kindly provided by danh:
https://devzone.nordicsemi.com/f/nordic-q-a/29553/sd_nvic_critical_region_enter-exit-missing-in-s130-v2
Switching to these as the default/only way to enable/disable interrupts
simplifies things, and fixes several problems and potential problems:
* Interrupts at priority 2 or 3 could not call common_hal_mcu_disable_interrupts
because the call to sd_softdevice_is_enabled would HardFault
* Hypothetically, the state of sd_softdevice_is_enabled
could change from the disable to the enable call, meaning the calls
would not match (__disable_irq() could be balanced with
sd_nvic_critical_region_exit).
This also fixes a problem I believe would exist if disable() were called
twice when SD is enabled. There is a single "is_nested_critical_region"
flag, and the second call would set it to 1. Both of the enable()
calls that followed would call critical_region_exit(1), and interrupts
would not properly be reenabled. In the new version of the code,
we use our own nesting_count value to track the intended state, so
now nested disable()s only call critical_region_enter() once, only
updating is_nested_critical_region once; and only the second enable()
call will call critical_region_exit, with the right value of i_n_c_r.
Finally, in port_sleep_until_interrupt, if !sd_enabled, we really do
need to __disable_irq, rather than using the common_hal_mcu routines;
the reason why is documented in a comment.
2020-07-14 18:34:45 -04:00
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if (nesting_count == 0) {
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// This is very very bad because it means there was mismatched disable/enables so we
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// crash.
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reset_into_safe_mode(HARD_CRASH);
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2020-01-30 09:52:06 -05:00
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}
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nRF: Always use sd_nvic_critical_region calls
The motivation for doing this is so that we can allow
common_hal_mcu_disable_interrupts in IRQ context, something that works
on other ports, but not on nRF with SD enabled. This is because
when SD is enabled, calling sd_softdevice_is_enabled in the context
of an interrupt with priority 2 or 3 causes a HardFault. We have chosen
to give the USB interrupt priority 2 on nRF, the highest priority that
is compatible with SD.
Since at least SoftDevice s130 v2.0.1, sd_nvic_critical_region_enter/exit
have been implemented as inline functions and are safe to call even if
softdevice is not enabled. Reference kindly provided by danh:
https://devzone.nordicsemi.com/f/nordic-q-a/29553/sd_nvic_critical_region_enter-exit-missing-in-s130-v2
Switching to these as the default/only way to enable/disable interrupts
simplifies things, and fixes several problems and potential problems:
* Interrupts at priority 2 or 3 could not call common_hal_mcu_disable_interrupts
because the call to sd_softdevice_is_enabled would HardFault
* Hypothetically, the state of sd_softdevice_is_enabled
could change from the disable to the enable call, meaning the calls
would not match (__disable_irq() could be balanced with
sd_nvic_critical_region_exit).
This also fixes a problem I believe would exist if disable() were called
twice when SD is enabled. There is a single "is_nested_critical_region"
flag, and the second call would set it to 1. Both of the enable()
calls that followed would call critical_region_exit(1), and interrupts
would not properly be reenabled. In the new version of the code,
we use our own nesting_count value to track the intended state, so
now nested disable()s only call critical_region_enter() once, only
updating is_nested_critical_region once; and only the second enable()
call will call critical_region_exit, with the right value of i_n_c_r.
Finally, in port_sleep_until_interrupt, if !sd_enabled, we really do
need to __disable_irq, rather than using the common_hal_mcu routines;
the reason why is documented in a comment.
2020-07-14 18:34:45 -04:00
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nesting_count--;
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if (nesting_count > 0) {
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return;
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}
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__DMB();
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sd_nvic_critical_region_exit(is_nested_critical_region);
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2017-12-21 07:49:14 -05:00
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}
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2018-01-03 16:50:57 -05:00
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void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) {
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2019-07-14 14:02:01 -04:00
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enum { DFU_MAGIC_UF2_RESET = 0x57 };
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2021-03-15 09:57:36 -04:00
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if (runmode == RUNMODE_BOOTLOADER) {
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2019-07-14 14:02:01 -04:00
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NRF_POWER->GPREGRET = DFU_MAGIC_UF2_RESET;
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2021-03-15 09:57:36 -04:00
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} else {
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2019-07-14 14:02:01 -04:00
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NRF_POWER->GPREGRET = 0;
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2021-03-15 09:57:36 -04:00
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}
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if (runmode == RUNMODE_SAFE_MODE) {
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2019-07-14 14:02:01 -04:00
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safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE);
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2021-03-15 09:57:36 -04:00
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}
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2018-01-03 16:50:57 -05:00
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}
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void common_hal_mcu_reset(void) {
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2018-06-27 14:14:25 -04:00
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filesystem_flush();
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2020-05-22 07:34:54 -04:00
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reset_cpu();
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2018-01-03 16:50:57 -05:00
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}
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// The singleton microcontroller.Processor object, bound to microcontroller.cpu
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2017-12-21 07:49:14 -05:00
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// It currently only has properties, and no state.
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2018-01-03 16:50:57 -05:00
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const mcu_processor_obj_t common_hal_mcu_processor_obj = {
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2017-12-21 07:49:14 -05:00
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.base = {
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.type = &mcu_processor_type,
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},
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};
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2018-08-30 21:42:25 -04:00
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2019-01-30 18:50:07 -05:00
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#if CIRCUITPY_INTERNAL_NVM_SIZE > 0
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// The singleton nvm.ByteArray object.
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const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = {
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.base = {
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.type = &nvm_bytearray_type,
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},
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2021-03-15 09:57:36 -04:00
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.start_address = (uint8_t *)CIRCUITPY_INTERNAL_NVM_START_ADDR,
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2019-10-20 23:50:12 -04:00
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.len = CIRCUITPY_INTERNAL_NVM_SIZE,
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2019-01-30 18:50:07 -05:00
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};
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#endif
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2020-05-21 01:47:23 -04:00
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#if CIRCUITPY_WATCHDOG
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2020-05-22 00:35:29 -04:00
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// The singleton watchdog.WatchDogTimer object.
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watchdog_watchdogtimer_obj_t common_hal_mcu_watchdogtimer_obj = {
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2020-05-21 01:47:23 -04:00
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.base = {
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2020-05-22 00:35:29 -04:00
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.type = &watchdog_watchdogtimer_type,
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2020-05-21 01:47:23 -04:00
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},
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2020-05-22 00:35:29 -04:00
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.timeout = 0.0f,
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.mode = WATCHDOGMODE_NONE,
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2020-05-21 01:47:23 -04:00
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};
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#endif
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2018-08-30 21:42:25 -04:00
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STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
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2021-03-15 09:57:36 -04:00
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{ MP_ROM_QSTR(MP_QSTR_P0_00), MP_ROM_PTR(&pin_P0_00) },
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{ MP_ROM_QSTR(MP_QSTR_P0_01), MP_ROM_PTR(&pin_P0_01) },
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{ MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) },
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{ MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) },
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{ MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) },
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{ MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) },
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{ MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) },
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{ MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) },
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{ MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) },
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{ MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) },
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{ MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) },
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{ MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) },
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{ MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) },
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{ MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) },
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{ MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) },
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{ MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) },
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{ MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) },
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{ MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) },
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{ MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) },
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{ MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) },
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{ MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) },
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{ MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) },
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{ MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) },
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{ MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) },
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{ MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) },
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{ MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) },
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{ MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) },
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{ MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_27) },
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{ MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) },
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{ MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) },
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{ MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) },
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{ MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) },
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#ifdef NRF52840
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{ MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) },
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{ MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) },
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{ MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) },
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{ MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) },
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{ MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) },
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{ MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) },
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{ MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) },
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{ MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) },
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{ MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) },
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{ MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) },
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{ MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) },
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{ MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) },
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{ MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) },
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{ MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) },
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{ MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) },
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{ MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) },
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#endif
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#ifdef NRF52833
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{ MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) },
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{ MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) },
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{ MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) },
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{ MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) },
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{ MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) },
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{ MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) },
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{ MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) },
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{ MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) },
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{ MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) },
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{ MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) },
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#endif
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2018-08-30 21:42:25 -04:00
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};
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MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);
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