circuitpython/ports/renesas-ra/fsp_cfg/r_dtc_cfg.h

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#ifndef R_DTC_CFG_H_
#define R_DTC_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define DTC_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#define DTC_CFG_VECTOR_TABLE_SECTION_NAME ".fsp_dtc_vector_table"
#ifdef __cplusplus
}
#endif
#endif /* R_DTC_CFG_H_ */