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circuitpython/ports/stm32/boards/PYBD_SF2/f722_qspi.ld

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stm32/boards: Add board definition files for PYBD -SF2, -SF3, -SF6. These are core configurations providing PYBv1.x-level features.
2019-05-31 08:17:02 -04:00
/*
Linker script for PYBD with STM32F722/STM32F723/STM32F732/STM32F733
Memory layout for mboot configuration (this here describes the app part):
FLASH_APP .isr_vector
FLASH_APP .text
FLASH_APP .data
stm32/boards/PYBD_SFx: Enable CYW43 WLAN driver.
2019-06-01 02:12:10 -04:00
FLASH_EXT .big_const
stm32/boards: Add board definition files for PYBD -SF2, -SF3, -SF6. These are core configurations providing PYBv1.x-level features.
2019-05-31 08:17:02 -04:00
RAM .data
RAM .bss
RAM .heap
RAM .stack
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sectors 0,1 */
FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 480K /* sectors 2-7 */
FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 2048K /* external QSPI */
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256K /* DTCM+SRAM1+SRAM2 */
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
stm32: In link script, define start of stack separately from heap end. Previously the end of the heap was the start (lowest address) of the stack. With the changes in this commit these addresses are now independent, allowing a board to place the heap and stack in separate locations.
2019-05-14 10:43:38 -04:00
/* Define the stack. The stack is full descending so begins just above last byte
of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
stm32: Enter bootloader via a system reset. Entering a bootloader (ST system bootloader, or custom mboot) from software by directly branching to it is not reliable, and the reliability of it working can depend on the peripherals that were enabled by the application code. It's also not possible to branch to a bootloader if the WDT is enabled (unless the bootloader has specific provisions to feed the WDT). This patch changes the way a bootloader is entered from software by first doing a complete system reset, then branching to the desired bootloader early on in the start-up process. The top two words of RAM (of the stack) are reserved to store flags indicating that the bootloader should be entered after a reset.
2019-06-22 07:26:03 -04:00
_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
stm32: In link script, define start of stack separately from heap end. Previously the end of the heap was the start (lowest address) of the stack. With the changes in this commit these addresses are now independent, allowing a board to place the heap and stack in separate locations.
2019-05-14 10:43:38 -04:00
_sstack = _estack - 16K;
stm32/boards: Add board definition files for PYBD -SF2, -SF3, -SF6. These are core configurations providing PYBv1.x-level features.
2019-05-31 08:17:02 -04:00
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
stm32: In link script, define start of stack separately from heap end. Previously the end of the heap was the start (lowest address) of the stack. With the changes in this commit these addresses are now independent, allowing a board to place the heap and stack in separate locations.
2019-05-14 10:43:38 -04:00
_heap_end = _sstack;
stm32/boards: Add board definition files for PYBD -SF2, -SF3, -SF6. These are core configurations providing PYBv1.x-level features.
2019-05-31 08:17:02 -04:00
ENTRY(Reset_Handler)
/* Define output sections */
SECTIONS
{
stm32/boards/PYBD_SFx: Enable CYW43 WLAN driver.
2019-06-01 02:12:10 -04:00
.text_ext :
{
stm32/boards/PYBD_SF2: Put mbedtls library code in external QSPI flash. mbedtls is large and self contained so is a good candidate to be in external XIP flash, to keep enough spare ROM in internal flash.
2019-07-03 02:50:02 -04:00
. = ALIGN(4);
stm32/boards/PYBD_SF2: Put BTstack library in external QSPI XIP flash. In the same way the nimble stack is put there.
2020-05-05 06:21:15 -04:00
*lib/btstack/*(.text* .rodata*)
stm32/boards/PYBD_SF2: Put mbedtls library code in external QSPI flash. mbedtls is large and self contained so is a good candidate to be in external XIP flash, to keep enough spare ROM in internal flash.
2019-07-03 02:50:02 -04:00
*lib/mbedtls/*(.text* .rodata*)
stm32/boards/PYBD_SF2: Put nimble library in external QSPI XIP flash. The BLE stack is not performance critical, so put it in external memory-mapped flash to save internal flash for other things (like frozen bytecode).
2019-10-05 09:51:33 -04:00
*lib/mynewt-nimble/*(.text* .rodata*)
stm32/boards/PYBD_SFx: Enable CYW43 WLAN driver.
2019-06-01 02:12:10 -04:00
. = ALIGN(512);
*(.big_const*)
. = ALIGN(4);
} >FLASH_EXT
stm32/boards: Add board definition files for PYBD -SF2, -SF3, -SF6. These are core configurations providing PYBv1.x-level features.
2019-05-31 08:17:02 -04:00
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector))
. = ALIGN(4);
} >FLASH_APP
.text :
{
. = ALIGN(4);
*(.text*)
*(.rodata*)
. = ALIGN(4);
_etext = .;
} >FLASH_APP
_sidata = LOADADDR(.data);
.data :
{
. = ALIGN(4);
_sdata = .;
*(.data*)
. = ALIGN(4);
_edata = .;
} >RAM AT> FLASH_APP
.bss :
{
. = ALIGN(4);
_sbss = .;
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .;
} >RAM
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
}
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