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circuitpython/py/asmx64.h

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Add license header to (almost) all files. Blanket wide to all .c and .h files. Some files originating from ST are difficult to deal with (license wise) so it was left out of those. Also merged modpyb.h, modos.h, modstm.h and modtime.h in stmhal/.
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/*
all: Use the name MicroPython consistently in comments There were several different spellings of MicroPython present in comments, when there should be only one.
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* This file is part of the MicroPython project, http://micropython.org/
Add license header to (almost) all files. Blanket wide to all .c and .h files. Some files originating from ST are difficult to deal with (license wise) so it was left out of those. Also merged modpyb.h, modos.h, modstm.h and modtime.h in stmhal/.
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*
* The MIT License (MIT)
*
* Copyright (c) 2013, 2014 Damien P. George
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
all: Unify header guard usage. The code conventions suggest using header guards, but do not define how those should look like and instead point to existing files. However, not all existing files follow the same scheme, sometimes omitting header guards altogether, sometimes using non-standard names, making it easy to accidentally pick a "wrong" example. This commit ensures that all header files of the MicroPython project (that were not simply copied from somewhere else) follow the same pattern, that was already present in the majority of files, especially in the py folder. The rules are as follows. Naming convention: * start with the words MICROPY_INCLUDED * contain the full path to the file * replace special characters with _ In addition, there are no empty lines before #ifndef, between #ifndef and one empty line before #endif. #endif is followed by a comment containing the name of the guard macro. py/grammar.h cannot use header guards by design, since it has to be included multiple times in a single C file. Several other files also do not need header guards as they are only used internally and guaranteed to be included only once: * MICROPY_MPHALPORT_H * mpconfigboard.h * mpconfigport.h * mpthreadport.h * pin_defs_*.h * qstrdefs*.h
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#ifndef MICROPY_INCLUDED_PY_ASMX64_H
#define MICROPY_INCLUDED_PY_ASMX64_H
py: Add guarded includes for asm-based headers.
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#include "py/mpconfig.h"
#include "py/misc.h"
py: Factor out common code from assemblers into asmbase.[ch]. All assemblers should "derive" from mp_asm_base_t.
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#include "py/asmbase.h"
Add license header to (almost) all files. Blanket wide to all .c and .h files. Some files originating from ST are difficult to deal with (license wise) so it was left out of those. Also merged modpyb.h, modos.h, modstm.h and modtime.h in stmhal/.
2014-05-03 18:27:38 -04:00
py: Clean up x86-64 native assembler; allow use of extended regs. Native x86-64 now has 3 locals in registers.
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// AMD64 calling convention is:
// - args pass in: RDI, RSI, RDX, RCX, R08, R09
// - return value in RAX
// - stack must be aligned on a 16-byte boundary before all calls
// - RAX, RCX, RDX, RSI, RDI, R08, R09, R10, R11 are caller-save
// - RBX, RBP, R12, R13, R14, R15 are callee-save
py: Implement more binary ops for viper emitter. This included a bit of restructuring of the assembler backends. Note that the ARM backend is missing a few functions and won't compile.
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// In the functions below, argument order follows x86 docs and generally
// the destination is the first argument.
// NOTE: this is a change from the old convention used in this file and
// some functions still use the old (reverse) convention.
py: Make macro names in assemblers consistent, and tidy up a bit.
2014-09-29 11:25:04 -04:00
#define ASM_X64_REG_RAX (0)
#define ASM_X64_REG_RCX (1)
#define ASM_X64_REG_RDX (2)
#define ASM_X64_REG_RBX (3)
#define ASM_X64_REG_RSP (4)
#define ASM_X64_REG_RBP (5)
#define ASM_X64_REG_RSI (6)
#define ASM_X64_REG_RDI (7)
#define ASM_X64_REG_R08 (8)
#define ASM_X64_REG_R09 (9)
#define ASM_X64_REG_R10 (10)
#define ASM_X64_REG_R11 (11)
#define ASM_X64_REG_R12 (12)
#define ASM_X64_REG_R13 (13)
#define ASM_X64_REG_R14 (14)
#define ASM_X64_REG_R15 (15)
Initial commit.
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Typo fix in comment.
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// condition codes, used for jcc and setcc (despite their j-name!)
py: Add support for emitting native x86 machine code.
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#define ASM_X64_CC_JB (0x2) // below, unsigned
#define ASM_X64_CC_JZ (0x4)
#define ASM_X64_CC_JE (0x4)
#define ASM_X64_CC_JNZ (0x5)
#define ASM_X64_CC_JNE (0x5)
#define ASM_X64_CC_JL (0xc) // less, signed
py: Implement more binary ops for viper emitter. This included a bit of restructuring of the assembler backends. Note that the ARM backend is missing a few functions and won't compile.
2014-09-29 13:45:42 -04:00
#define ASM_X64_CC_JGE (0xd) // greater or equal, signed
#define ASM_X64_CC_JLE (0xe) // less or equal, signed
py: Add store r8 and store r16 ops to asm_x86 and asm_x64.
2014-09-29 05:13:49 -04:00
#define ASM_X64_CC_JG (0xf) // greater, signed
Initial commit.
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py: Factor out common code from assemblers into asmbase.[ch]. All assemblers should "derive" from mp_asm_base_t.
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typedef struct _asm_x64_t {
mp_asm_base_t base;
int num_locals;
} asm_x64_t;
Initial commit.
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py: Factor out common code from assemblers into asmbase.[ch]. All assemblers should "derive" from mp_asm_base_t.
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static inline void asm_x64_end_pass(asm_x64_t *as) {
(void)as;
}
py: Implement full func arg passing for native emitter. This patch gets full function argument passing working with native emitter. Includes named args, keyword args, default args, var args and var keyword args. Fully Python compliant. It reuses the bytecode mp_setup_code_state function to do all the hard work. This function is slightly adjusted to accommodate native calls, and the native emitter is forced a bit to emit similar prelude and code-info as bytecode.
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Initial commit.
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void asm_x64_nop(asm_x64_t* as);
void asm_x64_push_r64(asm_x64_t* as, int src_r64);
void asm_x64_pop_r64(asm_x64_t* as, int dest_r64);
py: Implement more binary ops for viper emitter. This included a bit of restructuring of the assembler backends. Note that the ARM backend is missing a few functions and won't compile.
2014-09-29 13:45:42 -04:00
void asm_x64_mov_r64_r64(asm_x64_t* as, int dest_r64, int src_r64);
Initial commit.
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void asm_x64_mov_i64_to_r64(asm_x64_t* as, int64_t src_i64, int dest_r64);
void asm_x64_mov_i64_to_r64_optimised(asm_x64_t *as, int64_t src_i64, int dest_r64);
py, compiler: Improve passes; add an extra pass for native emitter.
2014-05-07 12:24:22 -04:00
void asm_x64_mov_i64_to_r64_aligned(asm_x64_t *as, int64_t src_i64, int dest_r64);
py: Implement native load for viper. Viper can now do: ptr8(buf)[0], which loads a byte from a buffer using machine instructions.
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void asm_x64_mov_r8_to_mem8(asm_x64_t *as, int src_r64, int dest_r64, int dest_disp);
void asm_x64_mov_r16_to_mem16(asm_x64_t *as, int src_r64, int dest_r64, int dest_disp);
py: Implement ptr32 load and store in viper emitter.
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void asm_x64_mov_r32_to_mem32(asm_x64_t *as, int src_r64, int dest_r64, int dest_disp);
py: Implement native load for viper. Viper can now do: ptr8(buf)[0], which loads a byte from a buffer using machine instructions.
2014-10-12 11:59:29 -04:00
void asm_x64_mov_r64_to_mem64(asm_x64_t *as, int src_r64, int dest_r64, int dest_disp);
void asm_x64_mov_mem8_to_r64zx(asm_x64_t *as, int src_r64, int src_disp, int dest_r64);
void asm_x64_mov_mem16_to_r64zx(asm_x64_t *as, int src_r64, int src_disp, int dest_r64);
py: Implement ptr32 load and store in viper emitter.
2015-10-12 19:50:17 -04:00
void asm_x64_mov_mem32_to_r64zx(asm_x64_t *as, int src_r64, int src_disp, int dest_r64);
py: Implement native load for viper. Viper can now do: ptr8(buf)[0], which loads a byte from a buffer using machine instructions.
2014-10-12 11:59:29 -04:00
void asm_x64_mov_mem64_to_r64(asm_x64_t *as, int src_r64, int src_disp, int dest_r64);
py: Implement and,or,xor native ops for viper.
2014-10-12 09:21:06 -04:00
void asm_x64_and_r64_r64(asm_x64_t *as, int dest_r64, int src_r64);
void asm_x64_or_r64_r64(asm_x64_t *as, int dest_r64, int src_r64);
py: Implement more binary ops for viper emitter. This included a bit of restructuring of the assembler backends. Note that the ARM backend is missing a few functions and won't compile.
2014-09-29 13:45:42 -04:00
void asm_x64_xor_r64_r64(asm_x64_t *as, int dest_r64, int src_r64);
void asm_x64_shl_r64_cl(asm_x64_t* as, int dest_r64);
void asm_x64_sar_r64_cl(asm_x64_t* as, int dest_r64);
void asm_x64_add_r64_r64(asm_x64_t* as, int dest_r64, int src_r64);
void asm_x64_sub_r64_r64(asm_x64_t* as, int dest_r64, int src_r64);
py: Implement native multiply operation in viper emitter.
2015-06-04 10:00:29 -04:00
void asm_x64_mul_r64_r64(asm_x64_t* as, int dest_r64, int src_r64);
Initial commit.
2013-10-04 14:53:11 -04:00
void asm_x64_cmp_r64_with_r64(asm_x64_t* as, int src_r64_a, int src_r64_b);
void asm_x64_test_r8_with_r8(asm_x64_t* as, int src_r64_a, int src_r64_b);
py/emitnative: Fix x86 native zero checks by comparing full word. On x86 archs (both 32 and 64 bit) a bool return value only sets the 8-bit al register, and the higher bits of the ax register have an undefined value. When testing the return value of such cases it is required to just test al for zero/non-zero. On the other hand, checking for truth or zero/non-zero on an integer return value requires checking all bits of the register. These two cases must be distinguished and handled correctly in generated native code. This patch makes sure of this. For other supported native archs (ARM, Thumb2, Xtensa) there is no such distinction and this patch does not change anything for them.
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void asm_x64_test_r64_with_r64(asm_x64_t *as, int src_r64_a, int src_r64_b);
Initial commit.
2013-10-04 14:53:11 -04:00
void asm_x64_setcc_r8(asm_x64_t* as, int jcc_type, int dest_r8);
py: Allow asmx64 to compile with -Wsign-compare. See issue #699.
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void asm_x64_jmp_label(asm_x64_t* as, mp_uint_t label);
void asm_x64_jcc_label(asm_x64_t* as, int jcc_type, mp_uint_t label);
Initial commit.
2013-10-04 14:53:11 -04:00
void asm_x64_entry(asm_x64_t* as, int num_locals);
void asm_x64_exit(asm_x64_t* as);
void asm_x64_mov_local_to_r64(asm_x64_t* as, int src_local_num, int dest_r64);
void asm_x64_mov_r64_to_local(asm_x64_t* as, int src_r64, int dest_local_num);
void asm_x64_mov_local_addr_to_r64(asm_x64_t* as, int local_num, int dest_r64);
void asm_x64_call_ind(asm_x64_t* as, void* ptr, int temp_r32);
py: Add guarded includes for asm-based headers.
2015-01-01 13:07:43 -05:00
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
2016-12-08 01:47:17 -05:00
#if GENERIC_ASM_API
// The following macros provide a (mostly) arch-independent API to
// generate native code, and are used by the native emitter.
#define ASM_WORD_SIZE (8)
#define REG_RET ASM_X64_REG_RAX
#define REG_ARG_1 ASM_X64_REG_RDI
#define REG_ARG_2 ASM_X64_REG_RSI
#define REG_ARG_3 ASM_X64_REG_RDX
#define REG_ARG_4 ASM_X64_REG_RCX
#define REG_ARG_5 ASM_X64_REG_R08
// caller-save
#define REG_TEMP0 ASM_X64_REG_RAX
#define REG_TEMP1 ASM_X64_REG_RDI
#define REG_TEMP2 ASM_X64_REG_RSI
// callee-save
#define REG_LOCAL_1 ASM_X64_REG_RBX
#define REG_LOCAL_2 ASM_X64_REG_R12
#define REG_LOCAL_3 ASM_X64_REG_R13
#define REG_LOCAL_NUM (3)
#define ASM_T asm_x64_t
#define ASM_END_PASS asm_x64_end_pass
#define ASM_ENTRY asm_x64_entry
#define ASM_EXIT asm_x64_exit
#define ASM_JUMP asm_x64_jmp_label
py/emitnative: Fix x86 native zero checks by comparing full word. On x86 archs (both 32 and 64 bit) a bool return value only sets the 8-bit al register, and the higher bits of the ax register have an undefined value. When testing the return value of such cases it is required to just test al for zero/non-zero. On the other hand, checking for truth or zero/non-zero on an integer return value requires checking all bits of the register. These two cases must be distinguished and handled correctly in generated native code. This patch makes sure of this. For other supported native archs (ARM, Thumb2, Xtensa) there is no such distinction and this patch does not change anything for them.
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#define ASM_JUMP_IF_REG_ZERO(as, reg, label, bool_test) \
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
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do { \
py/emitnative: Fix x86 native zero checks by comparing full word. On x86 archs (both 32 and 64 bit) a bool return value only sets the 8-bit al register, and the higher bits of the ax register have an undefined value. When testing the return value of such cases it is required to just test al for zero/non-zero. On the other hand, checking for truth or zero/non-zero on an integer return value requires checking all bits of the register. These two cases must be distinguished and handled correctly in generated native code. This patch makes sure of this. For other supported native archs (ARM, Thumb2, Xtensa) there is no such distinction and this patch does not change anything for them.
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if (bool_test) { \
asm_x64_test_r8_with_r8((as), (reg), (reg)); \
} else { \
asm_x64_test_r64_with_r64((as), (reg), (reg)); \
} \
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
2016-12-08 01:47:17 -05:00
asm_x64_jcc_label(as, ASM_X64_CC_JZ, label); \
} while (0)
py/emitnative: Fix x86 native zero checks by comparing full word. On x86 archs (both 32 and 64 bit) a bool return value only sets the 8-bit al register, and the higher bits of the ax register have an undefined value. When testing the return value of such cases it is required to just test al for zero/non-zero. On the other hand, checking for truth or zero/non-zero on an integer return value requires checking all bits of the register. These two cases must be distinguished and handled correctly in generated native code. This patch makes sure of this. For other supported native archs (ARM, Thumb2, Xtensa) there is no such distinction and this patch does not change anything for them.
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#define ASM_JUMP_IF_REG_NONZERO(as, reg, label, bool_test) \
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
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do { \
py/emitnative: Fix x86 native zero checks by comparing full word. On x86 archs (both 32 and 64 bit) a bool return value only sets the 8-bit al register, and the higher bits of the ax register have an undefined value. When testing the return value of such cases it is required to just test al for zero/non-zero. On the other hand, checking for truth or zero/non-zero on an integer return value requires checking all bits of the register. These two cases must be distinguished and handled correctly in generated native code. This patch makes sure of this. For other supported native archs (ARM, Thumb2, Xtensa) there is no such distinction and this patch does not change anything for them.
2018-08-04 08:03:49 -04:00
if (bool_test) { \
asm_x64_test_r8_with_r8((as), (reg), (reg)); \
} else { \
asm_x64_test_r64_with_r64((as), (reg), (reg)); \
} \
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
2016-12-08 01:47:17 -05:00
asm_x64_jcc_label(as, ASM_X64_CC_JNZ, label); \
} while (0)
#define ASM_JUMP_IF_REG_EQ(as, reg1, reg2, label) \
do { \
asm_x64_cmp_r64_with_r64(as, reg1, reg2); \
asm_x64_jcc_label(as, ASM_X64_CC_JE, label); \
} while (0)
#define ASM_CALL_IND(as, ptr, idx) asm_x64_call_ind(as, ptr, ASM_X64_REG_RAX)
py/emitnative: Clean up asm macro names so they have dest as first arg. All the asm macro names that convert a particular architecture to a generic interface now follow the convention whereby the "destination" (usually a register) is specified first.
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#define ASM_MOV_LOCAL_REG(as, local_num, reg_src) asm_x64_mov_r64_to_local((as), (reg_src), (local_num))
#define ASM_MOV_REG_IMM(as, reg_dest, imm) asm_x64_mov_i64_to_r64_optimised((as), (imm), (reg_dest))
#define ASM_MOV_REG_ALIGNED_IMM(as, reg_dest, imm) asm_x64_mov_i64_to_r64_aligned((as), (imm), (reg_dest))
#define ASM_MOV_REG_LOCAL(as, reg_dest, local_num) asm_x64_mov_local_to_r64((as), (local_num), (reg_dest))
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
2016-12-08 01:47:17 -05:00
#define ASM_MOV_REG_REG(as, reg_dest, reg_src) asm_x64_mov_r64_r64((as), (reg_dest), (reg_src))
py/emitnative: Clean up asm macro names so they have dest as first arg. All the asm macro names that convert a particular architecture to a generic interface now follow the convention whereby the "destination" (usually a register) is specified first.
2017-11-14 19:46:49 -05:00
#define ASM_MOV_REG_LOCAL_ADDR(as, reg_dest, local_num) asm_x64_mov_local_addr_to_r64((as), (local_num), (reg_dest))
py: Move arch-specific assembler macros from emitnative to asmXXX.h.
2016-12-08 01:47:17 -05:00
#define ASM_LSL_REG(as, reg) asm_x64_shl_r64_cl((as), (reg))
#define ASM_ASR_REG(as, reg) asm_x64_sar_r64_cl((as), (reg))
#define ASM_OR_REG_REG(as, reg_dest, reg_src) asm_x64_or_r64_r64((as), (reg_dest), (reg_src))
#define ASM_XOR_REG_REG(as, reg_dest, reg_src) asm_x64_xor_r64_r64((as), (reg_dest), (reg_src))
#define ASM_AND_REG_REG(as, reg_dest, reg_src) asm_x64_and_r64_r64((as), (reg_dest), (reg_src))
#define ASM_ADD_REG_REG(as, reg_dest, reg_src) asm_x64_add_r64_r64((as), (reg_dest), (reg_src))
#define ASM_SUB_REG_REG(as, reg_dest, reg_src) asm_x64_sub_r64_r64((as), (reg_dest), (reg_src))
#define ASM_MUL_REG_REG(as, reg_dest, reg_src) asm_x64_mul_r64_r64((as), (reg_dest), (reg_src))
#define ASM_LOAD_REG_REG(as, reg_dest, reg_base) asm_x64_mov_mem64_to_r64((as), (reg_base), 0, (reg_dest))
#define ASM_LOAD_REG_REG_OFFSET(as, reg_dest, reg_base, word_offset) asm_x64_mov_mem64_to_r64((as), (reg_base), 8 * (word_offset), (reg_dest))
#define ASM_LOAD8_REG_REG(as, reg_dest, reg_base) asm_x64_mov_mem8_to_r64zx((as), (reg_base), 0, (reg_dest))
#define ASM_LOAD16_REG_REG(as, reg_dest, reg_base) asm_x64_mov_mem16_to_r64zx((as), (reg_base), 0, (reg_dest))
#define ASM_LOAD32_REG_REG(as, reg_dest, reg_base) asm_x64_mov_mem32_to_r64zx((as), (reg_base), 0, (reg_dest))
#define ASM_STORE_REG_REG(as, reg_src, reg_base) asm_x64_mov_r64_to_mem64((as), (reg_src), (reg_base), 0)
#define ASM_STORE_REG_REG_OFFSET(as, reg_src, reg_base, word_offset) asm_x64_mov_r64_to_mem64((as), (reg_src), (reg_base), 8 * (word_offset))
#define ASM_STORE8_REG_REG(as, reg_src, reg_base) asm_x64_mov_r8_to_mem8((as), (reg_src), (reg_base), 0)
#define ASM_STORE16_REG_REG(as, reg_src, reg_base) asm_x64_mov_r16_to_mem16((as), (reg_src), (reg_base), 0)
#define ASM_STORE32_REG_REG(as, reg_src, reg_base) asm_x64_mov_r32_to_mem32((as), (reg_src), (reg_base), 0)
#endif // GENERIC_ASM_API
all: Unify header guard usage. The code conventions suggest using header guards, but do not define how those should look like and instead point to existing files. However, not all existing files follow the same scheme, sometimes omitting header guards altogether, sometimes using non-standard names, making it easy to accidentally pick a "wrong" example. This commit ensures that all header files of the MicroPython project (that were not simply copied from somewhere else) follow the same pattern, that was already present in the majority of files, especially in the py folder. The rules are as follows. Naming convention: * start with the words MICROPY_INCLUDED * contain the full path to the file * replace special characters with _ In addition, there are no empty lines before #ifndef, between #ifndef and one empty line before #endif. #endif is followed by a comment containing the name of the guard macro. py/grammar.h cannot use header guards by design, since it has to be included multiple times in a single C file. Several other files also do not need header guards as they are only used internally and guaranteed to be included only once: * MICROPY_MPHALPORT_H * mpconfigboard.h * mpconfigport.h * mpthreadport.h * pin_defs_*.h * qstrdefs*.h
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#endif // MICROPY_INCLUDED_PY_ASMX64_H
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