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circuitpython/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk

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stm32/boards: Add new board B_L475E_IOT01A based on STM32L475.
2017-09-03 07:57:57 -04:00
MCU_SERIES = l4
CMSIS_MCU = STM32L475xx
# The stm32l475 does not have a LDC controller which is
stm32/boards: Optimise flash and RAM allocation for L4 boards. Optimisations are: - Remove FLASH_ISR section since devices with a small flash sector erase size don't need special FLASH_ISR handling. This reduces flash image by approx 1.5k. - Make SRAM2 contiguous with SRAM1 where possible. - Simplify configuration of 2k RAM buffer used for flash filesystem. RAM changes with this commit: - L432: stack 6k -> 10k, bss + heap 42k -> 52k - L476: stack 16k -> 30k, bss + heap 80k -> 96k - L496: stack 206k -> 16k, bss + heap 112k -> 302k
2019-05-12 10:13:59 -04:00
# the only difference to the stm32l476 - so reuse some files.
stm32/boards: Add new board B_L475E_IOT01A based on STM32L475.
2017-09-03 07:57:57 -04:00
AF_FILE = boards/stm32l476_af.csv
stm32/boards: Optimise flash and RAM allocation for L4 boards. Optimisations are: - Remove FLASH_ISR section since devices with a small flash sector erase size don't need special FLASH_ISR handling. This reduces flash image by approx 1.5k. - Make SRAM2 contiguous with SRAM1 where possible. - Simplify configuration of 2k RAM buffer used for flash filesystem. RAM changes with this commit: - L432: stack 6k -> 10k, bss + heap 42k -> 52k - L476: stack 16k -> 30k, bss + heap 80k -> 96k - L496: stack 206k -> 16k, bss + heap 112k -> 302k
2019-05-12 10:13:59 -04:00
LD_FILES = boards/stm32l476xg.ld boards/common_basic.ld
stm32/boards: Add new board B_L475E_IOT01A based on STM32L475.
2017-09-03 07:57:57 -04:00
OPENOCD_CONFIG = boards/openocd_stm32l4.cfg