455 lines
22 KiB
C
455 lines
22 KiB
C
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/**
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******************************************************************************
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* @file stm32f4xx_hal_usart.h
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* @author MCD Application Team
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* @version V1.0.0
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* @date 18-February-2014
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* @brief Header file of USART HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F4xx_HAL_USART_H
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#define __STM32F4xx_HAL_USART_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal_def.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup USART
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief USART Init Structure definition
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*/
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typedef struct
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{
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uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
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The baud rate is computed using the following formula:
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- IntegerDivider = ((PCLKx) / (8 * (hirda->Init.BaudRate)))
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- FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */
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uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
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This parameter can be a value of @ref USART_Word_Length */
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uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
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This parameter can be a value of @ref USART_Stop_Bits */
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uint32_t Parity; /*!< Specifies the parity mode.
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This parameter can be a value of @ref USART_Parity
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@note When parity is enabled, the computed parity is inserted
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at the MSB position of the transmitted data (9th bit when
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the word length is set to 9 data bits; 8th bit when the
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word length is set to 8 data bits). */
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uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
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This parameter can be a value of @ref USART_Mode */
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uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
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This parameter can be a value of @ref USART_Clock_Polarity */
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uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
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This parameter can be a value of @ref USART_Clock_Phase */
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uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
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data bit (MSB) has to be output on the SCLK pin in synchronous mode.
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This parameter can be a value of @ref USART_Last_Bit */
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}USART_InitTypeDef;
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/**
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* @brief HAL State structures definition
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*/
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typedef enum
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{
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HAL_USART_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */
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HAL_USART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
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HAL_USART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
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HAL_USART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
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HAL_USART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
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HAL_USART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission Reception process is ongoing */
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HAL_USART_STATE_TIMEOUT = 0x03, /*!< Timeout state */
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HAL_USART_STATE_ERROR = 0x04 /*!< Error */
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}HAL_USART_StateTypeDef;
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/**
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* @brief HAL USART Error Code structure definition
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*/
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typedef enum
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{
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HAL_USART_ERROR_NONE = 0x00, /*!< No error */
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HAL_USART_ERROR_PE = 0x01, /*!< Parity error */
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HAL_USART_ERROR_NE = 0x02, /*!< Noise error */
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HAL_USART_ERROR_FE = 0x04, /*!< frame error */
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HAL_USART_ERROR_ORE = 0x08, /*!< Overrun error */
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HAL_USART_ERROR_DMA = 0x10 /*!< DMA transfer error */
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}HAL_USART_ErrorTypeDef;
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/**
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* @brief USART handle Structure definition
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*/
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typedef struct
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{
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USART_TypeDef *Instance; /* USART registers base address */
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USART_InitTypeDef Init; /* Usart communication parameters */
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uint8_t *pTxBuffPtr; /* Pointer to Usart Tx transfer Buffer */
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uint16_t TxXferSize; /* Usart Tx Transfer size */
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__IO uint16_t TxXferCount; /* Usart Tx Transfer Counter */
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uint8_t *pRxBuffPtr; /* Pointer to Usart Rx transfer Buffer */
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uint16_t RxXferSize; /* Usart Rx Transfer size */
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__IO uint16_t RxXferCount; /* Usart Rx Transfer Counter */
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DMA_HandleTypeDef *hdmatx; /* Usart Tx DMA Handle parameters */
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DMA_HandleTypeDef *hdmarx; /* Usart Rx DMA Handle parameters */
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HAL_LockTypeDef Lock; /* Locking object */
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__IO HAL_USART_StateTypeDef State; /* Usart communication state */
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__IO HAL_USART_ErrorTypeDef ErrorCode; /* USART Error code */
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}USART_HandleTypeDef;
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup USART_Exported_Constants
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* @{
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*/
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/** @defgroup USART_Word_Length
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* @{
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*/
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#define USART_WORDLENGTH_8B ((uint32_t)0x00000000)
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#define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
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#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WORDLENGTH_8B) || \
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((LENGTH) == USART_WORDLENGTH_9B))
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/**
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* @}
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*/
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/** @defgroup USART_Stop_Bits
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* @{
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*/
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#define USART_STOPBITS_1 ((uint32_t)0x00000000)
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#define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0)
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#define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
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#define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1))
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#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \
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((STOPBITS) == USART_STOPBITS_0_5) || \
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((STOPBITS) == USART_STOPBITS_1_5) || \
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((STOPBITS) == USART_STOPBITS_2))
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/**
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* @}
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*/
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/** @defgroup USART_Parity
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* @{
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*/
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#define USART_PARITY_NONE ((uint32_t)0x00000000)
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#define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
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#define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
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#define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \
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((PARITY) == USART_PARITY_EVEN) || \
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((PARITY) == USART_PARITY_ODD))
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/**
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* @}
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*/
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/** @defgroup USART_Mode
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* @{
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*/
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#define USART_MODE_RX ((uint32_t)USART_CR1_RE)
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#define USART_MODE_TX ((uint32_t)USART_CR1_TE)
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#define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
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#define IS_USART_MODE(MODE) ((((MODE) & (uint32_t)0xFFF3) == 0x00) && ((MODE) != (uint32_t)0x00))
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/**
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* @}
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*/
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/** @defgroup USART_Clock
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* @{
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*/
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#define USART_CLOCK_DISABLED ((uint32_t)0x00000000)
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#define USART_CLOCK_ENABLED ((uint32_t)USART_CR2_CLKEN)
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#define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLED) || \
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((CLOCK) == USART_CLOCK_ENABLED))
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/**
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* @}
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*/
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/** @defgroup USART_Clock_Polarity
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* @{
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*/
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#define USART_POLARITY_LOW ((uint32_t)0x00000000)
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#define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL)
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#define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH))
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/**
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* @}
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*/
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/** @defgroup USART_Clock_Phase
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* @{
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*/
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#define USART_PHASE_1EDGE ((uint32_t)0x00000000)
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#define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA)
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#define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE))
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/**
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* @}
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*/
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/** @defgroup USART_Last_Bit
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* @{
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*/
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#define USART_LASTBIT_DISABLE ((uint32_t)0x00000000)
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#define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL)
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#define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \
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((LASTBIT) == USART_LASTBIT_ENABLE))
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/**
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* @}
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*/
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/** @defgroup Usart_NACK_State
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* @{
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*/
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#define USARTNACK_ENABLED ((uint32_t)USART_CR3_NACK)
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#define USARTNACK_DISABLED ((uint32_t)0x00000000)
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#define IS_USART_NACK_STATE(NACK) (((NACK) == USARTNACK_ENABLED) || \
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((NACK) == USARTNACK_DISABLED))
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/**
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* @}
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*/
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/** @defgroup Usart_Flags
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* Elements values convention: 0xXXXX
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* - 0xXXXX : Flag mask in the SR register
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* @{
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*/
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#define USART_FLAG_TXE ((uint32_t)0x00000080)
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#define USART_FLAG_TC ((uint32_t)0x00000040)
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#define USART_FLAG_RXNE ((uint32_t)0x00000020)
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#define USART_FLAG_IDLE ((uint32_t)0x00000010)
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#define USART_FLAG_ORE ((uint32_t)0x00000008)
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#define USART_FLAG_NE ((uint32_t)0x00000004)
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#define USART_FLAG_FE ((uint32_t)0x00000002)
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#define USART_FLAG_PE ((uint32_t)0x00000001)
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/**
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* @}
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*/
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/** @defgroup USART_Interrupt_definition
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* Elements values convention: 0xY000XXXX
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* - XXXX : Interrupt mask in the XX register
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* - Y : Interrupt source register (2bits)
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* - 01: CR1 register
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* - 10: CR2 register
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* - 11: CR3 register
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*
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* @{
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*/
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#define USART_IT_PE ((uint32_t)0x10000100)
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#define USART_IT_TXE ((uint32_t)0x10000080)
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#define USART_IT_TC ((uint32_t)0x10000040)
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#define USART_IT_RXNE ((uint32_t)0x10000020)
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#define USART_IT_IDLE ((uint32_t)0x10000010)
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#define USART_IT_LBD ((uint32_t)0x20000040)
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#define USART_IT_CTS ((uint32_t)0x30000400)
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#define USART_IT_ERR ((uint32_t)0x30000001)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @brief Checks whether the specified Smartcard flag is set or not.
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* @param __HANDLE__: specifies the USART Handle.
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* This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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* UART peripheral.
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* @param __FLAG__: specifies the flag to check.
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* This parameter can be one of the following values:
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* @arg USART_FLAG_TXE: Transmit data register empty flag
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* @arg USART_FLAG_TC: Transmission Complete flag
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* @arg USART_FLAG_RXNE: Receive data register not empty flag
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* @arg USART_FLAG_IDLE: Idle Line detection flag
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* @arg USART_FLAG_ORE: OverRun Error flag
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* @arg USART_FLAG_NE: Noise Error flag
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* @arg USART_FLAG_FE: Framing Error flag
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* @arg USART_FLAG_PE: Parity Error flag
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* @retval The new state of __FLAG__ (TRUE or FALSE).
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*/
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#define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
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/** @brief Clears the specified Smartcard pending flags.
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* @param __HANDLE__: specifies the USART Handle.
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* This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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* UART peripheral.
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* @param __FLAG__: specifies the flag to check.
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* This parameter can be any combination of the following values:
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* @arg USART_FLAG_TC: Transmission Complete flag.
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* @arg USART_FLAG_RXNE: Receive data register not empty flag.
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*
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* @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
|
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|
|
* error) and IDLE (Idle line detected) flags are cleared by software
|
||
|
|
* sequence: a read operation to USART_SR register followed by a read
|
||
|
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* operation to USART_DR register.
|
||
|
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* @note RXNE flag can be also cleared by a read to the USART_DR register.
|
||
|
|
* @note TC flag can be also cleared by software sequence: a read operation to
|
||
|
|
* USART_SR register followed by a write operation to USART_DR register.
|
||
|
|
* @note TXE flag is cleared only by a write to the USART_DR register.
|
||
|
|
*
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
#define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__))
|
||
|
|
|
||
|
|
|
||
|
|
/** @brief Enables or disables the specified Usart interrupts.
|
||
|
|
* @param __HANDLE__: specifies the USART Handle.
|
||
|
|
* This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
|
||
|
|
* UART peripheral.
|
||
|
|
* @param __INTERRUPT__: specifies the USART interrupt source to check.
|
||
|
|
* This parameter can be one of the following values:
|
||
|
|
* @arg USART_IT_TXE: Transmit Data Register empty interrupt
|
||
|
|
* @arg USART_IT_TC: Transmission complete interrupt
|
||
|
|
* @arg USART_IT_RXNE: Receive Data register not empty interrupt
|
||
|
|
* @arg USART_IT_IDLE: Idle line detection interrupt
|
||
|
|
* @arg USART_IT_PE: Parity Error interrupt
|
||
|
|
* @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
||
|
|
* @param NewState: new state of the specified Usart interrupt.
|
||
|
|
* This parameter can be: ENABLE or DISABLE.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
#define USART_IT_MASK ((uint32_t)0x0000FFFF)
|
||
|
|
#define __USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & USART_IT_MASK)): \
|
||
|
|
(((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & USART_IT_MASK)): \
|
||
|
|
((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & USART_IT_MASK)))
|
||
|
|
#define __USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
|
||
|
|
(((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
|
||
|
|
((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK)))
|
||
|
|
|
||
|
|
|
||
|
|
/** @brief Checks whether the specified Usart interrupt has occurred or not.
|
||
|
|
* @param __HANDLE__: specifies the USART Handle.
|
||
|
|
* This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
|
||
|
|
* UART peripheral.
|
||
|
|
* @param __IT__: specifies the USART interrupt source to check.
|
||
|
|
* This parameter can be one of the following values:
|
||
|
|
* @arg USART_IT_TXE: Transmit Data Register empty interrupt
|
||
|
|
* @arg USART_IT_TC: Transmission complete interrupt
|
||
|
|
* @arg USART_IT_RXNE: Receive Data register not empty interrupt
|
||
|
|
* @arg USART_IT_IDLE: Idle line detection interrupt
|
||
|
|
* @arg USART_IT_ERR: Error interrupt
|
||
|
|
* @arg USART_IT_PE: Parity Error interrupt
|
||
|
|
* @retval The new state of __IT__ (TRUE or FALSE).
|
||
|
|
*/
|
||
|
|
#define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == 1)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == 2)? \
|
||
|
|
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK))
|
||
|
|
|
||
|
|
#define __USART_ENABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
|
||
|
|
#define __USART_DISABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
|
||
|
|
|
||
|
|
#define __DIV(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_)))
|
||
|
|
#define __DIVMANT(_PCLK_, _BAUD_) (__DIV((_PCLK_), (_BAUD_))/100)
|
||
|
|
#define __DIVFRAQ(_PCLK_, _BAUD_) (((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
|
||
|
|
#define __USART_BRR(_PCLK_, _BAUD_) ((__DIVMANT((_PCLK_), (_BAUD_)) << 4)|(__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F))
|
||
|
|
|
||
|
|
#define IS_USART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001)
|
||
|
|
|
||
|
|
/* Exported functions --------------------------------------------------------*/
|
||
|
|
/* Initialization/de-initialization functions **********************************/
|
||
|
|
HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
|
||
|
|
HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
|
||
|
|
void HAL_USART_MspInit(USART_HandleTypeDef *husart);
|
||
|
|
void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
|
||
|
|
/* IO operation functions *******************************************************/
|
||
|
|
HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
|
||
|
|
HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
|
||
|
|
HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
|
||
|
|
HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
|
||
|
|
HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
|
||
|
|
HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
|
||
|
|
HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
|
||
|
|
HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
|
||
|
|
HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
|
||
|
|
HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
|
||
|
|
HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
|
||
|
|
HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
|
||
|
|
void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
|
||
|
|
void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
|
||
|
|
void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
|
||
|
|
void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
|
||
|
|
void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
|
||
|
|
void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
|
||
|
|
void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
|
||
|
|
|
||
|
|
/* Peripheral State functions **************************************************/
|
||
|
|
HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
|
||
|
|
uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* __STM32F4xx_HAL_USART_H */
|
||
|
|
|
||
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|