2016-06-07 15:40:56 -04:00
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2015 David Ogilvy (MetalPhreak)
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* Modified 2016 by Radomir Dopieralski
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef SPI_APP_H
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#define SPI_APP_H
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#include "hspi_register.h"
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#include "ets_sys.h"
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#include "osapi.h"
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#include "os_type.h"
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// Define SPI hardware modules
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#define SPI 0
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#define HSPI 1
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#define SPI_CLK_USE_DIV 0
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#define SPI_CLK_80MHZ_NODIV 1
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#define SPI_BYTE_ORDER_HIGH_TO_LOW 1
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#define SPI_BYTE_ORDER_LOW_TO_HIGH 0
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#ifndef CPU_CLK_FREQ // Should already be defined in eagle_soc.h
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#define CPU_CLK_FREQ (80 * 1000000)
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#endif
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// Define some default SPI clock settings
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#define SPI_CLK_PREDIV 10
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#define SPI_CLK_CNTDIV 2
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#define SPI_CLK_FREQ (CPU_CLK_FREQ / (SPI_CLK_PREDIV * SPI_CLK_CNTDIV))
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// 80 / 20 = 4 MHz
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void spi_init(uint8_t spi_no);
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2022-05-04 23:28:32 -04:00
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void spi_mode(uint8_t spi_no, uint8_t spi_cpha, uint8_t spi_cpol);
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2016-06-07 15:40:56 -04:00
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void spi_init_gpio(uint8_t spi_no, uint8_t sysclk_as_spiclk);
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void spi_clock(uint8_t spi_no, uint16_t prediv, uint8_t cntdiv);
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void spi_tx_byte_order(uint8_t spi_no, uint8_t byte_order);
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void spi_rx_byte_order(uint8_t spi_no, uint8_t byte_order);
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uint32_t spi_transaction(uint8_t spi_no, uint8_t cmd_bits, uint16_t cmd_data,
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uint32_t addr_bits, uint32_t addr_data,
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uint32_t dout_bits, uint32_t dout_data,
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uint32_t din_bits, uint32_t dummy_bits);
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void spi_tx8fast(uint8_t spi_no, uint8_t dout_data);
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// Expansion Macros
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#define spi_busy(spi_no) READ_PERI_REG(SPI_CMD(spi_no)) & SPI_USR
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#define spi_txd(spi_no, bits, data) spi_transaction(spi_no, 0, 0, 0, 0, bits, (uint32_t)data, 0, 0)
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#define spi_tx8(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 8, (uint32_t)data, 0, 0)
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#define spi_tx16(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 16, (uint32_t)data, 0, 0)
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#define spi_tx32(spi_no, data) spi_transaction(spi_no, 0, 0, 0, 0, 32, (uint32_t)data, 0, 0)
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#define spi_rxd(spi_no, bits) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, bits, 0)
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#define spi_rx8(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 8, 0)
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#define spi_rx16(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 16, 0)
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#define spi_rx32(spi_no) spi_transaction(spi_no, 0, 0, 0, 0, 0, 0, 32, 0)
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#endif
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