2016-09-02 20:00:30 -04:00
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/*
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* This file is part of the Micro Python project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include <string.h>
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2016-10-13 17:53:31 -04:00
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#include "asf/sam0/drivers/sercom/spi/spi.h"
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2016-09-02 20:00:30 -04:00
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#include "py/obj.h"
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#include "py/runtime.h"
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#include "lib/fatfs/ff.h"
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#include "extmod/fsusermount.h"
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#include "asf/sam0/drivers/nvm/nvm.h"
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2016-10-13 17:53:31 -04:00
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#include "spi_flash.h"
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#define TOTAL_SPI_FLASH_SIZE 0x010000
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#define SPI_FLASH_MEM_SEG1_START_ADDR (0x00040000 - TOTAL_SPI_FLASH_SIZE)
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#define SPI_FLASH_PART1_START_BLOCK (0x100)
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#define SPI_FLASH_PART1_NUM_BLOCKS (TOTAL_SPI_FLASH_SIZE / SPI_FLASH_BLOCK_SIZE)
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static bool spi_flash_is_initialised = false;
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struct spi_module spi_flash_instance;
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2016-10-13 17:53:31 -04:00
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void spi_flash_init(void) {
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if (!spi_flash_is_initialised) {
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struct spi_config config_spi_master;
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spi_get_config_defaults(&config_spi_master);
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config_spi_master.mux_setting = SPI_FLASH_MUX_SETTING;
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config_spi_master.pinmux_pad0 = SPI_FLASH_PAD0_PINMUX;
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config_spi_master.pinmux_pad1 = SPI_FLASH_PAD1_PINMUX;
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config_spi_master.pinmux_pad2 = SPI_FLASH_PAD2_PINMUX;
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config_spi_master.pinmux_pad3 = SPI_FLASH_PAD3_PINMUX;
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config_spi_master.mode_specific.master.baudrate = SPI_FLASH_BAUDRATE;
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spi_init(&spi_flash_instance, SPI_FLASH_SERCOM, &config_spi_master);
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spi_enable(&spi_flash_instance);
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}
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}
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uint32_t spi_flash_get_block_size(void) {
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return SPI_FLASH_BLOCK_SIZE;
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}
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uint32_t spi_flash_get_block_count(void) {
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return SPI_FLASH_PART1_START_BLOCK + SPI_FLASH_PART1_NUM_BLOCKS;
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}
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void spi_flash_flush(void) {
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}
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static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_block, uint32_t num_blocks) {
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buf[0] = boot;
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if (num_blocks == 0) {
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buf[1] = 0;
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buf[2] = 0;
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buf[3] = 0;
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} else {
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buf[1] = 0xff;
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buf[2] = 0xff;
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buf[3] = 0xff;
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}
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buf[4] = type;
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if (num_blocks == 0) {
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buf[5] = 0;
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buf[6] = 0;
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buf[7] = 0;
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} else {
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buf[5] = 0xff;
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buf[6] = 0xff;
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buf[7] = 0xff;
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}
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buf[8] = start_block;
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buf[9] = start_block >> 8;
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buf[10] = start_block >> 16;
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buf[11] = start_block >> 24;
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buf[12] = num_blocks;
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buf[13] = num_blocks >> 8;
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buf[14] = num_blocks >> 16;
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buf[15] = num_blocks >> 24;
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}
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static uint32_t convert_block_to_flash_addr(uint32_t block) {
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if (SPI_FLASH_PART1_START_BLOCK <= block && block < SPI_FLASH_PART1_START_BLOCK + SPI_FLASH_PART1_NUM_BLOCKS) {
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// a block in partition 1
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block -= SPI_FLASH_PART1_START_BLOCK;
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return SPI_FLASH_MEM_SEG1_START_ADDR + block * SPI_FLASH_BLOCK_SIZE;
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}
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// bad block
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return -1;
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}
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bool spi_flash_read_block(uint8_t *dest, uint32_t block) {
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//printf("RD %u\n", block);
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if (block == 0) {
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// fake the MBR so we can decide on our own partition table
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for (int i = 0; i < 446; i++) {
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dest[i] = 0;
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}
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build_partition(dest + 446, 0, 0x01 /* FAT12 */, SPI_FLASH_PART1_START_BLOCK, SPI_FLASH_PART1_NUM_BLOCKS);
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build_partition(dest + 462, 0, 0, 0, 0);
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build_partition(dest + 478, 0, 0, 0, 0);
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build_partition(dest + 494, 0, 0, 0, 0);
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dest[510] = 0x55;
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dest[511] = 0xaa;
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return true;
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} else {
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// non-MBR block, get data from flash memory
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uint32_t src = convert_block_to_flash_addr(block);
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if (src == -1) {
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// bad block number
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return false;
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}
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enum status_code error_code;
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// A block is made up of multiple pages. Read each page
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// sequentially.
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for (int i = 0; i < SPI_FLASH_BLOCK_SIZE / NVMCTRL_PAGE_SIZE; i++) {
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do
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{
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error_code = nvm_read_buffer(src + i * NVMCTRL_PAGE_SIZE,
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dest + i * NVMCTRL_PAGE_SIZE,
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NVMCTRL_PAGE_SIZE);
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} while (error_code == STATUS_BUSY);
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}
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return true;
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}
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}
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bool spi_flash_write_block(const uint8_t *src, uint32_t block) {
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if (block == 0) {
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// can't write MBR, but pretend we did
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return true;
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} else {
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// non-MBR block, copy to cache
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volatile uint32_t dest = convert_block_to_flash_addr(block);
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if (dest == -1) {
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// bad block number
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return false;
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}
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enum status_code error_code;
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// A block is formed by two rows of flash. We must erase each row
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// before we write back to it.
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do
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{
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error_code = nvm_erase_row(dest);
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} while (error_code == STATUS_BUSY);
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if (error_code != STATUS_OK) {
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return false;
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}
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do
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{
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error_code = nvm_erase_row(dest + NVMCTRL_ROW_SIZE);
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} while (error_code == STATUS_BUSY);
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if (error_code != STATUS_OK) {
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return false;
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}
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// A block is made up of multiple pages. Write each page
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// sequentially.
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for (int i = 0; i < SPI_FLASH_BLOCK_SIZE / NVMCTRL_PAGE_SIZE; i++) {
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do
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{
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error_code = nvm_write_buffer(dest + i * NVMCTRL_PAGE_SIZE,
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src + i * NVMCTRL_PAGE_SIZE,
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NVMCTRL_PAGE_SIZE);
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} while (error_code == STATUS_BUSY);
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if (error_code != STATUS_OK) {
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return false;
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}
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}
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return true;
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}
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}
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2016-10-13 17:53:31 -04:00
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mp_uint_t spi_flash_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) {
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for (size_t i = 0; i < num_blocks; i++) {
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if (!spi_flash_read_block(dest + i * SPI_FLASH_BLOCK_SIZE, block_num + i)) {
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return 1; // error
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}
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}
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return 0; // success
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}
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2016-10-13 17:53:31 -04:00
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mp_uint_t spi_flash_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) {
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for (size_t i = 0; i < num_blocks; i++) {
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if (!spi_flash_write_block(src + i * SPI_FLASH_BLOCK_SIZE, block_num + i)) {
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return 1; // error
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}
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}
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return 0; // success
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}
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/******************************************************************************/
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// MicroPython bindings
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//
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// Expose the flash as an object with the block protocol.
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// there is a singleton Flash object
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STATIC const mp_obj_base_t spi_flash_obj = {&spi_flash_type};
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STATIC mp_obj_t spi_flash_obj_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
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// check arguments
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mp_arg_check_num(n_args, n_kw, 0, 0, false);
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// return singleton object
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return (mp_obj_t)&spi_flash_obj;
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}
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STATIC mp_obj_t spi_flash_obj_readblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) {
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mp_buffer_info_t bufinfo;
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mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_WRITE);
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mp_uint_t ret = spi_flash_read_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FLASH_BLOCK_SIZE);
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return MP_OBJ_NEW_SMALL_INT(ret);
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_3(spi_flash_obj_readblocks_obj, spi_flash_obj_readblocks);
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STATIC mp_obj_t spi_flash_obj_writeblocks(mp_obj_t self, mp_obj_t block_num, mp_obj_t buf) {
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mp_buffer_info_t bufinfo;
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mp_get_buffer_raise(buf, &bufinfo, MP_BUFFER_READ);
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mp_uint_t ret = spi_flash_write_blocks(bufinfo.buf, mp_obj_get_int(block_num), bufinfo.len / FLASH_BLOCK_SIZE);
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return MP_OBJ_NEW_SMALL_INT(ret);
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_3(spi_flash_obj_writeblocks_obj, spi_flash_obj_writeblocks);
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STATIC mp_obj_t spi_flash_obj_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) {
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mp_int_t cmd = mp_obj_get_int(cmd_in);
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switch (cmd) {
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case BP_IOCTL_INIT: spi_flash_init(); return MP_OBJ_NEW_SMALL_INT(0);
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case BP_IOCTL_DEINIT: spi_flash_flush(); return MP_OBJ_NEW_SMALL_INT(0); // TODO properly
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case BP_IOCTL_SYNC: spi_flash_flush(); return MP_OBJ_NEW_SMALL_INT(0);
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case BP_IOCTL_SEC_COUNT: return MP_OBJ_NEW_SMALL_INT(spi_flash_get_block_count());
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case BP_IOCTL_SEC_SIZE: return MP_OBJ_NEW_SMALL_INT(spi_flash_get_block_size());
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default: return mp_const_none;
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}
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_3(spi_flash_obj_ioctl_obj, spi_flash_obj_ioctl);
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STATIC const mp_map_elem_t spi_flash_obj_locals_dict_table[] = {
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{ MP_OBJ_NEW_QSTR(MP_QSTR_readblocks), (mp_obj_t)&spi_flash_obj_readblocks_obj },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_writeblocks), (mp_obj_t)&spi_flash_obj_writeblocks_obj },
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{ MP_OBJ_NEW_QSTR(MP_QSTR_ioctl), (mp_obj_t)&spi_flash_obj_ioctl_obj },
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};
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STATIC MP_DEFINE_CONST_DICT(spi_flash_obj_locals_dict, spi_flash_obj_locals_dict_table);
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const mp_obj_type_t spi_flash_type = {
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{ &mp_type_type },
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.name = MP_QSTR_SPIFlash,
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.make_new = spi_flash_obj_make_new,
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.locals_dict = (mp_obj_t)&spi_flash_obj_locals_dict,
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};
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void flash_init_vfs(fs_user_mount_t *vfs) {
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vfs->flags |= FSUSER_NATIVE | FSUSER_HAVE_IOCTL;
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2016-10-13 17:53:31 -04:00
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vfs->readblocks[0] = (mp_obj_t)&spi_flash_obj_readblocks_obj;
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vfs->readblocks[1] = (mp_obj_t)&spi_flash_obj;
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vfs->readblocks[2] = (mp_obj_t)spi_flash_read_blocks; // native version
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vfs->writeblocks[0] = (mp_obj_t)&spi_flash_obj_writeblocks_obj;
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vfs->writeblocks[1] = (mp_obj_t)&spi_flash_obj;
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vfs->writeblocks[2] = (mp_obj_t)spi_flash_write_blocks; // native version
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vfs->u.ioctl[0] = (mp_obj_t)&spi_flash_obj_ioctl_obj;
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vfs->u.ioctl[1] = (mp_obj_t)&spi_flash_obj;
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2016-09-02 20:00:30 -04:00
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}
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