2021-09-29 13:44:15 -04:00
|
|
|
/*
|
|
|
|
* This file is part of the MicroPython project, http://micropython.org/
|
|
|
|
*
|
|
|
|
* The MIT License (MIT)
|
|
|
|
*
|
|
|
|
* Copyright (c) 2021 Lucian Copeland for Adafruit Industries
|
|
|
|
*
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
|
|
* of this software and associated documentation files (the "Software"), to deal
|
|
|
|
* in the Software without restriction, including without limitation the rights
|
|
|
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
|
|
* copies of the Software, and to permit persons to whom the Software is
|
|
|
|
* furnished to do so, subject to the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice shall be included in
|
|
|
|
* all copies or substantial portions of the Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
|
|
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
|
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|
|
|
* THE SOFTWARE.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include "py/gc.h"
|
|
|
|
#include "py/obj.h"
|
|
|
|
#include "py/objtuple.h"
|
|
|
|
#include "py/runtime.h"
|
|
|
|
#include "lib/utils/interrupt_char.h"
|
2021-10-01 19:36:04 -04:00
|
|
|
// #include <stdio.h>
|
2021-09-29 13:44:15 -04:00
|
|
|
|
|
|
|
#include "shared-bindings/alarm/__init__.h"
|
|
|
|
#include "shared-bindings/alarm/SleepMemory.h"
|
|
|
|
#include "shared-bindings/alarm/pin/PinAlarm.h"
|
|
|
|
#include "shared-bindings/alarm/time/TimeAlarm.h"
|
|
|
|
|
|
|
|
#include "shared-bindings/microcontroller/__init__.h"
|
|
|
|
#include "samd/external_interrupts.h"
|
|
|
|
#include "supervisor/port.h"
|
|
|
|
#include "supervisor/workflow.h"
|
|
|
|
|
|
|
|
// Singleton instance of SleepMemory.
|
|
|
|
const alarm_sleep_memory_obj_t alarm_sleep_memory_obj = {
|
|
|
|
.base = {
|
|
|
|
.type = &alarm_sleep_memory_type,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
// TODO: make a custom enum to avoid weird values like PM_SLEEPCFG_SLEEPMODE_BACKUP_Val?
|
2021-10-01 19:36:04 -04:00
|
|
|
STATIC volatile uint32_t _target;
|
|
|
|
STATIC bool fake_sleep;
|
|
|
|
STATIC bool pin_alarm = false;
|
2021-09-29 13:44:15 -04:00
|
|
|
|
|
|
|
void alarm_reset(void) {
|
|
|
|
// Reset the alarm flag
|
|
|
|
SAMD_ALARM_FLAG = 0x00;
|
|
|
|
alarm_pin_pinalarm_reset();
|
|
|
|
alarm_time_timealarm_reset();
|
|
|
|
}
|
|
|
|
|
|
|
|
samd_sleep_source_t alarm_get_wakeup_cause(void) {
|
|
|
|
// If in light/fake sleep, check modules
|
|
|
|
if (alarm_pin_pinalarm_woke_this_cycle()) {
|
|
|
|
return SAMD_WAKEUP_GPIO;
|
|
|
|
}
|
|
|
|
if (alarm_time_timealarm_woke_this_cycle()) {
|
|
|
|
return SAMD_WAKEUP_RTC;
|
|
|
|
}
|
2021-10-01 19:36:04 -04:00
|
|
|
if (RSTC->RCAUSE.bit.BACKUP) {
|
|
|
|
if (RTC->MODE0.INTFLAG.bit.TAMPER) {
|
|
|
|
return SAMD_WAKEUP_GPIO;
|
|
|
|
}
|
|
|
|
return SAMD_WAKEUP_RTC;
|
|
|
|
}
|
2021-09-29 13:44:15 -04:00
|
|
|
return SAMD_WAKEUP_UNDEF;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool common_hal_alarm_woken_from_sleep(void) {
|
|
|
|
return alarm_get_wakeup_cause() != SAMD_WAKEUP_UNDEF;
|
|
|
|
}
|
|
|
|
|
|
|
|
mp_obj_t common_hal_alarm_create_wake_alarm(void) {
|
|
|
|
// If woken from deep sleep, create a copy alarm similar to what would have
|
|
|
|
// been passed in originally. Otherwise, just return none
|
|
|
|
samd_sleep_source_t cause = alarm_get_wakeup_cause();
|
|
|
|
switch (cause) {
|
|
|
|
case SAMD_WAKEUP_RTC: {
|
|
|
|
return alarm_time_timealarm_create_wakeup_alarm();
|
|
|
|
}
|
|
|
|
case SAMD_WAKEUP_GPIO: {
|
|
|
|
return alarm_pin_pinalarm_create_wakeup_alarm();
|
|
|
|
}
|
|
|
|
case SAMD_WAKEUP_UNDEF:
|
|
|
|
default:
|
|
|
|
// Not a deep sleep reset.
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Set up light sleep or deep sleep alarms.
|
|
|
|
STATIC void _setup_sleep_alarms(bool deep_sleep, size_t n_alarms, const mp_obj_t *alarms) {
|
|
|
|
alarm_pin_pinalarm_set_alarms(deep_sleep, n_alarms, alarms);
|
2021-10-01 19:36:04 -04:00
|
|
|
alarm_time_timealarm_set_alarms(deep_sleep, n_alarms, alarms);
|
|
|
|
fake_sleep = false;
|
2021-09-29 13:44:15 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
mp_obj_t common_hal_alarm_light_sleep_until_alarms(size_t n_alarms, const mp_obj_t *alarms) {
|
|
|
|
_setup_sleep_alarms(false, n_alarms, alarms);
|
|
|
|
mp_obj_t wake_alarm = mp_const_none;
|
|
|
|
|
|
|
|
while (!mp_hal_is_interrupted()) {
|
|
|
|
RUN_BACKGROUND_TASKS;
|
|
|
|
// Detect if interrupt was alarm or ctrl-C interrupt.
|
|
|
|
if (common_hal_alarm_woken_from_sleep()) {
|
|
|
|
samd_sleep_source_t cause = alarm_get_wakeup_cause();
|
|
|
|
switch (cause) {
|
|
|
|
case SAMD_WAKEUP_RTC: {
|
|
|
|
wake_alarm = alarm_time_timealarm_find_triggered_alarm(n_alarms,alarms);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case SAMD_WAKEUP_GPIO: {
|
|
|
|
wake_alarm = alarm_pin_pinalarm_find_triggered_alarm(n_alarms,alarms);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
// Should not reach this, if all light sleep types are covered correctly
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
shared_alarm_save_wake_alarm(wake_alarm);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
// TODO: the SAMD implementation of this (purportedly) disables interrupts
|
|
|
|
// Presumably this doesn't impact the RTC interrupts, somehow, or it would never wake up?
|
|
|
|
// Will it prevent an external interrupt from waking?
|
|
|
|
// port_idle_until_interrupt();
|
|
|
|
// Alternative would be `sleep(PM_SLEEPCFG_SLEEPMODE_IDLE2_Val)`, I think?
|
|
|
|
|
|
|
|
// ATTEMPT ------------------------------
|
|
|
|
// This works but achieves same power consumption as time.sleep()
|
|
|
|
|
|
|
|
// Clear the FPU interrupt because it can prevent us from sleeping.
|
|
|
|
if (__get_FPSCR() & ~(0x9f)) {
|
|
|
|
__set_FPSCR(__get_FPSCR() & ~(0x9f));
|
|
|
|
(void)__get_FPSCR();
|
|
|
|
}
|
|
|
|
|
|
|
|
// Disable RTC interrupts
|
|
|
|
NVIC_DisableIRQ(RTC_IRQn);
|
|
|
|
// Set standby power domain stuff
|
|
|
|
PM->STDBYCFG.reg = PM_STDBYCFG_RAMCFG_OFF;
|
|
|
|
// Set-up Sleep Mode
|
|
|
|
PM->SLEEPCFG.reg = PM_SLEEPCFG_SLEEPMODE_STANDBY;
|
|
|
|
while(PM->SLEEPCFG.bit.SLEEPMODE != PM_SLEEPCFG_SLEEPMODE_STANDBY_Val);
|
|
|
|
|
|
|
|
__DSB(); // Data Synchronization Barrier
|
|
|
|
__WFI(); // Wait For Interrupt
|
|
|
|
// Enable RTC interrupts
|
|
|
|
NVIC_EnableIRQ(RTC_IRQn);
|
|
|
|
|
|
|
|
|
|
|
|
// END ATTEMPT ------------------------------
|
|
|
|
}
|
|
|
|
if (mp_hal_is_interrupted()) {
|
|
|
|
return mp_const_none; // Shouldn't be given to python code because exception handling should kick in.
|
|
|
|
}
|
|
|
|
|
|
|
|
alarm_reset();
|
|
|
|
return wake_alarm;
|
|
|
|
}
|
|
|
|
|
|
|
|
void common_hal_alarm_set_deep_sleep_alarms(size_t n_alarms, const mp_obj_t *alarms) {
|
|
|
|
_setup_sleep_alarms(true, n_alarms, alarms);
|
|
|
|
}
|
|
|
|
|
|
|
|
void NORETURN common_hal_alarm_enter_deep_sleep(void) {
|
|
|
|
alarm_pin_pinalarm_prepare_for_deep_sleep();
|
2021-10-01 19:36:04 -04:00
|
|
|
alarm_time_timealarm_prepare_for_deep_sleep();
|
|
|
|
_target = RTC->MODE0.COMP[1].reg;
|
2021-09-29 13:44:15 -04:00
|
|
|
port_disable_tick(); // TODO: Required for SAMD?
|
|
|
|
|
|
|
|
// Set a flag in the backup registers to indicate sleep wakeup
|
|
|
|
SAMD_ALARM_FLAG = 0x01;
|
|
|
|
|
|
|
|
// Clear the FPU interrupt because it can prevent us from sleeping.
|
|
|
|
if (__get_FPSCR() & ~(0x9f)) {
|
|
|
|
__set_FPSCR(__get_FPSCR() & ~(0x9f));
|
|
|
|
(void)__get_FPSCR();
|
|
|
|
}
|
|
|
|
|
|
|
|
// hacky way of checking if time alarm or pin alarm
|
|
|
|
// TODO: find better way of determining pin vs time
|
2021-10-01 19:36:04 -04:00
|
|
|
if (RTC->MODE0.INTENSET.bit.TAMPER) {
|
2021-09-29 13:44:15 -04:00
|
|
|
// Disable interrupts
|
|
|
|
NVIC_DisableIRQ(RTC_IRQn);
|
|
|
|
|
|
|
|
// Must disable the RTC before writing to EVCTRL and TMPCTRL
|
|
|
|
RTC->MODE0.CTRLA.bit.ENABLE = 0; // Disable the RTC
|
|
|
|
while (RTC->MODE0.SYNCBUSY.bit.ENABLE); // Wait for synchronization
|
|
|
|
|
|
|
|
RTC->MODE0.CTRLA.bit.SWRST = 1; // Software reset the RTC
|
|
|
|
while (RTC->MODE0.SYNCBUSY.bit.SWRST); // Wait for synchronization
|
|
|
|
|
|
|
|
RTC->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_PRESCALER_DIV1024 | // Set prescaler to 1024
|
|
|
|
RTC_MODE0_CTRLA_MODE_COUNT32; // Set RTC to mode 0, 32-bit timer
|
|
|
|
|
2021-10-01 19:36:04 -04:00
|
|
|
// TODO: map requested pin to limited selection of TAMPER pins
|
2021-09-29 13:44:15 -04:00
|
|
|
//PA02 = IN2
|
|
|
|
RTC->MODE0.TAMPCTRL.bit.DEBNC2 = 1; // Edge triggered when INn is stable for 4 CLK_RTC_DEB periods
|
|
|
|
RTC->MODE0.TAMPCTRL.bit.TAMLVL2 = 1; // rising edge
|
|
|
|
RTC->MODE0.TAMPCTRL.bit.IN2ACT = 1; // WAKE (doesn't save timestamp)
|
|
|
|
|
|
|
|
// Enable interrupts
|
|
|
|
NVIC_SetPriority(RTC_IRQn, 0);
|
|
|
|
NVIC_EnableIRQ(RTC_IRQn);
|
|
|
|
// Set interrupts for TAMPER or overflow
|
|
|
|
RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_TAMPER;
|
2021-10-01 19:36:04 -04:00
|
|
|
} else {
|
|
|
|
// Retrieve COMP1 value before resetting RTC
|
2021-09-29 13:44:15 -04:00
|
|
|
// Disable interrupts
|
|
|
|
NVIC_DisableIRQ(RTC_IRQn);
|
|
|
|
|
|
|
|
// Must disable the RTC before writing to EVCTRL and TMPCTRL
|
|
|
|
RTC->MODE0.CTRLA.bit.ENABLE = 0; // Disable the RTC
|
|
|
|
while (RTC->MODE0.SYNCBUSY.bit.ENABLE); // Wait for synchronization
|
|
|
|
|
|
|
|
RTC->MODE0.CTRLA.bit.SWRST = 1; // Software reset the RTC
|
|
|
|
while (RTC->MODE0.SYNCBUSY.bit.SWRST); // Wait for synchronization
|
|
|
|
|
|
|
|
RTC->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_PRESCALER_DIV1024 | // Set prescaler to 1024
|
|
|
|
RTC_MODE0_CTRLA_MODE_COUNT32; // Set RTC to mode 0, 32-bit timer
|
|
|
|
|
2021-10-01 19:36:04 -04:00
|
|
|
RTC->MODE0.COMP[1].reg = (_target/1024) * 32;
|
2021-09-29 13:44:15 -04:00
|
|
|
while(RTC->MODE0.SYNCBUSY.reg);
|
|
|
|
|
|
|
|
// Enable interrupts
|
|
|
|
NVIC_SetPriority(RTC_IRQn, 0);
|
|
|
|
NVIC_EnableIRQ(RTC_IRQn);
|
|
|
|
// Set interrupts for COMPARE1 or overflow
|
|
|
|
RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_CMP1 | RTC_MODE1_INTENSET_OVF;
|
2021-10-01 19:36:04 -04:00
|
|
|
}
|
2021-09-29 13:44:15 -04:00
|
|
|
// Set-up Deep Sleep Mode
|
|
|
|
// RAM retention
|
|
|
|
PM->BKUPCFG.reg = PM_BKUPCFG_BRAMCFG(0x2); // No RAM retention 0x2 partial:0x1
|
|
|
|
while (PM->BKUPCFG.bit.BRAMCFG != 0x2); // Wait for synchronization
|
|
|
|
PM->SLEEPCFG.reg = PM_SLEEPCFG_SLEEPMODE_BACKUP;
|
|
|
|
while(PM->SLEEPCFG.bit.SLEEPMODE != PM_SLEEPCFG_SLEEPMODE_BACKUP_Val);
|
|
|
|
|
|
|
|
RTC->MODE0.CTRLA.bit.ENABLE = 1; // Enable the RTC
|
|
|
|
while (RTC->MODE0.SYNCBUSY.bit.ENABLE); // Wait for synchronization
|
|
|
|
|
|
|
|
__DSB(); // Data Synchronization Barrier
|
|
|
|
__WFI(); // Wait For Interrupt
|
|
|
|
|
|
|
|
// The above shuts down RAM and triggers a reset, so we should never hit this
|
|
|
|
while (1) {
|
|
|
|
;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-10-01 19:36:04 -04:00
|
|
|
MP_NOINLINE void common_hal_alarm_pretending_deep_sleep(void) {
|
2021-09-29 13:44:15 -04:00
|
|
|
// TODO:
|
|
|
|
// If tamper detect interrupts cannot be used to wake from the Idle tier of sleep,
|
|
|
|
// This section will need to re-initialize the pins to allow the PORT peripheral
|
|
|
|
// to generate external interrupts again. See STM32 for reference.
|
|
|
|
|
2021-10-01 19:36:04 -04:00
|
|
|
if (!fake_sleep) {
|
|
|
|
SAMD_ALARM_FLAG = 1;
|
|
|
|
while(RTC->MODE0.SYNCBUSY.reg);
|
|
|
|
fake_sleep = true;
|
|
|
|
// if () {
|
|
|
|
// pin_alarm=true;
|
|
|
|
// }
|
|
|
|
} else {
|
|
|
|
port_idle_until_interrupt();
|
2021-09-29 13:44:15 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void common_hal_alarm_gc_collect(void) {
|
|
|
|
gc_collect_ptr(shared_alarm_get_wake_alarm());
|
|
|
|
}
|
|
|
|
|