circuitpython/ports/qemu-arm/mps2.ld

39 lines
582 B
Plaintext
Raw Normal View History

MEMORY
{
RAM : ORIGIN = 0x00000000, LENGTH = 4M
}
_estack = ORIGIN(RAM) + LENGTH(RAM);
SECTIONS
{
.text : {
. = ALIGN(4);
KEEP(*(.isr_vector))
*(.text*)
*(.rodata*)
. = ALIGN(4);
_etext = .;
_sidata = _etext;
} > RAM
.data : AT ( _sidata )
{
. = ALIGN(4);
_sdata = .;
*(.data*)
. = ALIGN(4);
_edata = .;
} >RAM
.bss :
{
. = ALIGN(4);
_sbss = .;
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .;
} >RAM
}