2014-09-06 18:06:36 -04:00
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/*
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2017-06-30 03:22:17 -04:00
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* This file is part of the MicroPython project, http://micropython.org/
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2014-09-06 18:06:36 -04:00
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2014 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include <stdio.h>
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#include <assert.h>
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#include <string.h>
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2015-01-01 15:27:54 -05:00
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#include "py/mpconfig.h"
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2014-09-06 18:06:36 -04:00
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// wrapper around everything in this file
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#if MICROPY_EMIT_X86
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2015-01-01 15:27:54 -05:00
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#include "py/asmx86.h"
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2014-09-06 18:06:36 -04:00
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/* all offsets are measured in multiples of 4 bytes */
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#define WORD_SIZE (4)
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#define OPCODE_NOP (0x90)
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#define OPCODE_PUSH_R32 (0x50)
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// #define OPCODE_PUSH_I32 (0x68)
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// #define OPCODE_PUSH_M32 (0xff) /* /6 */
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#define OPCODE_POP_R32 (0x58)
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#define OPCODE_RET (0xc3)
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// #define OPCODE_MOV_I8_TO_R8 (0xb0) /* +rb */
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#define OPCODE_MOV_I32_TO_R32 (0xb8)
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// #define OPCODE_MOV_I32_TO_RM32 (0xc7)
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2014-09-29 05:13:49 -04:00
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#define OPCODE_MOV_R8_TO_RM8 (0x88) /* /r */
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2014-10-12 11:59:29 -04:00
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#define OPCODE_MOV_R32_TO_RM32 (0x89) /* /r */
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#define OPCODE_MOV_RM32_TO_R32 (0x8b) /* /r */
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#define OPCODE_MOVZX_RM8_TO_R32 (0xb6) /* 0x0f 0xb6/r */
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#define OPCODE_MOVZX_RM16_TO_R32 (0xb7) /* 0x0f 0xb7/r */
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2014-09-06 18:06:36 -04:00
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#define OPCODE_LEA_MEM_TO_R32 (0x8d) /* /r */
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2014-10-12 09:21:06 -04:00
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#define OPCODE_AND_R32_TO_RM32 (0x21) /* /r */
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#define OPCODE_OR_R32_TO_RM32 (0x09) /* /r */
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2014-09-06 18:06:36 -04:00
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#define OPCODE_XOR_R32_TO_RM32 (0x31) /* /r */
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#define OPCODE_ADD_R32_TO_RM32 (0x01)
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2014-09-06 18:38:50 -04:00
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#define OPCODE_ADD_I32_TO_RM32 (0x81) /* /0 */
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#define OPCODE_ADD_I8_TO_RM32 (0x83) /* /0 */
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2014-09-29 13:45:42 -04:00
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#define OPCODE_SUB_R32_FROM_RM32 (0x29)
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2014-09-06 18:06:36 -04:00
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#define OPCODE_SUB_I32_FROM_RM32 (0x81) /* /5 */
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#define OPCODE_SUB_I8_FROM_RM32 (0x83) /* /5 */
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// #define OPCODE_SHL_RM32_BY_I8 (0xc1) /* /4 */
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// #define OPCODE_SHR_RM32_BY_I8 (0xc1) /* /5 */
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// #define OPCODE_SAR_RM32_BY_I8 (0xc1) /* /7 */
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2014-09-29 13:45:42 -04:00
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#define OPCODE_SHL_RM32_CL (0xd3) /* /4 */
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2020-06-24 23:09:07 -04:00
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#define OPCODE_SHR_RM32_CL (0xd3) /* /5 */
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2014-09-29 13:45:42 -04:00
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#define OPCODE_SAR_RM32_CL (0xd3) /* /7 */
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2014-09-06 18:06:36 -04:00
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// #define OPCODE_CMP_I32_WITH_RM32 (0x81) /* /7 */
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// #define OPCODE_CMP_I8_WITH_RM32 (0x83) /* /7 */
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#define OPCODE_CMP_R32_WITH_RM32 (0x39)
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// #define OPCODE_CMP_RM32_WITH_R32 (0x3b)
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#define OPCODE_TEST_R8_WITH_RM8 (0x84) /* /r */
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2018-08-04 08:03:49 -04:00
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#define OPCODE_TEST_R32_WITH_RM32 (0x85) /* /r */
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2014-09-06 18:06:36 -04:00
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#define OPCODE_JMP_REL8 (0xeb)
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#define OPCODE_JMP_REL32 (0xe9)
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2018-08-15 23:45:24 -04:00
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#define OPCODE_JMP_RM32 (0xff) /* /4 */
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2014-09-06 18:06:36 -04:00
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#define OPCODE_JCC_REL8 (0x70) /* | jcc type */
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#define OPCODE_JCC_REL32_A (0x0f)
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#define OPCODE_JCC_REL32_B (0x80) /* | jcc type */
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#define OPCODE_SETCC_RM8_A (0x0f)
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#define OPCODE_SETCC_RM8_B (0x90) /* | jcc type, /0 */
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#define OPCODE_CALL_REL32 (0xe8)
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#define OPCODE_CALL_RM32 (0xff) /* /2 */
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#define OPCODE_LEAVE (0xc9)
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#define MODRM_R32(x) ((x) << 3)
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#define MODRM_RM_DISP0 (0x00)
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#define MODRM_RM_DISP8 (0x40)
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#define MODRM_RM_DISP32 (0x80)
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#define MODRM_RM_REG (0xc0)
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#define MODRM_RM_R32(x) (x)
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2014-09-29 05:13:49 -04:00
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#define OP_SIZE_PREFIX (0x66)
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2014-09-06 18:06:36 -04:00
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#define IMM32_L0(x) ((x) & 0xff)
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#define IMM32_L1(x) (((x) >> 8) & 0xff)
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#define IMM32_L2(x) (((x) >> 16) & 0xff)
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#define IMM32_L3(x) (((x) >> 24) & 0xff)
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#define SIGNED_FIT8(x) (((x) & 0xffffff80) == 0) || (((x) & 0xffffff80) == 0xffffff80)
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STATIC void asm_x86_write_byte_1(asm_x86_t *as, byte b1) {
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2016-12-09 06:50:58 -05:00
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byte *c = mp_asm_base_get_cur_to_write_bytes(&as->base, 1);
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if (c != NULL) {
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c[0] = b1;
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}
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2014-09-06 18:06:36 -04:00
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}
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STATIC void asm_x86_write_byte_2(asm_x86_t *as, byte b1, byte b2) {
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2016-12-09 06:50:58 -05:00
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byte *c = mp_asm_base_get_cur_to_write_bytes(&as->base, 2);
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if (c != NULL) {
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c[0] = b1;
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c[1] = b2;
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}
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2014-09-06 18:06:36 -04:00
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}
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STATIC void asm_x86_write_byte_3(asm_x86_t *as, byte b1, byte b2, byte b3) {
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2016-12-09 06:50:58 -05:00
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byte *c = mp_asm_base_get_cur_to_write_bytes(&as->base, 3);
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if (c != NULL) {
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c[0] = b1;
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c[1] = b2;
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c[2] = b3;
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}
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2014-09-06 18:06:36 -04:00
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}
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STATIC void asm_x86_write_word32(asm_x86_t *as, int w32) {
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2016-12-09 06:50:58 -05:00
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byte *c = mp_asm_base_get_cur_to_write_bytes(&as->base, 4);
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if (c != NULL) {
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c[0] = IMM32_L0(w32);
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c[1] = IMM32_L1(w32);
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c[2] = IMM32_L2(w32);
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c[3] = IMM32_L3(w32);
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}
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2014-09-06 18:06:36 -04:00
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}
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STATIC void asm_x86_write_r32_disp(asm_x86_t *as, int r32, int disp_r32, int disp_offset) {
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2018-10-12 22:40:09 -04:00
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uint8_t rm_disp;
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2014-09-29 11:25:04 -04:00
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if (disp_offset == 0 && disp_r32 != ASM_X86_REG_EBP) {
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2018-10-12 22:40:09 -04:00
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rm_disp = MODRM_RM_DISP0;
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2014-09-06 18:06:36 -04:00
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} else if (SIGNED_FIT8(disp_offset)) {
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2018-10-12 22:40:09 -04:00
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rm_disp = MODRM_RM_DISP8;
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2014-09-06 18:06:36 -04:00
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} else {
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2018-10-12 22:40:09 -04:00
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rm_disp = MODRM_RM_DISP32;
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}
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asm_x86_write_byte_1(as, MODRM_R32(r32) | rm_disp | MODRM_RM_R32(disp_r32));
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if (disp_r32 == ASM_X86_REG_ESP) {
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// Special case for esp, it needs a SIB byte
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asm_x86_write_byte_1(as, 0x24);
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}
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if (rm_disp == MODRM_RM_DISP8) {
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asm_x86_write_byte_1(as, IMM32_L0(disp_offset));
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} else if (rm_disp == MODRM_RM_DISP32) {
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2014-09-06 18:06:36 -04:00
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asm_x86_write_word32(as, disp_offset);
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}
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}
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2014-09-29 13:45:42 -04:00
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STATIC void asm_x86_generic_r32_r32(asm_x86_t *as, int dest_r32, int src_r32, int op) {
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asm_x86_write_byte_2(as, op, MODRM_R32(src_r32) | MODRM_RM_REG | MODRM_RM_R32(dest_r32));
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}
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2018-09-30 22:34:23 -04:00
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#if 0
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2014-09-06 18:06:36 -04:00
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STATIC void asm_x86_nop(asm_x86_t *as) {
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asm_x86_write_byte_1(as, OPCODE_NOP);
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}
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2018-09-30 22:34:23 -04:00
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#endif
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2014-09-06 18:06:36 -04:00
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STATIC void asm_x86_push_r32(asm_x86_t *as, int src_r32) {
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asm_x86_write_byte_1(as, OPCODE_PUSH_R32 | src_r32);
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}
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#if 0
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void asm_x86_push_i32(asm_x86_t *as, int src_i32) {
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asm_x86_write_byte_1(as, OPCODE_PUSH_I32);
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asm_x86_write_word32(as, src_i32);
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}
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void asm_x86_push_disp(asm_x86_t *as, int src_r32, int src_offset) {
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asm_x86_write_byte_1(as, OPCODE_PUSH_M32);
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asm_x86_write_r32_disp(as, 6, src_r32, src_offset);
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}
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#endif
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STATIC void asm_x86_pop_r32(asm_x86_t *as, int dest_r32) {
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asm_x86_write_byte_1(as, OPCODE_POP_R32 | dest_r32);
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}
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STATIC void asm_x86_ret(asm_x86_t *as) {
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asm_x86_write_byte_1(as, OPCODE_RET);
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}
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2014-09-29 13:45:42 -04:00
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void asm_x86_mov_r32_r32(asm_x86_t *as, int dest_r32, int src_r32) {
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asm_x86_generic_r32_r32(as, dest_r32, src_r32, OPCODE_MOV_R32_TO_RM32);
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2014-09-06 18:06:36 -04:00
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}
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2014-10-12 11:59:29 -04:00
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void asm_x86_mov_r8_to_mem8(asm_x86_t *as, int src_r32, int dest_r32, int dest_disp) {
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2014-09-29 05:13:49 -04:00
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asm_x86_write_byte_1(as, OPCODE_MOV_R8_TO_RM8);
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asm_x86_write_r32_disp(as, src_r32, dest_r32, dest_disp);
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}
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2014-10-12 11:59:29 -04:00
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void asm_x86_mov_r16_to_mem16(asm_x86_t *as, int src_r32, int dest_r32, int dest_disp) {
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2014-09-29 05:13:49 -04:00
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asm_x86_write_byte_2(as, OP_SIZE_PREFIX, OPCODE_MOV_R32_TO_RM32);
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asm_x86_write_r32_disp(as, src_r32, dest_r32, dest_disp);
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}
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2014-10-12 11:59:29 -04:00
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void asm_x86_mov_r32_to_mem32(asm_x86_t *as, int src_r32, int dest_r32, int dest_disp) {
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2014-09-06 18:06:36 -04:00
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asm_x86_write_byte_1(as, OPCODE_MOV_R32_TO_RM32);
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asm_x86_write_r32_disp(as, src_r32, dest_r32, dest_disp);
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}
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2014-10-12 11:59:29 -04:00
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void asm_x86_mov_mem8_to_r32zx(asm_x86_t *as, int src_r32, int src_disp, int dest_r32) {
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asm_x86_write_byte_2(as, 0x0f, OPCODE_MOVZX_RM8_TO_R32);
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asm_x86_write_r32_disp(as, dest_r32, src_r32, src_disp);
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}
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void asm_x86_mov_mem16_to_r32zx(asm_x86_t *as, int src_r32, int src_disp, int dest_r32) {
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asm_x86_write_byte_2(as, 0x0f, OPCODE_MOVZX_RM16_TO_R32);
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asm_x86_write_r32_disp(as, dest_r32, src_r32, src_disp);
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}
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void asm_x86_mov_mem32_to_r32(asm_x86_t *as, int src_r32, int src_disp, int dest_r32) {
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2014-09-06 18:06:36 -04:00
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asm_x86_write_byte_1(as, OPCODE_MOV_RM32_TO_R32);
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asm_x86_write_r32_disp(as, dest_r32, src_r32, src_disp);
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}
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STATIC void asm_x86_lea_disp_to_r32(asm_x86_t *as, int src_r32, int src_disp, int dest_r32) {
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asm_x86_write_byte_1(as, OPCODE_LEA_MEM_TO_R32);
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asm_x86_write_r32_disp(as, dest_r32, src_r32, src_disp);
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}
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#if 0
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void asm_x86_mov_i8_to_r8(asm_x86_t *as, int src_i8, int dest_r32) {
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asm_x86_write_byte_2(as, OPCODE_MOV_I8_TO_R8 | dest_r32, src_i8);
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}
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#endif
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py: Add support to save native, viper and asm code to .mpy files.
This commit adds support for saving and loading .mpy files that contain
native code (native, viper and inline-asm). A lot of the ground work was
already done for this in the form of removing pointers from generated
native code. The changes here are mainly to link in qstr values to the
native code, and change the format of .mpy files to contain native code
blocks (possibly mixed with bytecode).
A top-level summary:
- @micropython.native, @micropython.viper and @micropython.asm_thumb/
asm_xtensa are now allowed in .py files when compiling to .mpy, and they
work transparently to the user.
- Entire .py files can be compiled to native via mpy-cross -X emit=native
and for the most part the generated .mpy files should work the same as
their bytecode version.
- The .mpy file format is changed to 1) specify in the header if the file
contains native code and if so the architecture (eg x86, ARMV7M, Xtensa);
2) for each function block the kind of code is specified (bytecode,
native, viper, asm).
- When native code is loaded from a .mpy file the native code must be
modified (in place) to link qstr values in, just like bytecode (see
py/persistentcode.c:arch_link_qstr() function).
In addition, this now defines a public, native ABI for dynamically loadable
native code generated by other languages, like C.
2019-02-20 23:18:33 -05:00
|
|
|
size_t asm_x86_mov_i32_to_r32(asm_x86_t *as, int32_t src_i32, int dest_r32) {
|
2014-09-06 18:06:36 -04:00
|
|
|
asm_x86_write_byte_1(as, OPCODE_MOV_I32_TO_R32 | dest_r32);
|
py: Add support to save native, viper and asm code to .mpy files.
This commit adds support for saving and loading .mpy files that contain
native code (native, viper and inline-asm). A lot of the ground work was
already done for this in the form of removing pointers from generated
native code. The changes here are mainly to link in qstr values to the
native code, and change the format of .mpy files to contain native code
blocks (possibly mixed with bytecode).
A top-level summary:
- @micropython.native, @micropython.viper and @micropython.asm_thumb/
asm_xtensa are now allowed in .py files when compiling to .mpy, and they
work transparently to the user.
- Entire .py files can be compiled to native via mpy-cross -X emit=native
and for the most part the generated .mpy files should work the same as
their bytecode version.
- The .mpy file format is changed to 1) specify in the header if the file
contains native code and if so the architecture (eg x86, ARMV7M, Xtensa);
2) for each function block the kind of code is specified (bytecode,
native, viper, asm).
- When native code is loaded from a .mpy file the native code must be
modified (in place) to link qstr values in, just like bytecode (see
py/persistentcode.c:arch_link_qstr() function).
In addition, this now defines a public, native ABI for dynamically loadable
native code generated by other languages, like C.
2019-02-20 23:18:33 -05:00
|
|
|
size_t loc = mp_asm_base_get_code_pos(&as->base);
|
2014-09-06 18:06:36 -04:00
|
|
|
asm_x86_write_word32(as, src_i32);
|
py: Add support to save native, viper and asm code to .mpy files.
This commit adds support for saving and loading .mpy files that contain
native code (native, viper and inline-asm). A lot of the ground work was
already done for this in the form of removing pointers from generated
native code. The changes here are mainly to link in qstr values to the
native code, and change the format of .mpy files to contain native code
blocks (possibly mixed with bytecode).
A top-level summary:
- @micropython.native, @micropython.viper and @micropython.asm_thumb/
asm_xtensa are now allowed in .py files when compiling to .mpy, and they
work transparently to the user.
- Entire .py files can be compiled to native via mpy-cross -X emit=native
and for the most part the generated .mpy files should work the same as
their bytecode version.
- The .mpy file format is changed to 1) specify in the header if the file
contains native code and if so the architecture (eg x86, ARMV7M, Xtensa);
2) for each function block the kind of code is specified (bytecode,
native, viper, asm).
- When native code is loaded from a .mpy file the native code must be
modified (in place) to link qstr values in, just like bytecode (see
py/persistentcode.c:arch_link_qstr() function).
In addition, this now defines a public, native ABI for dynamically loadable
native code generated by other languages, like C.
2019-02-20 23:18:33 -05:00
|
|
|
return loc;
|
2014-09-06 18:06:36 -04:00
|
|
|
}
|
|
|
|
|
2014-10-12 09:21:06 -04:00
|
|
|
void asm_x86_and_r32_r32(asm_x86_t *as, int dest_r32, int src_r32) {
|
|
|
|
asm_x86_generic_r32_r32(as, dest_r32, src_r32, OPCODE_AND_R32_TO_RM32);
|
|
|
|
}
|
|
|
|
|
|
|
|
void asm_x86_or_r32_r32(asm_x86_t *as, int dest_r32, int src_r32) {
|
|
|
|
asm_x86_generic_r32_r32(as, dest_r32, src_r32, OPCODE_OR_R32_TO_RM32);
|
|
|
|
}
|
|
|
|
|
2014-09-29 13:45:42 -04:00
|
|
|
void asm_x86_xor_r32_r32(asm_x86_t *as, int dest_r32, int src_r32) {
|
|
|
|
asm_x86_generic_r32_r32(as, dest_r32, src_r32, OPCODE_XOR_R32_TO_RM32);
|
|
|
|
}
|
|
|
|
|
|
|
|
void asm_x86_shl_r32_cl(asm_x86_t *as, int dest_r32) {
|
|
|
|
asm_x86_generic_r32_r32(as, dest_r32, 4, OPCODE_SHL_RM32_CL);
|
2014-09-06 18:06:36 -04:00
|
|
|
}
|
|
|
|
|
2020-06-24 23:09:07 -04:00
|
|
|
void asm_x86_shr_r32_cl(asm_x86_t *as, int dest_r32) {
|
|
|
|
asm_x86_generic_r32_r32(as, dest_r32, 5, OPCODE_SHR_RM32_CL);
|
|
|
|
}
|
|
|
|
|
2014-09-29 13:45:42 -04:00
|
|
|
void asm_x86_sar_r32_cl(asm_x86_t *as, int dest_r32) {
|
|
|
|
asm_x86_generic_r32_r32(as, dest_r32, 7, OPCODE_SAR_RM32_CL);
|
|
|
|
}
|
|
|
|
|
|
|
|
void asm_x86_add_r32_r32(asm_x86_t *as, int dest_r32, int src_r32) {
|
|
|
|
asm_x86_generic_r32_r32(as, dest_r32, src_r32, OPCODE_ADD_R32_TO_RM32);
|
2014-09-06 18:06:36 -04:00
|
|
|
}
|
|
|
|
|
2014-12-10 17:07:04 -05:00
|
|
|
STATIC void asm_x86_add_i32_to_r32(asm_x86_t *as, int src_i32, int dest_r32) {
|
2014-09-06 18:38:50 -04:00
|
|
|
if (SIGNED_FIT8(src_i32)) {
|
2014-09-06 18:06:36 -04:00
|
|
|
asm_x86_write_byte_2(as, OPCODE_ADD_I8_TO_RM32, MODRM_R32(0) | MODRM_RM_REG | MODRM_RM_R32(dest_r32));
|
|
|
|
asm_x86_write_byte_1(as, src_i32 & 0xff);
|
2014-09-06 18:38:50 -04:00
|
|
|
} else {
|
2014-09-06 18:06:36 -04:00
|
|
|
asm_x86_write_byte_2(as, OPCODE_ADD_I32_TO_RM32, MODRM_R32(0) | MODRM_RM_REG | MODRM_RM_R32(dest_r32));
|
|
|
|
asm_x86_write_word32(as, src_i32);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-09-29 13:45:42 -04:00
|
|
|
void asm_x86_sub_r32_r32(asm_x86_t *as, int dest_r32, int src_r32) {
|
|
|
|
asm_x86_generic_r32_r32(as, dest_r32, src_r32, OPCODE_SUB_R32_FROM_RM32);
|
2014-09-06 18:06:36 -04:00
|
|
|
}
|
|
|
|
|
2014-09-29 13:45:42 -04:00
|
|
|
STATIC void asm_x86_sub_r32_i32(asm_x86_t *as, int dest_r32, int src_i32) {
|
2014-09-06 18:06:36 -04:00
|
|
|
if (SIGNED_FIT8(src_i32)) {
|
|
|
|
// defaults to 32 bit operation
|
|
|
|
asm_x86_write_byte_2(as, OPCODE_SUB_I8_FROM_RM32, MODRM_R32(5) | MODRM_RM_REG | MODRM_RM_R32(dest_r32));
|
|
|
|
asm_x86_write_byte_1(as, src_i32 & 0xff);
|
|
|
|
} else {
|
|
|
|
// defaults to 32 bit operation
|
|
|
|
asm_x86_write_byte_2(as, OPCODE_SUB_I32_FROM_RM32, MODRM_R32(5) | MODRM_RM_REG | MODRM_RM_R32(dest_r32));
|
|
|
|
asm_x86_write_word32(as, src_i32);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-06-04 10:00:29 -04:00
|
|
|
void asm_x86_mul_r32_r32(asm_x86_t *as, int dest_r32, int src_r32) {
|
|
|
|
// imul reg32, reg/mem32 -- 0x0f 0xaf /r
|
|
|
|
asm_x86_write_byte_3(as, 0x0f, 0xaf, MODRM_R32(dest_r32) | MODRM_RM_REG | MODRM_RM_R32(src_r32));
|
|
|
|
}
|
|
|
|
|
2014-09-06 18:06:36 -04:00
|
|
|
#if 0
|
|
|
|
/* shifts not tested */
|
|
|
|
void asm_x86_shl_r32_by_imm(asm_x86_t *as, int r32, int imm) {
|
|
|
|
asm_x86_write_byte_2(as, OPCODE_SHL_RM32_BY_I8, MODRM_R32(4) | MODRM_RM_REG | MODRM_RM_R32(r32));
|
|
|
|
asm_x86_write_byte_1(as, imm);
|
|
|
|
}
|
|
|
|
|
|
|
|
void asm_x86_shr_r32_by_imm(asm_x86_t *as, int r32, int imm) {
|
|
|
|
asm_x86_write_byte_2(as, OPCODE_SHR_RM32_BY_I8, MODRM_R32(5) | MODRM_RM_REG | MODRM_RM_R32(r32));
|
|
|
|
asm_x86_write_byte_1(as, imm);
|
|
|
|
}
|
|
|
|
|
|
|
|
void asm_x86_sar_r32_by_imm(asm_x86_t *as, int r32, int imm) {
|
|
|
|
asm_x86_write_byte_2(as, OPCODE_SAR_RM32_BY_I8, MODRM_R32(7) | MODRM_RM_REG | MODRM_RM_R32(r32));
|
|
|
|
asm_x86_write_byte_1(as, imm);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
void asm_x86_cmp_r32_with_r32(asm_x86_t *as, int src_r32_a, int src_r32_b) {
|
2018-08-04 08:26:14 -04:00
|
|
|
asm_x86_generic_r32_r32(as, src_r32_b, src_r32_a, OPCODE_CMP_R32_WITH_RM32);
|
2014-09-06 18:06:36 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
void asm_x86_cmp_i32_with_r32(asm_x86_t *as, int src_i32, int src_r32) {
|
|
|
|
if (SIGNED_FIT8(src_i32)) {
|
|
|
|
asm_x86_write_byte_2(as, OPCODE_CMP_I8_WITH_RM32, MODRM_R32(7) | MODRM_RM_REG | MODRM_RM_R32(src_r32));
|
|
|
|
asm_x86_write_byte_1(as, src_i32 & 0xff);
|
|
|
|
} else {
|
|
|
|
asm_x86_write_byte_2(as, OPCODE_CMP_I32_WITH_RM32, MODRM_R32(7) | MODRM_RM_REG | MODRM_RM_R32(src_r32));
|
|
|
|
asm_x86_write_word32(as, src_i32);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
void asm_x86_test_r8_with_r8(asm_x86_t *as, int src_r32_a, int src_r32_b) {
|
|
|
|
asm_x86_write_byte_2(as, OPCODE_TEST_R8_WITH_RM8, MODRM_R32(src_r32_a) | MODRM_RM_REG | MODRM_RM_R32(src_r32_b));
|
|
|
|
}
|
|
|
|
|
2018-08-04 08:03:49 -04:00
|
|
|
void asm_x86_test_r32_with_r32(asm_x86_t *as, int src_r32_a, int src_r32_b) {
|
|
|
|
asm_x86_generic_r32_r32(as, src_r32_b, src_r32_a, OPCODE_TEST_R32_WITH_RM32);
|
|
|
|
}
|
|
|
|
|
2014-09-06 18:06:36 -04:00
|
|
|
void asm_x86_setcc_r8(asm_x86_t *as, mp_uint_t jcc_type, int dest_r8) {
|
|
|
|
asm_x86_write_byte_3(as, OPCODE_SETCC_RM8_A, OPCODE_SETCC_RM8_B | jcc_type, MODRM_R32(0) | MODRM_RM_REG | MODRM_RM_R32(dest_r8));
|
|
|
|
}
|
|
|
|
|
2018-08-15 23:45:24 -04:00
|
|
|
void asm_x86_jmp_reg(asm_x86_t *as, int src_r32) {
|
|
|
|
asm_x86_write_byte_2(as, OPCODE_JMP_RM32, MODRM_R32(4) | MODRM_RM_REG | MODRM_RM_R32(src_r32));
|
|
|
|
}
|
|
|
|
|
2015-01-16 12:47:07 -05:00
|
|
|
STATIC mp_uint_t get_label_dest(asm_x86_t *as, mp_uint_t label) {
|
2016-12-09 06:54:45 -05:00
|
|
|
assert(label < as->base.max_num_labels);
|
|
|
|
return as->base.label_offsets[label];
|
2014-09-06 18:06:36 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
void asm_x86_jmp_label(asm_x86_t *as, mp_uint_t label) {
|
2014-09-29 11:25:04 -04:00
|
|
|
mp_uint_t dest = get_label_dest(as, label);
|
2016-12-09 06:54:45 -05:00
|
|
|
mp_int_t rel = dest - as->base.code_offset;
|
2015-01-16 12:47:07 -05:00
|
|
|
if (dest != (mp_uint_t)-1 && rel < 0) {
|
2014-09-06 18:06:36 -04:00
|
|
|
// is a backwards jump, so we know the size of the jump on the first pass
|
|
|
|
// calculate rel assuming 8 bit relative jump
|
|
|
|
rel -= 2;
|
|
|
|
if (SIGNED_FIT8(rel)) {
|
|
|
|
asm_x86_write_byte_2(as, OPCODE_JMP_REL8, rel & 0xff);
|
|
|
|
} else {
|
|
|
|
rel += 2;
|
|
|
|
goto large_jump;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// is a forwards jump, so need to assume it's large
|
|
|
|
large_jump:
|
|
|
|
rel -= 5;
|
|
|
|
asm_x86_write_byte_1(as, OPCODE_JMP_REL32);
|
|
|
|
asm_x86_write_word32(as, rel);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void asm_x86_jcc_label(asm_x86_t *as, mp_uint_t jcc_type, mp_uint_t label) {
|
2014-09-29 11:25:04 -04:00
|
|
|
mp_uint_t dest = get_label_dest(as, label);
|
2016-12-09 06:54:45 -05:00
|
|
|
mp_int_t rel = dest - as->base.code_offset;
|
2015-01-16 12:47:07 -05:00
|
|
|
if (dest != (mp_uint_t)-1 && rel < 0) {
|
2014-09-06 18:06:36 -04:00
|
|
|
// is a backwards jump, so we know the size of the jump on the first pass
|
|
|
|
// calculate rel assuming 8 bit relative jump
|
|
|
|
rel -= 2;
|
|
|
|
if (SIGNED_FIT8(rel)) {
|
|
|
|
asm_x86_write_byte_2(as, OPCODE_JCC_REL8 | jcc_type, rel & 0xff);
|
|
|
|
} else {
|
|
|
|
rel += 2;
|
|
|
|
goto large_jump;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// is a forwards jump, so need to assume it's large
|
|
|
|
large_jump:
|
|
|
|
rel -= 6;
|
|
|
|
asm_x86_write_byte_2(as, OPCODE_JCC_REL32_A, OPCODE_JCC_REL32_B | jcc_type);
|
|
|
|
asm_x86_write_word32(as, rel);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-02-24 07:10:20 -05:00
|
|
|
void asm_x86_entry(asm_x86_t *as, int num_locals) {
|
|
|
|
assert(num_locals >= 0);
|
2014-09-29 11:25:04 -04:00
|
|
|
asm_x86_push_r32(as, ASM_X86_REG_EBP);
|
|
|
|
asm_x86_push_r32(as, ASM_X86_REG_EBX);
|
|
|
|
asm_x86_push_r32(as, ASM_X86_REG_ESI);
|
|
|
|
asm_x86_push_r32(as, ASM_X86_REG_EDI);
|
2019-12-22 07:10:55 -05:00
|
|
|
num_locals |= 3; // make it odd so stack is aligned on 16 byte boundary
|
2018-10-12 22:40:09 -04:00
|
|
|
asm_x86_sub_r32_i32(as, ASM_X86_REG_ESP, num_locals * WORD_SIZE);
|
2014-09-06 18:06:36 -04:00
|
|
|
as->num_locals = num_locals;
|
|
|
|
}
|
|
|
|
|
|
|
|
void asm_x86_exit(asm_x86_t *as) {
|
2018-10-12 22:40:09 -04:00
|
|
|
asm_x86_sub_r32_i32(as, ASM_X86_REG_ESP, -as->num_locals * WORD_SIZE);
|
2014-09-29 11:25:04 -04:00
|
|
|
asm_x86_pop_r32(as, ASM_X86_REG_EDI);
|
|
|
|
asm_x86_pop_r32(as, ASM_X86_REG_ESI);
|
|
|
|
asm_x86_pop_r32(as, ASM_X86_REG_EBX);
|
2018-10-12 22:40:09 -04:00
|
|
|
asm_x86_pop_r32(as, ASM_X86_REG_EBP);
|
2014-09-06 18:06:36 -04:00
|
|
|
asm_x86_ret(as);
|
|
|
|
}
|
|
|
|
|
2018-10-12 22:40:09 -04:00
|
|
|
STATIC int asm_x86_arg_offset_from_esp(asm_x86_t *as, size_t arg_num) {
|
|
|
|
// Above esp are: locals, 4 saved registers, return eip, arguments
|
|
|
|
return (as->num_locals + 4 + 1 + arg_num) * WORD_SIZE;
|
|
|
|
}
|
|
|
|
|
2014-09-06 18:06:36 -04:00
|
|
|
#if 0
|
|
|
|
void asm_x86_push_arg(asm_x86_t *as, int src_arg_num) {
|
2018-10-12 22:40:09 -04:00
|
|
|
asm_x86_push_disp(as, ASM_X86_REG_ESP, asm_x86_arg_offset_from_esp(as, src_arg_num));
|
2014-09-06 18:06:36 -04:00
|
|
|
}
|
2014-09-06 18:38:50 -04:00
|
|
|
#endif
|
2014-09-06 18:06:36 -04:00
|
|
|
|
|
|
|
void asm_x86_mov_arg_to_r32(asm_x86_t *as, int src_arg_num, int dest_r32) {
|
2018-10-12 22:40:09 -04:00
|
|
|
asm_x86_mov_mem32_to_r32(as, ASM_X86_REG_ESP, asm_x86_arg_offset_from_esp(as, src_arg_num), dest_r32);
|
2014-09-06 18:06:36 -04:00
|
|
|
}
|
|
|
|
|
2014-09-06 18:38:50 -04:00
|
|
|
#if 0
|
2014-09-06 18:06:36 -04:00
|
|
|
void asm_x86_mov_r32_to_arg(asm_x86_t *as, int src_r32, int dest_arg_num) {
|
2018-10-12 22:40:09 -04:00
|
|
|
asm_x86_mov_r32_to_mem32(as, src_r32, ASM_X86_REG_ESP, asm_x86_arg_offset_from_esp(as, dest_arg_num));
|
2014-09-06 18:06:36 -04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
// locals:
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// - stored on the stack in ascending order
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// - numbered 0 through as->num_locals-1
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2018-10-12 22:40:09 -04:00
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// - ESP points to the first local
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2014-09-06 18:06:36 -04:00
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//
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2018-10-12 22:40:09 -04:00
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// | ESP
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// v
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2014-09-06 18:06:36 -04:00
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// l0 l1 l2 ... l(n-1)
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// ^ ^
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// | low address | high address in RAM
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//
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2018-10-12 22:40:09 -04:00
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STATIC int asm_x86_local_offset_from_esp(asm_x86_t *as, int local_num) {
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(void)as;
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// Stack is full descending, ESP points to local0
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return local_num * WORD_SIZE;
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2014-09-06 18:06:36 -04:00
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}
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void asm_x86_mov_local_to_r32(asm_x86_t *as, int src_local_num, int dest_r32) {
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2018-10-12 22:40:09 -04:00
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asm_x86_mov_mem32_to_r32(as, ASM_X86_REG_ESP, asm_x86_local_offset_from_esp(as, src_local_num), dest_r32);
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2014-09-06 18:06:36 -04:00
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}
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void asm_x86_mov_r32_to_local(asm_x86_t *as, int src_r32, int dest_local_num) {
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2018-10-12 22:40:09 -04:00
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asm_x86_mov_r32_to_mem32(as, src_r32, ASM_X86_REG_ESP, asm_x86_local_offset_from_esp(as, dest_local_num));
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2014-09-06 18:06:36 -04:00
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}
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void asm_x86_mov_local_addr_to_r32(asm_x86_t *as, int local_num, int dest_r32) {
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2018-10-12 22:40:09 -04:00
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int offset = asm_x86_local_offset_from_esp(as, local_num);
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2014-09-06 18:06:36 -04:00
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if (offset == 0) {
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2018-10-12 22:40:09 -04:00
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asm_x86_mov_r32_r32(as, dest_r32, ASM_X86_REG_ESP);
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2014-09-06 18:06:36 -04:00
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} else {
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2018-10-12 22:40:09 -04:00
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asm_x86_lea_disp_to_r32(as, ASM_X86_REG_ESP, offset, dest_r32);
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2014-09-06 18:06:36 -04:00
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}
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}
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2018-08-15 23:45:24 -04:00
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void asm_x86_mov_reg_pcrel(asm_x86_t *as, int dest_r32, mp_uint_t label) {
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asm_x86_write_byte_1(as, OPCODE_CALL_REL32);
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asm_x86_write_word32(as, 0);
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mp_uint_t dest = get_label_dest(as, label);
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mp_int_t rel = dest - as->base.code_offset;
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asm_x86_pop_r32(as, dest_r32);
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// PC rel is usually a forward reference, so need to assume it's large
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asm_x86_write_byte_2(as, OPCODE_ADD_I32_TO_RM32, MODRM_R32(0) | MODRM_RM_REG | MODRM_RM_R32(dest_r32));
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asm_x86_write_word32(as, rel);
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}
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2014-09-06 18:06:36 -04:00
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#if 0
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void asm_x86_push_local(asm_x86_t *as, int local_num) {
|
2018-10-12 22:40:09 -04:00
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asm_x86_push_disp(as, ASM_X86_REG_ESP, asm_x86_local_offset_from_esp(as, local_num));
|
2014-09-06 18:06:36 -04:00
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}
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void asm_x86_push_local_addr(asm_x86_t *as, int local_num, int temp_r32) {
|
2018-10-12 22:40:09 -04:00
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asm_x86_mov_r32_r32(as, temp_r32, ASM_X86_REG_ESP);
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asm_x86_add_i32_to_r32(as, asm_x86_local_offset_from_esp(as, local_num), temp_r32);
|
2014-09-06 18:06:36 -04:00
|
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asm_x86_push_r32(as, temp_r32);
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|
}
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|
#endif
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|
2018-10-12 22:59:19 -04:00
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void asm_x86_call_ind(asm_x86_t *as, size_t fun_id, mp_uint_t n_args, int temp_r32) {
|
2019-12-22 07:13:01 -05:00
|
|
|
assert(n_args <= 4);
|
2019-12-22 07:10:55 -05:00
|
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|
|
// Align stack on 16-byte boundary during the call
|
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|
|
unsigned int align = ((n_args + 3) & ~3) - n_args;
|
|
|
|
if (align) {
|
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|
|
asm_x86_sub_r32_i32(as, ASM_X86_REG_ESP, align * WORD_SIZE);
|
|
|
|
}
|
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|
|
|
2015-04-06 17:38:53 -04:00
|
|
|
if (n_args > 3) {
|
|
|
|
asm_x86_push_r32(as, ASM_X86_REG_ARG_4);
|
|
|
|
}
|
2014-09-06 18:06:36 -04:00
|
|
|
if (n_args > 2) {
|
2014-09-08 18:16:35 -04:00
|
|
|
asm_x86_push_r32(as, ASM_X86_REG_ARG_3);
|
2014-09-06 18:06:36 -04:00
|
|
|
}
|
|
|
|
if (n_args > 1) {
|
2014-09-08 18:16:35 -04:00
|
|
|
asm_x86_push_r32(as, ASM_X86_REG_ARG_2);
|
2014-09-06 18:06:36 -04:00
|
|
|
}
|
|
|
|
if (n_args > 0) {
|
2014-09-08 18:16:35 -04:00
|
|
|
asm_x86_push_r32(as, ASM_X86_REG_ARG_1);
|
2014-09-06 18:06:36 -04:00
|
|
|
}
|
2018-10-12 22:59:19 -04:00
|
|
|
|
|
|
|
// Load the pointer to the function and make the call
|
2018-10-12 23:53:35 -04:00
|
|
|
asm_x86_mov_mem32_to_r32(as, ASM_X86_REG_FUN_TABLE, fun_id * WORD_SIZE, temp_r32);
|
2014-09-06 18:06:36 -04:00
|
|
|
asm_x86_write_byte_2(as, OPCODE_CALL_RM32, MODRM_R32(2) | MODRM_RM_REG | MODRM_RM_R32(temp_r32));
|
2014-09-06 18:38:50 -04:00
|
|
|
|
|
|
|
// the caller must clean up the stack
|
|
|
|
if (n_args > 0) {
|
2019-12-22 07:10:55 -05:00
|
|
|
asm_x86_add_i32_to_r32(as, (n_args + align) * WORD_SIZE, ASM_X86_REG_ESP);
|
2014-09-06 18:38:50 -04:00
|
|
|
}
|
2014-09-06 18:06:36 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
#endif // MICROPY_EMIT_X86
|