2021-08-04 19:27:54 -04:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 microDev
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "shared-bindings/busio/UART.h"
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#include "py/stream.h"
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#include "py/mperrno.h"
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#include "py/runtime.h"
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#include "supervisor/shared/tick.h"
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#include "shared/runtime/interrupt_char.h"
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#include "shared-bindings/microcontroller/Pin.h"
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#include "peripherals/broadcom/cpu.h"
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#include "peripherals/broadcom/defines.h"
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#include "peripherals/broadcom/gpio.h"
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#include "peripherals/broadcom/interrupts.h"
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#include "peripherals/broadcom/vcmailbox.h"
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#define NO_PIN 0xff
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#define UART_INST(uart) (((uart) ? uart1 : uart0))
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typedef enum {
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STATUS_FREE = 0,
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STATUS_BUSY,
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STATUS_NEVER_RESET
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} uart_status_t;
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2021-11-23 20:23:13 -05:00
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// The Broadcom chips have two different types of UARTs. UART1 is the "mini-UART"
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// that is most available so we've implemented it first. The ARM PL011 UART
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// support will be added later. We set NUM_UARTS to 2 here so that we can match
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// the indexing even though UART0 isn't supported yet. We currently use this
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// UART for debugging so we don't support user use of UART yet.
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2021-08-04 19:27:54 -04:00
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#define NUM_UARTS 2
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static uart_status_t uart_status[NUM_UARTS];
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void reset_uart(void) {
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for (uint8_t num = 0; num < NUM_UARTS; num++) {
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if (uart_status[num] == STATUS_BUSY) {
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uart_status[num] = STATUS_FREE;
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}
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}
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}
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static busio_uart_obj_t *active_uarts[NUM_UARTS];
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void UART1_IRQHandler(void) {
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while (UART1->STAT_b.DATA_READY && ringbuf_num_empty(&active_uarts[1]->ringbuf) > 0) {
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ringbuf_put(&active_uarts[1]->ringbuf, (uint8_t)UART1->IO_b.DATA);
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}
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// We couldn't read all pending data (overrun) so clear the FIFO so that the interrupt
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// can finish.
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if (UART1->STAT_b.DATA_READY) {
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UART1->IIR_b.DATA_READY = 1;
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}
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}
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void common_hal_busio_uart_never_reset(busio_uart_obj_t *self) {
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uart_status[self->uart_id] = STATUS_NEVER_RESET;
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}
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void common_hal_busio_uart_construct(busio_uart_obj_t *self,
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const mcu_pin_obj_t *tx, const mcu_pin_obj_t *rx,
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const mcu_pin_obj_t *rts, const mcu_pin_obj_t *cts,
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const mcu_pin_obj_t *rs485_dir, bool rs485_invert,
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uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop,
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mp_float_t timeout, uint16_t receiver_buffer_size, byte *receiver_buffer,
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bool sigint_enabled) {
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if (bits > 8) {
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mp_raise_ValueError(translate("Invalid word/bit length"));
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}
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if (receiver_buffer_size == 0) {
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mp_raise_ValueError(translate("Invalid buffer size"));
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}
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if ((rs485_dir != NULL) || (rs485_invert)) {
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mp_raise_NotImplementedError(translate("RS485 Not yet supported on this device"));
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}
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if (tx == &pin_GPIO14) {
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if (rx == &pin_GPIO15) {
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self->uart_id = 1;
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}
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}
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self->rx_pin = rx;
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self->tx_pin = tx;
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if (rx != NULL) {
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if (receiver_buffer != NULL) {
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self->ringbuf = (ringbuf_t) { receiver_buffer, receiver_buffer_size };
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} else {
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// Initially allocate the UART's buffer in the long-lived part of the
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// heap. UARTs are generally long-lived objects, but the "make long-
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// lived" machinery is incapable of moving internal pointers like
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// self->buffer, so do it manually. (However, as long as internal
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// pointers like this are NOT moved, allocating the buffer
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// in the long-lived pool is not strictly necessary)
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// (This is a macro.)
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if (!ringbuf_alloc(&self->ringbuf, receiver_buffer_size, true)) {
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mp_raise_msg(&mp_type_MemoryError, translate("Failed to allocate RX buffer"));
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}
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}
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}
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if (self->uart_id == 1) {
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active_uarts[1] = self;
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AUX->ENABLES_b.UART_1 = true;
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UART1->IER = 0;
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UART1->CNTL = 0;
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if (bits == 8) {
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UART1->LCR_b.DATA_SIZE = UART1_LCR_DATA_SIZE_MODE_8BIT;
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} else if (bits == 7) {
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UART1->LCR_b.DATA_SIZE = UART1_LCR_DATA_SIZE_MODE_7BIT;
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}
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UART1->MCR = 0;
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UART1->IER = 0;
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// Clear interrupts
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UART1->IIR = 0xff;
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uint32_t source_clock = vcmailbox_get_clock_rate_measured(VCMAILBOX_CLOCK_CORE);
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UART1->BAUD = ((source_clock / (baudrate * 8)) - 1);
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if (tx != NULL) {
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UART1->CNTL |= UART1_CNTL_TX_ENABLE_Msk;
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gpio_set_pull(14, BP_PULL_NONE);
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gpio_set_function(14, GPIO_GPFSEL1_FSEL14_TXD1);
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}
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if (rx != NULL) {
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UART1->CNTL |= UART1_CNTL_RX_ENABLE_Msk;
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gpio_set_pull(15, BP_PULL_NONE);
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gpio_set_function(15, GPIO_GPFSEL1_FSEL15_RXD1);
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}
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UART1->IER_b.DATA_READY = true;
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// Never disable this in case the SPIs are used. They can each be
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// disabled at the peripheral itself.
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BP_EnableIRQ(AUX_IRQn);
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}
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}
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bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) {
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return self->tx_pin == NULL && self->rx_pin == NULL;
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}
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void common_hal_busio_uart_deinit(busio_uart_obj_t *self) {
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if (common_hal_busio_uart_deinited(self)) {
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return;
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}
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if (self->uart_id == 1) {
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UART1->IER_b.DATA_READY = false;
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UART1->CNTL = 0;
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AUX->ENABLES_b.UART_1 = false;
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active_uarts[1] = NULL;
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}
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ringbuf_free(&self->ringbuf);
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uart_status[self->uart_id] = STATUS_FREE;
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common_hal_reset_pin(self->tx_pin);
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common_hal_reset_pin(self->rx_pin);
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common_hal_reset_pin(self->cts_pin);
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common_hal_reset_pin(self->rts_pin);
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self->tx_pin = NULL;
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self->rx_pin = NULL;
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self->cts_pin = NULL;
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self->rts_pin = NULL;
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}
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// Write characters.
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size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) {
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if (self->tx_pin == NULL) {
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mp_raise_ValueError(translate("No TX pin"));
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}
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if (self->uart_id == 1) {
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COMPLETE_MEMORY_READS;
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for (size_t i = 0; i < len; i++) {
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// Wait for the FIFO to have space.
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while (!UART1->STAT_b.TX_READY) {
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RUN_BACKGROUND_TASKS;
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}
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UART1->IO = data[i];
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}
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COMPLETE_MEMORY_READS;
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return len;
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}
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return 0;
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}
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// Read characters.
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size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) {
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if (self->rx_pin == NULL) {
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mp_raise_ValueError(translate("No RX pin"));
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}
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if (len == 0) {
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// Nothing to read.
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return 0;
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}
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COMPLETE_MEMORY_READS;
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// Prevent conflict with uart irq.
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if (self->uart_id == 1) {
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UART1->IER_b.DATA_READY = false;
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}
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// Copy as much received data as available, up to len bytes.
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size_t total_read = ringbuf_get_n(&self->ringbuf, data, len);
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// Check if we still need to read more data.
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if (len > total_read) {
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len -= total_read;
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uint64_t start_ticks = supervisor_ticks_ms64();
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// Busy-wait until timeout or until we've read enough chars.
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while (len > 0 && (supervisor_ticks_ms64() - start_ticks < self->timeout_ms)) {
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if (UART1->STAT_b.DATA_READY) {
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// Read and advance.
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data[total_read] = UART1->IO_b.DATA;
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// Adjust the counters.
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len--;
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total_read++;
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// Reset the timeout on every character read.
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start_ticks = supervisor_ticks_ms64();
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}
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RUN_BACKGROUND_TASKS;
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// Allow user to break out of a timeout with a KeyboardInterrupt.
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if (mp_hal_is_interrupted()) {
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break;
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}
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}
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}
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// Now that we've emptied the ringbuf some, fill it up with anything in the
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// FIFO. This ensures that we'll empty the FIFO as much as possible and
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// reset the interrupt when we catch up.
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while (UART1->STAT_b.DATA_READY && ringbuf_num_empty(&self->ringbuf) > 0) {
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ringbuf_put(&self->ringbuf, (uint8_t)UART1->IO_b.DATA);
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}
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// Re-enable irq.
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if (self->uart_id == 1) {
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UART1->IER_b.DATA_READY = true;
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}
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COMPLETE_MEMORY_READS;
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if (total_read == 0) {
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*errcode = EAGAIN;
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return MP_STREAM_ERROR;
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}
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return total_read;
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}
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uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) {
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return self->baudrate;
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}
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void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) {
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self->baudrate = baudrate;
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}
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mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self) {
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return (mp_float_t)(self->timeout_ms / 1000.0L);
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}
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void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeout) {
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self->timeout_ms = timeout * 1000;
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}
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uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) {
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return ringbuf_num_filled(&self->ringbuf);
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}
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void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) {
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ringbuf_clear(&self->ringbuf);
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}
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bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) {
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if (self->tx_pin == NULL) {
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return false;
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}
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if (self->uart_id == 1) {
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return UART1->STAT_b.TX_READY;
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}
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return false;
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}
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