2014-08-31 18:33:25 -04:00
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//****************************************************************************/
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//!
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//! \file wizchip_conf.c
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//! \brief WIZCHIP Config Header File.
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//! \version 1.0.1
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//! \date 2013/10/21
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//! \par Revision history
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//! <2014/05/01> V1.0.1 Refer to M20140501
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//! 1. Explicit type casting in wizchip_bus_readbyte() & wizchip_bus_writebyte()
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// Issued by Mathias ClauBen.
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//! uint32_t type converts into ptrdiff_t first. And then recoverting it into uint8_t*
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//! For remove the warning when pointer type size is not 32bit.
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//! If ptrdiff_t doesn't support in your complier, You should must replace ptrdiff_t into your suitable pointer type.
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//! <2013/10/21> 1st Release
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//! \author MidnightCow
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//! \copyright
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//!
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//! Copyright (c) 2013, WIZnet Co., LTD.
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//! All rights reserved.
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//!
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//! Redistribution and use in source and binary forms, with or without
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//! modification, are permitted provided that the following conditions
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//! are met:
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//!
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//! * Redistributions of source code must retain the above copyright
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//! notice, this list of conditions and the following disclaimer.
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//! * Redistributions in binary form must reproduce the above copyright
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//! notice, this list of conditions and the following disclaimer in the
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//! documentation and/or other materials provided with the distribution.
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//! * Neither the name of the <ORGANIZATION> nor the names of its
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//! contributors may be used to endorse or promote products derived
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//! from this software without specific prior written permission.
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//!
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//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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//! THE POSSIBILITY OF SUCH DAMAGE.
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//
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//*****************************************************************************/
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//A20140501 : for use the type - ptrdiff_t
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#include <stddef.h>
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//
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#include "wizchip_conf.h"
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/**
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* @brief Default function to enable interrupt.
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* @note This function help not to access wrong address. If you do not describe this function or register any functions,
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* null function is called.
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*/
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void wizchip_cris_enter(void) {};
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/**
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* @brief Default function to disable interrupt.
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* @note This function help not to access wrong address. If you do not describe this function or register any functions,
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* null function is called.
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*/
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void wizchip_cris_exit(void) {};
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/**
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* @brief Default function to select chip.
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* @note This function help not to access wrong address. If you do not describe this function or register any functions,
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* null function is called.
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*/
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void wizchip_cs_select(void) {};
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/**
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* @brief Default function to deselect chip.
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* @note This function help not to access wrong address. If you do not describe this function or register any functions,
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* null function is called.
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*/
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void wizchip_cs_deselect(void) {};
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/**
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* @brief Default function to read in direct or indirect interface.
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* @note This function help not to access wrong address. If you do not describe this function or register any functions,
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* null function is called.
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*/
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//M20140501 : Explict pointer type casting
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//uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *) AddrSel); };
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uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *)((ptrdiff_t) AddrSel)); };
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/**
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* @brief Default function to write in direct or indirect interface.
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* @note This function help not to access wrong address. If you do not describe this function or register any functions,
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* null function is called.
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*/
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//M20140501 : Explict pointer type casting
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//void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { *((volatile uint8_t*) AddrSel) = wb; };
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void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { *((volatile uint8_t*)((ptrdiff_t)AddrSel)) = wb; };
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/**
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* @brief Default function to read in SPI interface.
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* @note This function help not to access wrong address. If you do not describe this function or register any functions,
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* null function is called.
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*/
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2014-08-31 18:50:57 -04:00
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void wizchip_spi_readbytes(uint8_t *buf, uint32_t len) {}
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2014-08-31 18:33:25 -04:00
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/**
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* @brief Default function to write in SPI interface.
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* @note This function help not to access wrong address. If you do not describe this function or register any functions,
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* null function is called.
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*/
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2014-08-31 18:50:57 -04:00
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void wizchip_spi_writebytes(const uint8_t *buf, uint32_t len) {}
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2014-08-31 18:33:25 -04:00
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/**
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* @\ref _WIZCHIP instance
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*/
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_WIZCHIP WIZCHIP =
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{
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.id = _WIZCHIP_ID_,
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.if_mode = _WIZCHIP_IO_MODE_,
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.CRIS._enter = wizchip_cris_enter,
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.CRIS._exit = wizchip_cris_exit,
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.CS._select = wizchip_cs_select,
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.CS._deselect = wizchip_cs_deselect,
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.IF.BUS._read_byte = wizchip_bus_readbyte,
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.IF.BUS._write_byte = wizchip_bus_writebyte
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// .IF.SPI._read_byte = wizchip_spi_readbyte,
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// .IF.SPI._write_byte = wizchip_spi_writebyte
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};
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static uint8_t _DNS_[4]; // DNS server ip address
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static dhcp_mode _DHCP_; // DHCP mode
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void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void))
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{
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if(!cris_en || !cris_ex)
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{
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WIZCHIP.CRIS._enter = wizchip_cris_enter;
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WIZCHIP.CRIS._exit = wizchip_cris_exit;
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}
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else
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{
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WIZCHIP.CRIS._enter = cris_en;
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WIZCHIP.CRIS._exit = cris_ex;
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}
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}
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void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void))
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{
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if(!cs_sel || !cs_desel)
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{
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WIZCHIP.CS._select = wizchip_cs_select;
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WIZCHIP.CS._deselect = wizchip_cs_deselect;
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}
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else
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{
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WIZCHIP.CS._select = cs_sel;
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WIZCHIP.CS._deselect = cs_desel;
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}
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}
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void reg_wizchip_bus_cbfunc(uint8_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb))
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{
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while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_));
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if(!bus_rb || !bus_wb)
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{
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WIZCHIP.IF.BUS._read_byte = wizchip_bus_readbyte;
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WIZCHIP.IF.BUS._write_byte = wizchip_bus_writebyte;
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}
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else
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{
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WIZCHIP.IF.BUS._read_byte = bus_rb;
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WIZCHIP.IF.BUS._write_byte = bus_wb;
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}
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}
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2014-08-31 18:50:57 -04:00
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void reg_wizchip_spi_cbfunc((void (*spi_rb)(uint8_t *, uint32_t), void (*spi_wb)(const uint8_t *, uint32_t))
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2014-08-31 18:33:25 -04:00
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{
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while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
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if(!spi_rb || !spi_wb)
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{
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2014-08-31 18:50:57 -04:00
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WIZCHIP.IF.SPI._read_bytes = wizchip_spi_readbytes;
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WIZCHIP.IF.SPI._write_bytes = wizchip_spi_writebytes;
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2014-08-31 18:33:25 -04:00
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}
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else
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{
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2014-08-31 18:50:57 -04:00
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WIZCHIP.IF.SPI._read_bytes = spi_rb;
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WIZCHIP.IF.SPI._write_bytes = spi_wb;
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2014-08-31 18:33:25 -04:00
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}
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}
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int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
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{
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uint8_t tmp = 0;
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uint8_t* ptmp[2] = {0,0};
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switch(cwtype)
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{
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case CW_RESET_WIZCHIP:
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wizchip_sw_reset();
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break;
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case CW_INIT_WIZCHIP:
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if(arg != 0)
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{
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ptmp[0] = (uint8_t*)arg;
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ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_;
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}
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return wizchip_init(ptmp[0], ptmp[1]);
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case CW_CLR_INTERRUPT:
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wizchip_clrinterrupt(*((intr_kind*)arg));
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break;
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case CW_GET_INTERRUPT:
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*((intr_kind*)arg) = wizchip_getinterrupt();
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break;
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case CW_SET_INTRMASK:
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wizchip_setinterruptmask(*((intr_kind*)arg));
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break;
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case CW_GET_INTRMASK:
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*((intr_kind*)arg) = wizchip_getinterruptmask();
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break;
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#if _WIZCHIP_ > 5100
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case CW_SET_INTRTIME:
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setINTLEVEL(*(uint16_t*)arg);
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break;
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case CW_GET_INTRTIME:
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*(uint16_t*)arg = getINTLEVEL();
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break;
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#endif
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case CW_GET_ID:
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((uint8_t*)arg)[0] = WIZCHIP.id[0];
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((uint8_t*)arg)[1] = WIZCHIP.id[1];
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((uint8_t*)arg)[2] = WIZCHIP.id[2];
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((uint8_t*)arg)[3] = WIZCHIP.id[3];
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((uint8_t*)arg)[4] = WIZCHIP.id[4];
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((uint8_t*)arg)[5] = 0;
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break;
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#if _WIZCHIP_ == 5500
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case CW_RESET_PHY:
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wizphy_reset();
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break;
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case CW_SET_PHYCONF:
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wizphy_setphyconf((wiz_PhyConf*)arg);
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break;
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case CW_GET_PHYCONF:
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wizphy_getphyconf((wiz_PhyConf*)arg);
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break;
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case CW_GET_PHYSTATUS:
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break;
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case CW_SET_PHYPOWMODE:
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return wizphy_setphypmode(*(uint8_t*)arg);
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#endif
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case CW_GET_PHYPOWMODE:
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tmp = wizphy_getphypmode();
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if((int8_t)tmp == -1) return -1;
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*(uint8_t*)arg = tmp;
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break;
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case CW_GET_PHYLINK:
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tmp = wizphy_getphylink();
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if((int8_t)tmp == -1) return -1;
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*(uint8_t*)arg = tmp;
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break;
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default:
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return -1;
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}
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return 0;
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}
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int8_t ctlnetwork(ctlnetwork_type cntype, void* arg)
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{
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switch(cntype)
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{
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case CN_SET_NETINFO:
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wizchip_setnetinfo((wiz_NetInfo*)arg);
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break;
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case CN_GET_NETINFO:
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wizchip_getnetinfo((wiz_NetInfo*)arg);
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break;
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case CN_SET_NETMODE:
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return wizchip_setnetmode(*(netmode_type*)arg);
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case CN_GET_NETMODE:
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*(netmode_type*)arg = wizchip_getnetmode();
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break;
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case CN_SET_TIMEOUT:
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wizchip_settimeout((wiz_NetTimeout*)arg);
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break;
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case CN_GET_TIMEOUT:
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wizchip_gettimeout((wiz_NetTimeout*)arg);
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break;
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default:
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return -1;
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}
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return 0;
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}
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void wizchip_sw_reset(void)
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{
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uint8_t gw[4], sn[4], sip[4];
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uint8_t mac[6];
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getSHAR(mac);
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getGAR(gw); getSUBR(sn); getSIPR(sip);
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setMR(MR_RST);
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getMR(); // for delay
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setSHAR(mac);
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setGAR(gw);
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setSUBR(sn);
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setSIPR(sip);
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}
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int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
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{
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int8_t i;
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int8_t tmp = 0;
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wizchip_sw_reset();
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if(txsize)
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{
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tmp = 0;
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for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
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tmp += txsize[i];
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if(tmp > 16) return -1;
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for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
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setSn_TXBUF_SIZE(i, txsize[i]);
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}
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if(rxsize)
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{
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tmp = 0;
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for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
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tmp += rxsize[i];
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if(tmp > 16) return -1;
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for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
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setSn_RXBUF_SIZE(i, rxsize[i]);
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}
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return 0;
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}
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void wizchip_clrinterrupt(intr_kind intr)
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{
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uint8_t ir = (uint8_t)intr;
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uint8_t sir = (uint8_t)((uint16_t)intr >> 8);
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#if _WIZCHIP_ < 5500
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ir |= (1<<4); // IK_WOL
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#endif
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#if _WIZCHIP_ == 5200
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ir |= (1 << 6);
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#endif
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#if _WIZCHIP_ < 5200
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sir &= 0x0F;
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|
#endif
|
|
|
|
|
|
|
|
#if _WIZCHIP_ == 5100
|
|
|
|
ir |= sir;
|
|
|
|
setIR(ir);
|
|
|
|
#else
|
|
|
|
setIR(ir);
|
|
|
|
setSIR(sir);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
intr_kind wizchip_getinterrupt(void)
|
|
|
|
{
|
|
|
|
uint8_t ir = 0;
|
|
|
|
uint8_t sir = 0;
|
|
|
|
uint16_t ret = 0;
|
|
|
|
#if _WIZCHIP_ == 5100
|
|
|
|
ir = getIR();
|
|
|
|
sir = ir 0x0F;
|
|
|
|
#else
|
|
|
|
ir = getIR();
|
|
|
|
sir = getSIR();
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if _WIZCHIP_ < 5500
|
|
|
|
ir &= ~(1<<4); // IK_WOL
|
|
|
|
#endif
|
|
|
|
#if _WIZCHIP_ == 5200
|
|
|
|
ir &= ~(1 << 6);
|
|
|
|
#endif
|
|
|
|
ret = sir;
|
|
|
|
ret = (ret << 8) + ir;
|
|
|
|
return (intr_kind)ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
void wizchip_setinterruptmask(intr_kind intr)
|
|
|
|
{
|
|
|
|
uint8_t imr = (uint8_t)intr;
|
|
|
|
uint8_t simr = (uint8_t)((uint16_t)intr >> 8);
|
|
|
|
#if _WIZCHIP_ < 5500
|
|
|
|
imr &= ~(1<<4); // IK_WOL
|
|
|
|
#endif
|
|
|
|
#if _WIZCHIP_ == 5200
|
|
|
|
imr &= ~(1 << 6);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if _WIZCHIP_ < 5200
|
|
|
|
simr &= 0x0F;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if _WIZCHIP_ == 5100
|
|
|
|
imr |= simr;
|
|
|
|
setIMR(imr);
|
|
|
|
#else
|
|
|
|
setIMR(imr);
|
|
|
|
setSIMR(simr);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
intr_kind wizchip_getinterruptmask(void)
|
|
|
|
{
|
|
|
|
uint8_t imr = 0;
|
|
|
|
uint8_t simr = 0;
|
|
|
|
uint16_t ret = 0;
|
|
|
|
#if _WIZCHIP_ == 5100
|
|
|
|
imr = getIMR();
|
|
|
|
simr = imr 0x0F;
|
|
|
|
#else
|
|
|
|
imr = getIMR();
|
|
|
|
simr = getSIMR();
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if _WIZCHIP_ < 5500
|
|
|
|
imr &= ~(1<<4); // IK_WOL
|
|
|
|
#endif
|
|
|
|
#if _WIZCHIP_ == 5200
|
|
|
|
imr &= ~(1 << 6); // IK_DEST_UNREACH
|
|
|
|
#endif
|
|
|
|
ret = simr;
|
|
|
|
ret = (ret << 8) + imr;
|
|
|
|
return (intr_kind)ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
int8_t wizphy_getphylink(void)
|
|
|
|
{
|
|
|
|
int8_t tmp;
|
|
|
|
#if _WIZCHIP_ == 5200
|
|
|
|
if(getPHYSTATUS() & PHYSTATUS_LINK)
|
|
|
|
tmp = PHY_LINK_ON;
|
|
|
|
else
|
|
|
|
tmp = PHY_LINK_OFF;
|
|
|
|
#elif _WIZCHIP_ == 5500
|
|
|
|
if(getPHYCFGR() & PHYCFGR_LNK_ON)
|
|
|
|
tmp = PHY_LINK_ON;
|
|
|
|
else
|
|
|
|
tmp = PHY_LINK_OFF;
|
|
|
|
#else
|
|
|
|
tmp = -1;
|
|
|
|
#endif
|
|
|
|
return tmp;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if _WIZCHIP_ > 5100
|
|
|
|
|
|
|
|
int8_t wizphy_getphypmode(void)
|
|
|
|
{
|
|
|
|
int8_t tmp = 0;
|
|
|
|
#if _WIZCHIP_ == 5200
|
|
|
|
if(getPHYSTATUS() & PHYSTATUS_POWERDOWN)
|
|
|
|
tmp = PHY_POWER_DOWN;
|
|
|
|
else
|
|
|
|
tmp = PHY_POWER_NORM;
|
|
|
|
#elif _WIZCHIP_ == 5500
|
|
|
|
if(getPHYCFGR() & PHYCFGR_OPMDC_PDOWN)
|
|
|
|
tmp = PHY_POWER_DOWN;
|
|
|
|
else
|
|
|
|
tmp = PHY_POWER_NORM;
|
|
|
|
#else
|
|
|
|
tmp = -1;
|
|
|
|
#endif
|
|
|
|
return tmp;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if _WIZCHIP_ == 5500
|
|
|
|
void wizphy_reset(void)
|
|
|
|
{
|
|
|
|
uint8_t tmp = getPHYCFGR();
|
|
|
|
tmp &= PHYCFGR_RST;
|
|
|
|
setPHYCFGR(tmp);
|
|
|
|
tmp = getPHYCFGR();
|
|
|
|
tmp |= ~PHYCFGR_RST;
|
|
|
|
setPHYCFGR(tmp);
|
|
|
|
}
|
|
|
|
|
|
|
|
void wizphy_setphyconf(wiz_PhyConf* phyconf)
|
|
|
|
{
|
|
|
|
uint8_t tmp = 0;
|
|
|
|
if(phyconf->by == PHY_CONFBY_SW)
|
|
|
|
tmp |= PHYCFGR_OPMD;
|
|
|
|
else
|
|
|
|
tmp &= ~PHYCFGR_OPMD;
|
|
|
|
if(phyconf->mode == PHY_MODE_AUTONEGO)
|
|
|
|
tmp |= PHYCFGR_OPMDC_ALLA;
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if(phyconf->duplex == PHY_DUPLEX_FULL)
|
|
|
|
{
|
|
|
|
if(phyconf->speed == PHY_SPEED_100)
|
|
|
|
tmp |= PHYCFGR_OPMDC_100F;
|
|
|
|
else
|
|
|
|
tmp |= PHYCFGR_OPMDC_10F;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if(phyconf->speed == PHY_SPEED_100)
|
|
|
|
tmp |= PHYCFGR_OPMDC_100H;
|
|
|
|
else
|
|
|
|
tmp |= PHYCFGR_OPMDC_10H;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
setPHYCFGR(tmp);
|
|
|
|
wizphy_reset();
|
|
|
|
}
|
|
|
|
|
|
|
|
void wizphy_getphyconf(wiz_PhyConf* phyconf)
|
|
|
|
{
|
|
|
|
uint8_t tmp = 0;
|
|
|
|
tmp = getPHYCFGR();
|
|
|
|
phyconf->by = (tmp & PHYCFGR_OPMD) ? PHY_CONFBY_SW : PHY_CONFBY_HW;
|
|
|
|
switch(tmp & PHYCFGR_OPMDC_ALLA)
|
|
|
|
{
|
|
|
|
case PHYCFGR_OPMDC_ALLA:
|
|
|
|
case PHYCFGR_OPMDC_100FA:
|
|
|
|
phyconf->mode = PHY_MODE_AUTONEGO;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
phyconf->mode = PHY_MODE_MANUAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
switch(tmp & PHYCFGR_OPMDC_ALLA)
|
|
|
|
{
|
|
|
|
case PHYCFGR_OPMDC_100FA:
|
|
|
|
case PHYCFGR_OPMDC_100F:
|
|
|
|
case PHYCFGR_OPMDC_100H:
|
|
|
|
phyconf->speed = PHY_SPEED_100;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
phyconf->speed = PHY_SPEED_10;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
switch(tmp & PHYCFGR_OPMDC_ALLA)
|
|
|
|
{
|
|
|
|
case PHYCFGR_OPMDC_100FA:
|
|
|
|
case PHYCFGR_OPMDC_100F:
|
|
|
|
case PHYCFGR_OPMDC_10F:
|
|
|
|
phyconf->duplex = PHY_DUPLEX_FULL;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
phyconf->duplex = PHY_DUPLEX_HALF;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void wizphy_getphystat(wiz_PhyConf* phyconf)
|
|
|
|
{
|
|
|
|
uint8_t tmp = getPHYCFGR();
|
|
|
|
phyconf->duplex = (tmp & PHYCFGR_DPX_FULL) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF;
|
|
|
|
phyconf->speed = (tmp & PHYCFGR_SPD_100) ? PHY_SPEED_100 : PHY_SPEED_10;
|
|
|
|
}
|
|
|
|
|
|
|
|
int8_t wizphy_setphypmode(uint8_t pmode)
|
|
|
|
{
|
|
|
|
uint8_t tmp = 0;
|
|
|
|
tmp = getPHYCFGR();
|
|
|
|
if((tmp & PHYCFGR_OPMD)== 0) return -1;
|
|
|
|
tmp &= ~PHYCFGR_OPMDC_ALLA;
|
|
|
|
if( pmode == PHY_POWER_DOWN)
|
|
|
|
tmp |= PHYCFGR_OPMDC_PDOWN;
|
|
|
|
else
|
|
|
|
tmp |= PHYCFGR_OPMDC_ALLA;
|
|
|
|
setPHYCFGR(tmp);
|
|
|
|
wizphy_reset();
|
|
|
|
tmp = getPHYCFGR();
|
|
|
|
if( pmode == PHY_POWER_DOWN)
|
|
|
|
{
|
|
|
|
if(tmp & PHYCFGR_OPMDC_PDOWN) return 0;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if(tmp & PHYCFGR_OPMDC_ALLA) return 0;
|
|
|
|
}
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
void wizchip_setnetinfo(wiz_NetInfo* pnetinfo)
|
|
|
|
{
|
|
|
|
setSHAR(pnetinfo->mac);
|
|
|
|
setGAR(pnetinfo->gw);
|
|
|
|
setSUBR(pnetinfo->sn);
|
|
|
|
setSIPR(pnetinfo->ip);
|
|
|
|
_DNS_[0] = pnetinfo->dns[0];
|
|
|
|
_DNS_[1] = pnetinfo->dns[1];
|
|
|
|
_DNS_[2] = pnetinfo->dns[2];
|
|
|
|
_DNS_[3] = pnetinfo->dns[3];
|
|
|
|
_DHCP_ = pnetinfo->dhcp;
|
|
|
|
}
|
|
|
|
|
|
|
|
void wizchip_getnetinfo(wiz_NetInfo* pnetinfo)
|
|
|
|
{
|
|
|
|
getSHAR(pnetinfo->mac);
|
|
|
|
getGAR(pnetinfo->gw);
|
|
|
|
getSUBR(pnetinfo->sn);
|
|
|
|
getSIPR(pnetinfo->ip);
|
|
|
|
pnetinfo->dns[0]= _DNS_[0];
|
|
|
|
pnetinfo->dns[1]= _DNS_[1];
|
|
|
|
pnetinfo->dns[2]= _DNS_[2];
|
|
|
|
pnetinfo->dns[3]= _DNS_[3];
|
|
|
|
pnetinfo->dhcp = _DHCP_;
|
|
|
|
}
|
|
|
|
|
|
|
|
int8_t wizchip_setnetmode(netmode_type netmode)
|
|
|
|
{
|
|
|
|
uint8_t tmp = 0;
|
|
|
|
#if _WIZCHIP_ != 5500
|
|
|
|
if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK)) return -1;
|
|
|
|
#else
|
|
|
|
if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK | NM_FORCEARP)) return -1;
|
|
|
|
#endif
|
|
|
|
tmp = getMR();
|
|
|
|
tmp |= (uint8_t)netmode;
|
|
|
|
setMR(tmp);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
netmode_type wizchip_getnetmode(void)
|
|
|
|
{
|
|
|
|
return (netmode_type) getMR();
|
|
|
|
}
|
|
|
|
|
|
|
|
void wizchip_settimeout(wiz_NetTimeout* nettime)
|
|
|
|
{
|
|
|
|
setRCR(nettime->retry_cnt);
|
|
|
|
setRTR(nettime->time_100us);
|
|
|
|
}
|
|
|
|
|
|
|
|
void wizchip_gettimeout(wiz_NetTimeout* nettime)
|
|
|
|
{
|
|
|
|
nettime->retry_cnt = getRCR();
|
|
|
|
nettime->time_100us = getRTR();
|
|
|
|
}
|